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([156.19.246.23]) by smtp.gmail.com with ESMTPSA id t6-20020a170902e84600b001e604438791sm12465715plg.156.2024.04.24.17.00.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 17:00:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714003239; x=1714608039; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=1R4n87rS3DeEnBoWSAaX+71ppkJFcbZ3XLEos1pPsJ0=; b=j9WFH483MA91hjwQ5zLR5SEUdSeoI+r/ny27tyCOxZIeEyT3wiK+YqQnVtYrGjdVa/ /u0rdvJF0mnmemw6GOmQvwJhr8Xpl8lnFvIt6HF8SNoI1gtVu/AgP1UJYZZJAtL3Pgqc i+C/qD8SBOIpimB2SwKlRoTk9wtDeb3Ys3PXH9zgySv//jDnGAlf1rQdPRDTQuVsuuAv q+U9k3+j/j/JvWojEc9/zwxU7qoSwKwhPbAE7ZZM0SFPhmJaAan4rj9Y3bMezeTqptmA OREqDHe/aUi0e8btAeSqYdDg1kDP6FXHtl5SdngGFVVLYG5iqKxyCA4yKAcZlKvKpPB2 MbSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714003239; x=1714608039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1R4n87rS3DeEnBoWSAaX+71ppkJFcbZ3XLEos1pPsJ0=; b=UoYmsocikqlUuXjKQ0+ELBC7bphp1yhX5oh10/1K/T9YUMXvo0dz1Qif7FkQNTGiLI h81JSArz/dzTqf9K233xHG7yfWTdusBNmevbmiya5A3bCqQilBP9+vhslRIa6pcFZGic UKcQBQoX3vDLy9CBDEFPqqEOjzv0+/D43YXbXJyo0bjAXeB9nweOtci8o4HsfJSnFMCR GCkjgiHMTvvJcxJcPwQKHmeaTUxn2le7WY9qy40iMZjsLhbb8NugpRzH7iC8DmRTnxmO CxOsNg8G3rRa2yakJKAaUx2HLmrpDzoEaVArLiXWilwFhb++rnhzBiUVDVp+JLMWPS6k k3eg== X-Gm-Message-State: AOJu0YwGsScCzYfr6SvydJpKlc+ksM4LL0eBK9C7bzioR/Qs01zxKMsh rR+Bsjd9wL0MxJgcDQ3igCrnXHoxTFX9SsMbr5WKmlhNPR9znr7iPpI/mtphFDxagJKVMQ7eie+ u X-Google-Smtp-Source: AGHT+IEGn1WDQ23tfMOE7sngz+Bi507RC3jSN8fkXjvBa4GvPS6sCuxopGB93KMTU3hoxa3tb3/DfA== X-Received: by 2002:a17:902:daca:b0:1e4:9ad5:7522 with SMTP id q10-20020a170902daca00b001e49ad57522mr4898056plx.21.1714003237578; Wed, 24 Apr 2024 17:00:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 12/45] target/hppa: Add IASQ entries to DisasContext Date: Wed, 24 Apr 2024 16:59:50 -0700 Message-Id: <20240425000023.1002026-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425000023.1002026-1-richard.henderson@linaro.org> References: <20240425000023.1002026-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62d; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1714003729927100007 Content-Type: text/plain; charset="utf-8" Add variable to track space changes to IAQ. So far, no such changes are introduced, but the new checks vs ctx->iasq_b may eliminate an unnecessary copy to cpu_iasq_f with e.g. BLR. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 138250b550..43a74dafcf 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -49,6 +49,13 @@ typedef struct DisasContext { uint64_t iaoq_b; uint64_t iaoq_n; TCGv_i64 iaoq_n_var; + /* + * Null when IASQ_Back unchanged from IASQ_Front, + * or cpu_iasq_b, when IASQ_Back has been changed. + */ + TCGv_i64 iasq_b; + /* Null when IASQ_Next unchanged from IASQ_Back, or set by branch. */ + TCGv_i64 iasq_n; =20 DisasCond null_cond; TCGLabel *null_lab; @@ -3915,12 +3922,12 @@ static bool trans_be(DisasContext *ctx, arg_be *a) if (a->n && use_nullify_skip(ctx)) { install_iaq_entries(ctx, -1, tmp, -1, NULL); tcg_gen_mov_i64(cpu_iasq_f, new_spc); - tcg_gen_mov_i64(cpu_iasq_b, cpu_iasq_f); + tcg_gen_mov_i64(cpu_iasq_b, new_spc); nullify_set(ctx, 0); } else { install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, -1, tmp); - if (ctx->iaoq_b =3D=3D -1) { - tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); + if (ctx->iasq_b) { + tcg_gen_mov_i64(cpu_iasq_f, ctx->iasq_b); } tcg_gen_mov_i64(cpu_iasq_b, new_spc); nullify_set(ctx, a->n); @@ -4034,8 +4041,8 @@ static bool trans_bve(DisasContext *ctx, arg_bve *a) =20 install_link(ctx, a->l, false); install_iaq_entries(ctx, ctx->iaoq_b, cpu_iaoq_b, -1, dest); - if (ctx->iaoq_b =3D=3D -1) { - tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); + if (ctx->iasq_b) { + tcg_gen_mov_i64(cpu_iasq_f, ctx->iasq_b); } tcg_gen_mov_i64(cpu_iasq_b, space_select(ctx, 0, dest)); nullify_set(ctx, a->n); @@ -4616,6 +4623,7 @@ static void hppa_tr_init_disas_context(DisasContextBa= se *dcbase, CPUState *cs) ctx->mmu_idx =3D MMU_USER_IDX; ctx->iaoq_f =3D ctx->base.pc_first | ctx->privilege; ctx->iaoq_b =3D ctx->base.tb->cs_base | ctx->privilege; + ctx->iasq_b =3D NULL; ctx->unalign =3D (ctx->tb_flags & TB_FLAG_UNALIGN ? MO_UNALN : MO_ALIG= N); #else ctx->privilege =3D (ctx->tb_flags >> TB_FLAG_PRIV_SHIFT) & 3; @@ -4630,6 +4638,7 @@ static void hppa_tr_init_disas_context(DisasContextBa= se *dcbase, CPUState *cs) =20 ctx->iaoq_f =3D (ctx->base.pc_first & ~iasq_f) + ctx->privilege; ctx->iaoq_b =3D (diff ? ctx->iaoq_f + diff : -1); + ctx->iasq_b =3D (diff ? NULL : cpu_iasq_b); #endif =20 ctx->zero =3D tcg_constant_i64(0); @@ -4682,6 +4691,7 @@ static void hppa_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cs) =20 /* Set up the IA queue for the next insn. This will be overwritten by a branch. */ + ctx->iasq_n =3D NULL; ctx->iaoq_n_var =3D NULL; ctx->iaoq_n =3D ctx->iaoq_b =3D=3D -1 ? -1 : ctx->iaoq_b + 4; =20 @@ -4704,7 +4714,7 @@ static void hppa_tr_translate_insn(DisasContextBase *= dcbase, CPUState *cs) return; } /* Note this also detects a priority change. */ - if (ctx->iaoq_b !=3D ctx->iaoq_f + 4) { + if (ctx->iaoq_b !=3D ctx->iaoq_f + 4 || ctx->iasq_b) { ctx->base.is_jmp =3D DISAS_IAQ_N_STALE; return; } @@ -4724,6 +4734,10 @@ static void hppa_tr_translate_insn(DisasContextBase = *dcbase, CPUState *cs) gva_offset_mask(ctx->tb_flags)); } } + if (ctx->iasq_n) { + tcg_gen_mov_i64(cpu_iasq_b, ctx->iasq_n); + ctx->iasq_b =3D cpu_iasq_b; + } } =20 static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) @@ -4732,14 +4746,15 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbas= e, CPUState *cs) DisasJumpType is_jmp =3D ctx->base.is_jmp; uint64_t fi, bi; TCGv_i64 fv, bv; - TCGv_i64 fs; + TCGv_i64 fs, bs; =20 /* Assume the insn queue has not been advanced. */ fi =3D ctx->iaoq_b; fv =3D cpu_iaoq_b; - fs =3D fi =3D=3D -1 ? cpu_iasq_b : NULL; + fs =3D ctx->iasq_b; bi =3D ctx->iaoq_n; bv =3D ctx->iaoq_n_var; + bs =3D ctx->iasq_n; =20 switch (is_jmp) { case DISAS_NORETURN: @@ -4748,12 +4763,15 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbas= e, CPUState *cs) /* The insn queue has not been advanced. */ bi =3D fi; bv =3D fv; + bs =3D fs; fi =3D ctx->iaoq_f; fv =3D NULL; fs =3D NULL; /* FALLTHRU */ case DISAS_IAQ_N_STALE: - if (use_goto_tb(ctx, fi, bi) + if (fs =3D=3D NULL + && bs =3D=3D NULL + && use_goto_tb(ctx, fi, bi) && (ctx->null_cond.c =3D=3D TCG_COND_NEVER || ctx->null_cond.c =3D=3D TCG_COND_ALWAYS)) { nullify_set(ctx, ctx->null_cond.c =3D=3D TCG_COND_ALWAYS); @@ -4766,6 +4784,9 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase,= CPUState *cs) if (fs) { tcg_gen_mov_i64(cpu_iasq_f, fs); } + if (bs) { + tcg_gen_mov_i64(cpu_iasq_b, bs); + } nullify_save(ctx); if (is_jmp =3D=3D DISAS_IAQ_N_STALE_EXIT) { tcg_gen_exit_tb(NULL, 0); --=20 2.34.1