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bh=Bp3oHnePKhWq2QoakUNtEuAtVReIW674eSBPqyAvHNk=; b=UloekG+sRi9PDxnFsoeZVhAB8VoYf5p9qceL8TBfWEoWr2jFN6L0S4RES12Eu5w568zavt hcm7fEwfjQ5jvTGvP7nASfIYULPcDsouekZ8ux8mzTEkiZwOX8qrhghj6VjGb53fAJwwSb 5GLjdR6eKYFyli+rFzDOz7Sm2F84UF4= X-MC-Unique: tf9drnTdOyWWaLdCrnQfPw-1 From: Thomas Huth To: qemu-devel@nongnu.org, Artyom Tarasenko , Mark Cave-Ayland Cc: Eduardo Habkost , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= , Paolo Bonzini , Markus Armbruster Subject: [PATCH v2 1/4] target/sparc/cpu: Rename the CPU models with a "+" in their names Date: Fri, 19 Apr 2024 10:48:09 +0200 Message-ID: <20240419084812.504779-2-thuth@redhat.com> In-Reply-To: <20240419084812.504779-1-thuth@redhat.com> References: <20240419084812.504779-1-thuth@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.3 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.067, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1713516594256100001 Content-Type: text/plain; charset="utf-8" Commit b447378e12 ("qom/object: Limit type names to alphanumerical ...") cut down the amount of allowed characters for QOM types to a saner set. The "+" character was meant to be included in this set, so we had to add a hack there to still allow the legacy names of POWER and Sparc64 CPUs. However, instead of putting such a hack in the common QOM code, there is a much better place to do this: The sparc_cpu_class_by_name() function which is used to look up the names of all Sparc CPUs. Thus let's finally get rid of the "+" in the Sparc CPU names, and provide backward compatibility for the old names via some simple checks in the sparc_cpu_class_by_name() function. Reviewed-by: Mark Cave-Ayland Signed-off-by: Thomas Huth --- qom/object.c | 8 -------- target/sparc/cpu.c | 14 ++++++++++++-- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/qom/object.c b/qom/object.c index d4a001cf41..759e194972 100644 --- a/qom/object.c +++ b/qom/object.c @@ -158,14 +158,6 @@ static bool type_name_is_valid(const char *name) "ABCDEFGHIJKLMNOPQRSTUVWXYZ" "0123456789-_."); =20 - /* Allow some legacy names with '+' in it for compatibility reasons */ - if (name[plen] =3D=3D '+') { - if (plen >=3D 17 && g_str_has_prefix(name, "Sun-UltraSparc-I")) { - /* Allow "Sun-UltraSparc-IV+" and "Sun-UltraSparc-IIIi+" */ - return true; - } - } - return plen =3D=3D slen; } =20 diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index e820f50acf..774e234e09 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -314,7 +314,7 @@ static const sparc_def_t sparc_defs[] =3D { .features =3D CPU_DEFAULT_FEATURES, }, { - .name =3D "Sun UltraSparc IV+", + .name =3D "Sun UltraSparc IV plus", .iu_version =3D ((0x3eULL << 48) | (0x19ULL << 32) | (0x22ULL << 2= 4)), .fpu_version =3D 0x00000000, .mmu_version =3D mmu_us_12, @@ -323,7 +323,7 @@ static const sparc_def_t sparc_defs[] =3D { .features =3D CPU_DEFAULT_FEATURES | CPU_FEATURE_CMT, }, { - .name =3D "Sun UltraSparc IIIi+", + .name =3D "Sun UltraSparc IIIi plus", .iu_version =3D ((0x3eULL << 48) | (0x22ULL << 32) | (0ULL << 24)), .fpu_version =3D 0x00000000, .mmu_version =3D mmu_us_3, @@ -762,6 +762,16 @@ static ObjectClass *sparc_cpu_class_by_name(const char= *cpu_model) char *typename; =20 typename =3D sparc_cpu_type_name(cpu_model); + + /* Fix up legacy names with '+' in it */ + if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV+"))) { + g_free(typename); + typename =3D g_strdup(SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV-plus"= )); + } else if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-I= IIi+"))) { + g_free(typename); + typename =3D g_strdup(SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IIIi-plu= s")); + } + oc =3D object_class_by_name(typename); g_free(typename); return oc; --=20 2.44.0