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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id u12-20020a170903124c00b001dc05535632sm2589378plh.170.2024.04.05.22.37.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Apr 2024 22:37:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1712381862; x=1712986662; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BjltTyIUkG4oE0AcOsKz1SbiNuo1Csm0+1nsuSZO9Hk=; b=NaAr0+NwTByfYhqBOyloW5DMn5UhJc3ScKGtDmmxIBVQ1i340BsT26oD4NU2pYyUlx a5xaVm/ZYPWmza7MkjVTheD/CBsOxWewUK+zixpDGgif3LcUjn4i904Ssk0+GHSuJ0rf MXPT6+lFvFfh0jGzjgL16U2/0qzZNiHwFYsytxQwH+z8Ouv7rUMZ4CT1wmjNpmWLyGxw HjYJJKiLo5B6fVk6gQCOW2+UcDFQsUhuJT4OkRH/VCF6oT4bnfl1Rp6FaQ7gGs0068ev 0aMNF4SrxgIl34NqV6GvZlIyK5u2s99o+TfoDh6oxKHJJ0s9jlWxmcvZu60zIhVXMMgK 7Www== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712381862; x=1712986662; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BjltTyIUkG4oE0AcOsKz1SbiNuo1Csm0+1nsuSZO9Hk=; b=ZGW4ZHkNA1TiSq+bLlvPezVFwIxK2CPRG+byfNdUOEtF0LR4bdQxCaLzMbZhvLxfbS wxCr4+Hh4G4Byr1DZRcMAzM/uTkKbqx88zF95Ri3oHvp6Pgd90FkFwbKVYTumiJqdLu/ kQW6bu8gItRoB1Z9JJKKhM9BKoZQ7qFE2l8G1ZRua6849hbD06HhtGSyjRYBx0aFgwUJ aAW3smQFair08NVPNMPUDiAO8nsPfdMOlzDhoyFks6G3vF3qT4rJCRPOrwWV0EA18zgZ OXDlbs5y2PBFVxr9qk8r9UTkjzYg77e2MJdRmAuuM7EeyQ35wP+mH93PkaHtD9/6Lk3d mA/A== X-Gm-Message-State: AOJu0YyPnHkAu3CWKjWhiDQ/J3urfVSEegPb9KMpuMt4W4+4iXYH9g+u iO9V9mRrSh/AkbMCvWIRitCgPHILBSQccEuiejn91EIU9nzFMdSMt9Qdxratz7kcTOoUMQVBJA+ V X-Google-Smtp-Source: AGHT+IGk218OB+DX0aFez9eZ86FSRtWmOirsEfj4leLTjJD/W36pNmmm1BBxLBWsfS2TlZAhj0YCXg== X-Received: by 2002:a17:902:e542:b0:1e0:cdbf:24c2 with SMTP id n2-20020a170902e54200b001e0cdbf24c2mr3895820plf.29.1712381861942; Fri, 05 Apr 2024 22:37:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: zack@buhman.org, peter.maydell@linaro.org, ysato@users.sourceforge.jp Subject: [PATCH v3 4/4] target/sh4: Fix mac.w with saturation enabled Date: Fri, 5 Apr 2024 19:37:32 -1000 Message-Id: <20240406053732.191398-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240406053732.191398-1-richard.henderson@linaro.org> References: <20240406053732.191398-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1712381937336100001 Content-Type: text/plain; charset="utf-8" From: Zack Buhman The saturation arithmetic logic in helper_macw is not correct. I tested and verified this behavior on a SH7091. Signed-off-by: Zack Buhman Message-Id: <20240405233802.29128-3-zack@buhman.org> [rth: Reformat helper_macw, add a test case.] Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/sh4/helper.h | 2 +- target/sh4/op_helper.c | 28 +++++++++------- tests/tcg/sh4/test-macw.c | 61 +++++++++++++++++++++++++++++++++++ tests/tcg/sh4/Makefile.target | 3 ++ 4 files changed, 82 insertions(+), 12 deletions(-) create mode 100644 tests/tcg/sh4/test-macw.c diff --git a/target/sh4/helper.h b/target/sh4/helper.h index 64056e4a39..29011d3dbb 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -12,7 +12,7 @@ DEF_HELPER_1(discard_movcal_backup, void, env) DEF_HELPER_2(ocbi, void, env, i32) =20 DEF_HELPER_3(macl, void, env, s32, s32) -DEF_HELPER_3(macw, void, env, i32, i32) +DEF_HELPER_3(macw, void, env, s32, s32) =20 DEF_HELPER_2(ld_fpscr, void, env, i32) =20 diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index d0bae0cc00..99394b714c 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -177,22 +177,28 @@ void helper_macl(CPUSH4State *env, int32_t arg0, int3= 2_t arg1) env->mac =3D res; } =20 -void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1) +void helper_macw(CPUSH4State *env, int32_t arg0, int32_t arg1) { - int64_t res; + /* Inputs are already sign-extended from 16 bits. */ + int32_t mul =3D arg0 * arg1; =20 - res =3D ((uint64_t) env->mach << 32) | env->macl; - res +=3D (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; - env->mach =3D (res >> 32) & 0xffffffff; - env->macl =3D res & 0xffffffff; if (env->sr & (1u << SR_S)) { - if (res < -0x80000000) { + /* + * In saturation arithmetic mode, the accumulator is 32-bit + * with carry. MACH is not considered during the addition + * operation nor the 32-bit saturation logic. + */ + int32_t res, macl =3D env->macl; + + if (sadd32_overflow(macl, mul, &res)) { + res =3D macl < 0 ? INT32_MIN : INT32_MAX; + /* If overflow occurs, the MACH register is set to 1. */ env->mach =3D 1; - env->macl =3D 0x80000000; - } else if (res > 0x000000007fffffff) { - env->mach =3D 1; - env->macl =3D 0x7fffffff; } + env->macl =3D res; + } else { + /* In non-saturation arithmetic mode, the accumulator is 64-bit */ + env->mac +=3D mul; } } =20 diff --git a/tests/tcg/sh4/test-macw.c b/tests/tcg/sh4/test-macw.c new file mode 100644 index 0000000000..4eceec8634 --- /dev/null +++ b/tests/tcg/sh4/test-macw.c @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include + +int64_t mac_w(int64_t mac, const int16_t *a, const int16_t *b) +{ + register uint32_t macl __asm__("macl") =3D mac; + register uint32_t mach __asm__("mach") =3D mac >> 32; + + asm volatile("mac.w @%0+,@%1+" + : "+r"(a), "+r"(b), "+x"(macl), "+x"(mach)); + + return ((uint64_t)mach << 32) | macl; +} + +typedef struct { + int64_t mac; + int16_t a, b; + int64_t res[2]; +} Test; + +__attribute__((noinline)) +void test(const Test *t, int sat) +{ + int64_t res; + + if (sat) { + asm volatile("sets"); + } else { + asm volatile("clrs"); + } + res =3D mac_w(t->mac, &t->a, &t->b); + + if (res !=3D t->res[sat]) { + fprintf(stderr, "%#llx + (%#x * %#x) =3D %#llx -- got %#llx\n", + t->mac, t->a, t->b, t->res[sat], res); + abort(); + } +} + +int main() +{ + static const Test tests[] =3D { + { 0, 2, 3, { 6, 6 } }, + { 0x123456787ffffffell, 2, -3, + { 0x123456787ffffff8ll, 0x123456787ffffff8ll } }, + { 0xabcdef127ffffffall, 2, 3, + { 0xabcdef1280000000ll, 0x000000017fffffffll } }, + { 0xfffffffffll, INT16_MAX, INT16_MAX, + { 0x103fff0000ll, 0xf3fff0000ll } }, + }; + + for (int i =3D 0; i < sizeof(tests) / sizeof(tests[0]); ++i) { + for (int j =3D 0; j < 2; ++j) { + test(&tests[i], j); + } + } + return 0; +} diff --git a/tests/tcg/sh4/Makefile.target b/tests/tcg/sh4/Makefile.target index 9a11c10924..4d09291c0c 100644 --- a/tests/tcg/sh4/Makefile.target +++ b/tests/tcg/sh4/Makefile.target @@ -14,3 +14,6 @@ VPATH +=3D $(SRC_PATH)/tests/tcg/sh4 =20 test-macl: CFLAGS +=3D -O -g TESTS +=3D test-macl + +test-macw: CFLAGS +=3D -O -g +TESTS +=3D test-macw --=20 2.34.1