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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id k7-20020aa790c7000000b006ea916eac02sm8539501pfk.42.2024.04.01.18.25.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Apr 2024 18:25:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1712021108; x=1712625908; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=fMQPVwvUw4sUP1QvoGPvpZ1QZdDecCQvtpJyk55QLw0=; b=k7CARvOyweFuFsqgaM2kpnV+kuX0hW0wiLfhRryrBPNkFp7yLvjc3sSvcJ6KKidW+f 4GrGtwtghBe7R7PuVpBzjYPOYa/paK1DMhAs0aUAHD2LUi41qH+6HIy/mS3T9jiaAhpL 0wL2fB25Q9+HKBksFumZ0ghRvjV25+Bhmn+5hwjjpJ/Y1uJT08N3LOzt8Noy43pry/WF OHh5T+Ti93jhwERkUo8R07tbcRt/6cLfnKKXdmg9j4y57GCFIFK6TaKHiAWyrShSQ0GM 9+DBEvQK8HK7xlv2hU11P4OCOuPT7OJsgbTxQ1rxAhENZLmXkFxDjOvIPsLaT9xFbU6P d9bQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712021108; x=1712625908; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=fMQPVwvUw4sUP1QvoGPvpZ1QZdDecCQvtpJyk55QLw0=; b=rB6q8p7X5KBOHlq+yfvO4NaRwz7Yey2ns9tUNN089oX4/fQke8araDrKlnw/qXwezX AQqhNalIlGcBG9jhLPbN9hwce/RGLWpg7R5gQ99L68M9nG/gIoyVe8rkntNgCcMEXM2O C8zr+srLKeFgpLe8QU8VBu2vAX2OsVHkV9+dIucvVzGqyUbHbnhToei+u1RGielScBtD 8KeBeVTXqX3sJs040JefEkPg41KOk+sR1MktO7NQKyuu2peh7pMbogVEhZEl/HHXV8eW IHc7VqUg07NLw8TmVld0jYbE2AhXQBpmgQygDKsSVIg0IgqFa9VOpUJ0pBicdYUQYo0Q ZJ/Q== X-Gm-Message-State: AOJu0YwzVHS77mmTsHEAZ11emarXpMAknybv8CGLxruDp2VRkznBkudh UJW7Au1fAyR3+gjgQUMfVeCGQs0eoZi0XW9mSxmm08pVredDip0+Numa1WHA7kMEcdZ/z6CAj+p D X-Google-Smtp-Source: AGHT+IFBjJmUnxztVJxtFbEQ2DNLR2wCs0c8uFf8jAfPYwcpmWxv5h5LdmHtN6MpNWkxZr7FhmWCGw== X-Received: by 2002:a05:6870:2309:b0:221:9227:e006 with SMTP id w9-20020a056870230900b002219227e006mr12856168oao.47.1712021107979; Mon, 01 Apr 2024 18:25:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Sven Schnelle Subject: [PATCH] target/hppa: Fix IIAOQ, IIASQ for pa2.0 Date: Mon, 1 Apr 2024 15:25:04 -1000 Message-Id: <20240402012504.177097-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2001:4860:4864:20::35; envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1712021178435100003 Content-Type: text/plain; charset="utf-8" The contents of IIAOQ depend on PSW_W. Follow the text in "Interruption Instruction Address Queues", pages 2-13 through 2-15. Reported-by: Sven Schnelle Fixes: b10700d826c ("target/hppa: Update IIAOQ, IIASQ for pa2.0") Signed-off-by: Richard Henderson Tested-by: Helge Deller Tested-by: Sven Schnelle --- Sven, I looked again through IIAOQ documentation and it does seem like some of the bits are wrong, both on interrupt delivery and RFI. r~ --- target/hppa/int_helper.c | 20 +++++++++++--------- target/hppa/sys_helper.c | 18 +++++++++--------- 2 files changed, 20 insertions(+), 18 deletions(-) diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index 90437a92cd..a667ee380d 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -107,14 +107,10 @@ void hppa_cpu_do_interrupt(CPUState *cs) =20 /* step 3 */ /* - * For pa1.x, IIASQ is simply a copy of IASQ. - * For pa2.0, IIASQ is the top bits of the virtual address, - * or zero if translation is disabled. + * IIASQ is the top bits of the virtual address, or zero if translation + * is disabled -- with PSW_W =3D=3D 0, this will reduce to the space. */ - if (!hppa_is_pa20(env)) { - env->cr[CR_IIASQ] =3D env->iasq_f >> 32; - env->cr_back[0] =3D env->iasq_b >> 32; - } else if (old_psw & PSW_C) { + if (old_psw & PSW_C) { env->cr[CR_IIASQ] =3D hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32; env->cr_back[0] =3D @@ -123,8 +119,14 @@ void hppa_cpu_do_interrupt(CPUState *cs) env->cr[CR_IIASQ] =3D 0; env->cr_back[0] =3D 0; } - env->cr[CR_IIAOQ] =3D env->iaoq_f; - env->cr_back[1] =3D env->iaoq_b; + /* IIAOQ is the full offset for wide mode, or 32 bits for narrow mode.= */ + if (old_psw & PSW_W) { + env->cr[CR_IIAOQ] =3D env->iaoq_f; + env->cr_back[1] =3D env->iaoq_b; + } else { + env->cr[CR_IIAOQ] =3D (uint32_t)env->iaoq_f; + env->cr_back[1] =3D (uint32_t)env->iaoq_b; + } =20 if (old_psw & PSW_Q) { /* step 5 */ diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 208e51c086..22d6c89964 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -78,21 +78,21 @@ target_ulong HELPER(swap_system_mask)(CPUHPPAState *env= , target_ulong nsm) =20 void HELPER(rfi)(CPUHPPAState *env) { - env->iasq_f =3D (uint64_t)env->cr[CR_IIASQ] << 32; - env->iasq_b =3D (uint64_t)env->cr_back[0] << 32; - env->iaoq_f =3D env->cr[CR_IIAOQ]; - env->iaoq_b =3D env->cr_back[1]; + uint64_t mask; + + cpu_hppa_put_psw(env, env->cr[CR_IPSW]); =20 /* * For pa2.0, IIASQ is the top bits of the virtual address. * To recreate the space identifier, remove the offset bits. + * For pa1.x, the mask reduces to no change to space. */ - if (hppa_is_pa20(env)) { - env->iasq_f &=3D ~env->iaoq_f; - env->iasq_b &=3D ~env->iaoq_b; - } + mask =3D gva_offset_mask(env->psw); =20 - cpu_hppa_put_psw(env, env->cr[CR_IPSW]); + env->iaoq_f =3D env->cr[CR_IIAOQ]; + env->iaoq_b =3D env->cr_back[1]; + env->iasq_f =3D (env->cr[CR_IIASQ] << 32) & ~(env->iaoq_f & mask); + env->iasq_b =3D (env->cr_back[0] << 32) & ~(env->iaoq_b & mask); } =20 static void getshadowregs(CPUHPPAState *env) --=20 2.34.1