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Tsirkin" , Paolo Bonzini , Igor Mammedov , Anthony Perard , Ani Sinha , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH-for-9.1 08/29] hw/i386/pc: Move CXLState to PcPciMachineState Date: Thu, 28 Mar 2024 16:54:16 +0100 Message-ID: <20240328155439.58719-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240328155439.58719-1-philmd@linaro.org> References: <20240328155439.58719-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711641348143100023 CXL depends on PCIe, which isn't available on non-PCI machines such the ISA-only PC one. Move CXLState to PcPciMachineState, and move the CXL specific calls to pc_pci_machine_initfn() and pc_pci_machine_done(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Jonathan Cameron --- include/hw/i386/pc.h | 3 ++- hw/i386/acpi-build.c | 14 +++++++++++--- hw/i386/pc.c | 39 ++++++++++++++++++++------------------- 3 files changed, 33 insertions(+), 23 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 24c8e17e62..a97493d29d 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -54,13 +54,14 @@ typedef struct PCMachineState { hwaddr memhp_io_base; =20 SGXEPCState sgx_epc; - CXLState cxl_devices_state; } PCMachineState; =20 typedef struct PcPciMachineState { PCMachineState parent_obj; =20 Notifier machine_done; + + CXLState cxl_devices_state; } PcPciMachineState; =20 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b9890886f6..6e8e32e5d2 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1554,6 +1554,11 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, crs_range_set_init(&crs_range_set); bus =3D PC_MACHINE(machine)->pcibus; if (bus) { + PcPciMachineState *ppms; + + assert(pc_machine_is_pci_enabled(pcms)); + ppms =3D PC_PCI_MACHINE(machine); + QLIST_FOREACH(bus, &bus->child, sibling) { uint8_t bus_num =3D pci_bus_num(bus); uint8_t numa_node =3D pci_bus_numa_node(bus); @@ -1607,7 +1612,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, =20 /* Handle the ranges for the PXB expanders */ if (pci_bus_is_cxl(bus)) { - MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; + MemoryRegion *mr =3D &ppms->cxl_devices_state.host_mr; uint64_t base =3D mr->addr; =20 cxl_present =3D true; @@ -2513,6 +2518,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState= *machine) Object *vmgenid_dev; char *oem_id; char *oem_table_id; + bool pci_enabled =3D pc_machine_is_pci_enabled(pcms); + PcPciMachineState *ppms =3D pci_enabled ? PC_PCI_MACHINE(pcms) : NULL; =20 acpi_get_pm_info(machine, &pm); acpi_get_misc_info(&misc); @@ -2640,9 +2647,10 @@ void acpi_build(AcpiBuildTables *tables, MachineStat= e *machine) machine->nvdimms_state, machine->ram_slots, x86ms->oem_id, x86ms->oem_table_id); } - if (pcms->cxl_devices_state.is_enabled) { + if (ppms && ppms->cxl_devices_state.is_enabled) { cxl_build_cedt(table_offsets, tables_blob, tables->linker, - x86ms->oem_id, x86ms->oem_table_id, &pcms->cxl_devi= ces_state); + x86ms->oem_id, x86ms->oem_table_id, + &ppms->cxl_devices_state); } =20 acpi_add_table(table_offsets, tables_blob); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f9226f7115..6d87d1d4c2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -598,13 +598,6 @@ void pc_machine_done(Notifier *notifier, void *data) PCMachineState, machine_done); X86MachineState *x86ms =3D X86_MACHINE(pcms); =20 - cxl_hook_up_pxb_registers(pcms->pcibus, &pcms->cxl_devices_state, - &error_fatal); - - if (pcms->cxl_devices_state.is_enabled) { - cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal); - } - /* set the number of CPUs */ x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); =20 @@ -626,6 +619,13 @@ static void pc_pci_machine_done(Notifier *notifier, vo= id *data) PCMachineState *pcms =3D PC_MACHINE(ppms); X86MachineState *x86ms =3D X86_MACHINE(pcms); =20 + cxl_hook_up_pxb_registers(pcms->pcibus, &ppms->cxl_devices_state, + &error_fatal); + + if (ppms->cxl_devices_state.is_enabled) { + cxl_fmws_link_targets(&ppms->cxl_devices_state, &error_fatal); + } + fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg); } =20 @@ -719,13 +719,14 @@ static uint64_t pc_get_cxl_range_start(PCMachineState= *pcms) =20 static uint64_t pc_get_cxl_range_end(PCMachineState *pcms) { + PcPciMachineState *ppms =3D PC_PCI_MACHINE(pcms); uint64_t start =3D pc_get_cxl_range_start(pcms) + MiB; =20 - if (pcms->cxl_devices_state.fixed_windows) { + if (ppms->cxl_devices_state.fixed_windows) { GList *it; =20 start =3D ROUND_UP(start, 256 * MiB); - for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D it->= next) { + for (it =3D ppms->cxl_devices_state.fixed_windows; it; it =3D it->= next) { CXLFixedWindow *fw =3D it->data; start +=3D fw->size; } @@ -823,6 +824,7 @@ void pc_memory_init(PCMachineState *pcms, hwaddr cxl_base, cxl_resv_end =3D 0; X86CPU *cpu =3D X86_CPU(first_cpu); bool pci_enabled =3D pc_machine_is_pci_enabled(pcms); + PcPciMachineState *ppms =3D pci_enabled ? PC_PCI_MACHINE(pcms) : NULL; =20 assert(machine->ram_size =3D=3D x86ms->below_4g_mem_size + x86ms->above_4g_mem_size); @@ -926,20 +928,20 @@ void pc_memory_init(PCMachineState *pcms, machine_memory_devices_init(machine, device_mem_base, device_mem_s= ize); } =20 - if (pcms->cxl_devices_state.is_enabled) { - MemoryRegion *mr =3D &pcms->cxl_devices_state.host_mr; + if (ppms && ppms->cxl_devices_state.is_enabled) { + MemoryRegion *mr =3D &ppms->cxl_devices_state.host_mr; hwaddr cxl_size =3D MiB; =20 cxl_base =3D pc_get_cxl_range_start(pcms); memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size); memory_region_add_subregion(system_memory, cxl_base, mr); cxl_resv_end =3D cxl_base + cxl_size; - if (pcms->cxl_devices_state.fixed_windows) { + if (ppms->cxl_devices_state.fixed_windows) { hwaddr cxl_fmw_base; GList *it; =20 cxl_fmw_base =3D ROUND_UP(cxl_base + cxl_size, 256 * MiB); - for (it =3D pcms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { + for (it =3D ppms->cxl_devices_state.fixed_windows; it; it =3D = it->next) { CXLFixedWindow *fw =3D it->data; =20 fw->base =3D cxl_fmw_base; @@ -979,7 +981,7 @@ void pc_memory_init(PCMachineState *pcms, res_mem_end +=3D memory_region_size(&machine->device_memory->m= r); } =20 - if (pcms->cxl_devices_state.is_enabled) { + if (ppms->cxl_devices_state.is_enabled) { res_mem_end =3D cxl_resv_end; } *val =3D cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); @@ -1010,11 +1012,12 @@ uint64_t pc_pci_hole64_start(void) { PCMachineState *pcms =3D PC_MACHINE(qdev_get_machine()); PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); + PcPciMachineState *ppms =3D PC_PCI_MACHINE(pcms); MachineState *ms =3D MACHINE(pcms); uint64_t hole64_start =3D 0; ram_addr_t size =3D 0; =20 - if (pcms->cxl_devices_state.is_enabled) { + if (ppms->cxl_devices_state.is_enabled) { hole64_start =3D pc_get_cxl_range_end(pcms); } else if (pcmc->has_reserved_memory && (ms->ram_size < ms->maxram_siz= e)) { pc_get_device_memory_range(pcms, &hole64_start, &size); @@ -1651,7 +1654,6 @@ static void pc_machine_initfn(Object *obj) { PCMachineState *pcms =3D PC_MACHINE(obj); PCMachineClass *pcmc =3D PC_MACHINE_GET_CLASS(pcms); - bool pci_enabled =3D pc_machine_is_pci_enabled(pcms); =20 #ifdef CONFIG_VMPORT pcms->vmport =3D ON_OFF_AUTO_AUTO; @@ -1678,9 +1680,6 @@ static void pc_machine_initfn(Object *obj) pcms->pcspk =3D isa_new(TYPE_PC_SPEAKER); object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", OBJECT(pcms->pcspk), "audiodev"); - if (pci_enabled) { - cxl_machine_init(obj, &pcms->cxl_devices_state); - } =20 pcms->machine_done.notify =3D pc_machine_done; qemu_add_machine_init_done_notifier(&pcms->machine_done); @@ -1690,6 +1689,8 @@ static void pc_pci_machine_initfn(Object *obj) { PcPciMachineState *ppms =3D PC_PCI_MACHINE(obj); =20 + cxl_machine_init(obj, &ppms->cxl_devices_state); + ppms->machine_done.notify =3D pc_pci_machine_done; qemu_add_machine_init_done_notifier(&ppms->machine_done); } --=20 2.41.0