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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id q27-20020a63751b000000b005bd980cca56sm7835336pgc.29.2024.03.26.11.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 11:12:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711476764; x=1712081564; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; b=htfheGND1eg1pQLsSoZQksdkx7rhBcmUHfQiKdZeRJ9a+VRQ4+8l5mKd9ji8mbum14 5TvdlQYA3zxMXF7XJNKr9EGrF5lZBqmTRhtQITTkpWRektwdXKxNZ92JMA8gNvlPs+4V lU6b9nR5vjTtC/IP0lHdPSGWtjbuzukzQ0/G75ZzScUdWls+uAnh3+ZwcyETFnHcmJkh UtFxMaMFiqI+AcH1/77/yF3xDquGqweJIsYd2BYyRGxNzxuFZvAqplYd+PCvmNSdOH3U RAToDlwm0d1GUq6dzGvJXzSQIxcnCS/Ro59PI2j0sl2ohuMl4hjb066qNb2v41zz/HXF ++qQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711476764; x=1712081564; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; b=Gc44jYbSQ5PZJnGCvW9BcXddU8MyXeN5axccay5eTSI9iMeA1Jn5L/DejtKDFXaREJ 8UAVLJ9Hw3Zd7ErPSGro/xmkNjmm3WAWS1G/hlDRTq2fbP+CQJ9Z8tBW1yyhAe5rrMr8 6F0L+1Ey/zWsB0LSvEf2RD9ngmMQ07eGiRiu6+pIzOYZxIq3DJPfbsKo78GTHvfzrjF2 7jDKxKVpgIALGKeHgWKh6tDwqqAFoGxpfBPOtFq94msPUn5XgrEipzoDRrSdxr1Edgc1 6YCCojtP7bbSOMiNNDoQCEuabDDl1Yj2z3q8xMc8+iLSVF4LnoXBF7TguFjrwgvIu9C5 PWug== X-Gm-Message-State: AOJu0YzmuCh6SWAHWT7l0X1QWOnj+MbPBnHn2Wwup7FQxicxuF/UYmYT 619VWRerqQXiNxg2Wt4F8sbVp1vC4X3Ie+sdhnMxfrO8AeLsJspCyjQCPCgVy/8vHUTcLs1/7/m B X-Google-Smtp-Source: AGHT+IEbIF77nY62uxWh2qWXSh9g+9J+PxqYXph+csroNX7g0QF/xNNcdG8vys+LXj9HUuw5IPl5uw== X-Received: by 2002:a05:6a20:244d:b0:1a3:c404:37fc with SMTP id t13-20020a056a20244d00b001a3c40437fcmr9107588pzc.13.1711476764404; Tue, 26 Mar 2024 11:12:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org, Helge Deller Subject: [PATCH v2 3/3] target/hppa: Fix diag instructions to set/restore shadow registers Date: Tue, 26 Mar 2024 08:10:28 -1000 Message-Id: <20240326181028.332867-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326181028.332867-1-richard.henderson@linaro.org> References: <20240326181028.332867-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711476838945100001 Content-Type: text/plain; charset="utf-8" The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different diag instructions to save or restore the CPU registers to/from the shadow registers. Implement those per-CPU architecture diag instructions to fix those parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test the shadow registers. Signed-off-by: Helge Deller [rth: Use decodetree to distinguish cases] Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/insns.decode | 10 ++++++++++ target/hppa/translate.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 9f6ffd8e2c..c2acb3796c 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -65,6 +65,8 @@ # Argument set definitions #### =20 +&empty + # All insns that need to form a virtual address should use this set. &ldst t b x disp sp m scale size =20 @@ -638,6 +640,14 @@ xmpyu 001110 ..... ..... 010 .0111 .00 t:5 = r1=3D%ra64 r2=3D%rb64 [ diag_btlb 000101 00 0000 0000 0000 0001 0000 0000 diag_cout 000101 00 0000 0000 0000 0001 0000 0001 + + # For 32-bit 7300C + diag_getshadowregs_pa1 000101 00 0000 0000 0001 1010 0000 0000 + diag_putshadowregs_pa1 000101 00 0000 0000 0001 1010 0100 0000 + + # For 64-bit PCX-W 8500 + diag_getshadowregs_pa2 000101 00 0111 1000 0001 1000 0100 0000 + diag_putshadowregs_pa2 000101 00 0111 0000 0001 1000 0100 0000 ] diag_unimp 000101 i:26 } diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42dd3f2c8d..143818c2d9 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2399,6 +2399,20 @@ static bool do_getshadowregs(DisasContext *ctx) return nullify_end(ctx); } =20 +static bool do_putshadowregs(DisasContext *ctx) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + nullify_over(ctx); + tcg_gen_st_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0])); + tcg_gen_st_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1])); + tcg_gen_st_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2])); + tcg_gen_st_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3])); + tcg_gen_st_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4])); + tcg_gen_st_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5])); + tcg_gen_st_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6])); + return nullify_end(ctx); +} + static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a) { return do_getshadowregs(ctx); @@ -4594,6 +4608,26 @@ static bool trans_diag_cout(DisasContext *ctx, arg_d= iag_cout *a) #endif } =20 +static bool trans_diag_getshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_getshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_putshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_putshadowregs(ctx); +} + static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); --=20 2.34.1