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Mon, 25 Mar 2024 07:14:29 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE1K2Gy9c3Ze3o23ubwmlygWg1Un6OMU1GF8QMuOlSaADdGdpJXZ6ru6SUO2X4wzbXJanzSYw== X-Received: by 2002:a19:9108:0:b0:515:8550:58c9 with SMTP id t8-20020a199108000000b00515855058c9mr5632558lfd.63.1711376068956; Mon, 25 Mar 2024 07:14:28 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , Xiaoyao Li Subject: [PATCH for-9.1 v5 2/3] target/i386: add guest-phys-bits cpu property Date: Mon, 25 Mar 2024 15:14:21 +0100 Message-ID: <20240325141422.1380087-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240325141422.1380087-1-pbonzini@redhat.com> References: <20240325141422.1380087-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.065, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1711376230720100001 Content-Type: text/plain; charset="utf-8" From: Gerd Hoffmann Allows to set guest-phys-bits (cpuid leaf 80000008, eax[23:16]) via -cpu $model,guest-phys-bits=3D$nr. Signed-off-by: Gerd Hoffmann Message-ID: <20240318155336.156197-3-kraxel@redhat.com> Signed-off-by: Paolo Bonzini Reviewed-by: Xiaoyao Li Reviewed-by: Zhao Liu --- v4->v5: - move here all non-KVM parts - add compat property and support for special value "-1" (accelerator defines value) target/i386/cpu.h | 1 + hw/i386/pc.c | 4 +++- target/i386/cpu.c | 22 ++++++++++++++++++++++ 3 files changed, 26 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6b057380791..83e47358451 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2026,6 +2026,7 @@ struct ArchCPU { =20 /* Number of physical address bits supported */ uint32_t phys_bits; + uint32_t guest_phys_bits; =20 /* in order to simplify APIC support, we leave this pointer to the user */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 461fcaa1b48..9c4b3969cc8 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -78,7 +78,9 @@ { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }= ,\ { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, =20 -GlobalProperty pc_compat_9_0[] =3D {}; +GlobalProperty pc_compat_9_0[] =3D { + { TYPE_X86_CPU, "guest-phys-bits", "0" }, +}; const size_t pc_compat_9_0_len =3D G_N_ELEMENTS(pc_compat_9_0); =20 GlobalProperty pc_compat_8_2[] =3D {}; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 33760a2ee16..eef3d08473e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6570,6 +6570,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { /* 64 bit processor */ *eax |=3D (cpu_x86_virtual_addr_width(env) << 8); + *eax |=3D (cpu->guest_phys_bits << 16); } *ebx =3D env->features[FEAT_8000_0008_EBX]; if (cs->nr_cores * cs->nr_threads > 1) { @@ -7329,6 +7330,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Erro= r **errp) goto out; } =20 + if (cpu->guest_phys_bits =3D=3D -1) { + /* + * If it was not set by the user, or by the accelerator via + * cpu_exec_realizefn, clear. + */ + cpu->guest_phys_bits =3D 0; + } + if (cpu->ucode_rev =3D=3D 0) { /* * The default is the same as KVM's. Note that this check @@ -7379,6 +7388,14 @@ static void x86_cpu_realizefn(DeviceState *dev, Erro= r **errp) if (cpu->phys_bits =3D=3D 0) { cpu->phys_bits =3D TCG_PHYS_ADDR_BITS; } + if (cpu->guest_phys_bits && + (cpu->guest_phys_bits > cpu->phys_bits || + cpu->guest_phys_bits < 32)) { + error_setg(errp, "guest-phys-bits should be between 32 and %u " + " (but is %u)", + cpu->phys_bits, cpu->guest_phys_bits); + return; + } } else { /* For 32 bit systems don't use the user set value, but keep * phys_bits consistent with what we tell the guest. @@ -7387,6 +7404,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Erro= r **errp) error_setg(errp, "phys-bits is not user-configurable in 32 bit= "); return; } + if (cpu->guest_phys_bits !=3D 0) { + error_setg(errp, "guest-phys-bits is not user-configurable in = 32 bit"); + return; + } =20 if (env->features[FEAT_1_EDX] & (CPUID_PSE36 | CPUID_PAE)) { cpu->phys_bits =3D 36; @@ -7887,6 +7908,7 @@ static Property x86_cpu_properties[] =3D { DEFINE_PROP_BOOL("x-force-features", X86CPU, force_features, false), DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true), DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0), + DEFINE_PROP_UINT32("guest-phys-bits", X86CPU, guest_phys_bits, -1), DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false), DEFINE_PROP_UINT8("host-phys-bits-limit", X86CPU, host_phys_bits_limit= , 0), DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true), --=20 2.44.0