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([102.35.208.160]) by smtp.gmail.com with ESMTPSA id t20-20020ac243b4000000b00515b1b3a2bdsm35231lfl.194.2024.03.25.05.42.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Mar 2024 05:42:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1711370547; x=1711975347; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3fn6N2ntsH+F3JXVJngzSSl7+cdB9hqssRwHmqhgQl0=; b=STgeQI9IQ45WWmGHC2yh1Rf5MPEPJExcK9M2vba5hVRu6MYdwAThBF18Oktld+4VAh /lrIEqUri1U5SnGUrgxZT1OMd1XNmX9cYBBlnBKp0mP+EQaUq8C8KhIB2xVsA8FeGuXN Ax6EmsIWpoFxhTsMMK33vPzRAN7q+vD8dI+0sr+WPQrmootAUUeWNLVVGDu7OwfcXQAP XUtgoSFeTpCgsbXwTCE8/RaNF5+XmwjUGYElBugMFrN0tbctomkL0o9GxtM5AQzUJFYY QucTZapo8jr/rceDOuckMR8hCuY1wI4sX+wOMj18Agam883B4id/jHpl44DEJUPhzlZ6 sloA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1711370547; x=1711975347; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3fn6N2ntsH+F3JXVJngzSSl7+cdB9hqssRwHmqhgQl0=; b=vuV+ZtOnXfBCynPSc4Hc7GfQLL2cC4qv7VoEMRLEt4RZt5fYpnf/UztBfLwnUvNjKH 6EUz2IA2jNxoD1re/DSxl+cUpMHnSm+Ac/s1/zQHREas89Wld3L72TGqWpoXsHBzso74 GXIxoCpsLRLctcwRUq46THRR+W52j9SZrUuIQaU07bz8cTFNoK2aGvhOOpUlmNFhskPl kO+gm66uCJf0JDmH8csm3fSulKDAsX6ySs3O5x0iwwXxvQ/jiBBQGA2vb4z+82DfEWtR dSvcv/BbLvXExY7WY2JiQf0Fs08YNre+2R4bKU1YG/oII/ozCGxMQgrJ/BPmnvsd98mF 0Zlg== X-Gm-Message-State: AOJu0YyF2nfTz70IRH3KPlsam4wQYKaVkIIJe/O3Blu9NR3yPm1ymFsl EGzICA+zmVmgkaGuOZltHMJNsGgZozIgh6CJhAuUiDoGhRJK1W+31nd9HXNCndKzJovn9CfQvJR R X-Google-Smtp-Source: AGHT+IGmQpsFaIG1yyrfsdctZN4lDSveGQYf7WPd8V4FvSgt3aTJFHVilS6dBG1X97Qp1x5FmAcHSA== X-Received: by 2002:ac2:5e65:0:b0:515:af1f:5bad with SMTP id a5-20020ac25e65000000b00515af1f5badmr1182177lfr.28.1711370546866; Mon, 25 Mar 2024 05:42:26 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Alexandre Iooss , Pierrick Bouvier , Richard Henderson , Paolo Bonzini , Mahmoud Mandour Subject: [PATCH v3 7/8] plugins: distinct types for callbacks Date: Mon, 25 Mar 2024 16:41:50 +0400 Message-Id: <20240325124151.336003-8-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240325124151.336003-1-pierrick.bouvier@linaro.org> References: <20240325124151.336003-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=pierrick.bouvier@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1711370641864100003 Content-Type: text/plain; charset="utf-8" To prevent errors when writing new types of callbacks or inline operations, we split callbacks data to distinct types. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson --- include/qemu/plugin.h | 46 ++++++++++++++----------- plugins/plugin.h | 2 +- accel/tcg/plugin-gen.c | 58 +++++++++++++++++--------------- plugins/core.c | 76 ++++++++++++++++++++++-------------------- 4 files changed, 98 insertions(+), 84 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index bb224b8e4c7..a078229942f 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -73,34 +73,40 @@ enum plugin_dyn_cb_type { PLUGIN_CB_INLINE_STORE_U64, }; =20 +struct qemu_plugin_regular_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_inline_cb { + qemu_plugin_u64 entry; + enum qemu_plugin_op op; + uint64_t imm; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_conditional_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; +}; + /* * A dynamic callback has an insertion point that is determined at run-tim= e. * Usually the insertion point is somewhere in the code cache; think for * instance of a callback to be called upon the execution of a particular = TB. */ struct qemu_plugin_dyn_cb { - void *userp; enum plugin_dyn_cb_type type; - /* @rw applies to mem callbacks only (both regular and inline) */ - enum qemu_plugin_mem_rw rw; - /* fields specific to each dyn_cb type go here */ union { - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - } regular; - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - qemu_plugin_u64 entry; - enum qemu_plugin_cond cond; - uint64_t imm; - } cond; - struct { - qemu_plugin_u64 entry; - enum qemu_plugin_op op; - uint64_t imm; - } inline_insn; + struct qemu_plugin_regular_cb regular; + struct qemu_plugin_conditional_cb cond; + struct qemu_plugin_inline_cb inline_insn; }; }; =20 diff --git a/plugins/plugin.h b/plugins/plugin.h index 7d4b4e21f7c..80d5daa9171 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); =20 int plugin_num_vcpus(void); =20 diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 7ecaf670d93..16618adf1bc 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -108,13 +108,13 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } =20 -static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); =20 tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call2(cb->regular.f.vcpu_udata, cb->regular.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); tcg_temp_free_i32(cpu_index); @@ -160,21 +160,21 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugi= n_cond cond) } } =20 -static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->cond.entry); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); TCGLabel *after_cb =3D gen_new_label(); =20 /* Condition should be negated, as calling the cb is the "else" path */ - TCGCond cond =3D tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)= ); + TCGCond cond =3D tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond)); =20 tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); gen_set_label(after_cb); @@ -184,39 +184,39 @@ static void gen_udata_cond_cb(struct qemu_plugin_dyn_= cb *cb) tcg_temp_free_ptr(ptr); } =20 -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); =20 tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_addi_i64(val, val, cb->inline_insn.imm); + tcg_gen_addi_i64(val, val, cb->imm); tcg_gen_st_i64(val, ptr, 0); =20 tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); } =20 -static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); =20 - tcg_gen_movi_i64(val, cb->inline_insn.imm); + tcg_gen_movi_i64(val, cb->imm); tcg_gen_st_i64(val, ptr, 0); =20 tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); } =20 -static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, +static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); =20 tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call4(cb->regular.f.vcpu_mem, cb->regular.info, NULL, + tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), tcgv_i64_temp(addr), @@ -229,16 +229,16 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) { switch (cb->type) { case PLUGIN_CB_REGULAR: - gen_udata_cb(cb); + gen_udata_cb(&cb->regular); break; case PLUGIN_CB_COND: - gen_udata_cond_cb(cb); + gen_udata_cond_cb(&cb->cond); break; case PLUGIN_CB_INLINE_ADD_U64: - gen_inline_add_u64_cb(cb); + gen_inline_add_u64_cb(&cb->inline_insn); break; case PLUGIN_CB_INLINE_STORE_U64: - gen_inline_store_u64_cb(cb); + gen_inline_store_u64_cb(&cb->inline_insn); break; default: g_assert_not_reached(); @@ -249,15 +249,21 @@ static void inject_mem_cb(struct qemu_plugin_dyn_cb *= cb, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - if (cb->rw & rw) { - switch (cb->type) { - case PLUGIN_CB_MEM_REGULAR: - gen_mem_cb(cb, meminfo, addr); - break; - default: + switch (cb->type) { + case PLUGIN_CB_MEM_REGULAR: + if (rw && cb->regular.rw) { + gen_mem_cb(&cb->regular, meminfo, addr); + } + break; + case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: + if (rw && cb->inline_insn.rw) { inject_cb(cb); - break; } + break; + default: + g_assert_not_reached(); + break; } } =20 diff --git a/plugins/core.c b/plugins/core.c index b3d0208e022..7ea2ee208db 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -336,13 +336,13 @@ void plugin_register_inline_op_on_entry(GArray **arr, { struct qemu_plugin_dyn_cb *dyn_cb; =20 + struct qemu_plugin_inline_cb inline_cb =3D { .rw =3D rw, + .entry =3D entry, + .op =3D op, + .imm =3D imm }; dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D NULL; dyn_cb->type =3D op_to_cb_type(op); - dyn_cb->rw =3D rw; - dyn_cb->inline_insn.entry =3D entry; - dyn_cb->inline_insn.op =3D op; - dyn_cb->inline_insn.imm =3D imm; + dyn_cb->inline_insn =3D inline_cb; } =20 void plugin_register_dyn_cb__udata(GArray **arr, @@ -361,14 +361,14 @@ void plugin_register_dyn_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_regular_cb regular_cb =3D { .f.vcpu_udata =3D cb, + .userp =3D udata, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_REGULAR; - dyn_cb->regular.f.vcpu_udata =3D cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info =3D &info[flags]; + dyn_cb->regular =3D regular_cb; } =20 void plugin_register_dyn_cond_cb__udata(GArray **arr, @@ -390,17 +390,17 @@ void plugin_register_dyn_cond_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_conditional_cb cond_cb =3D { .userp =3D udata, + .f.vcpu_udata =3D cb, + .cond =3D cond, + .entry =3D entry, + .imm =3D imm, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_COND; - dyn_cb->cond.f.vcpu_udata =3D cb; - dyn_cb->cond.cond =3D cond; - dyn_cb->cond.entry =3D entry; - dyn_cb->cond.imm =3D imm; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->cond.info =3D &info[flags]; + dyn_cb->cond =3D cond_cb; } =20 void plugin_register_vcpu_mem_cb(GArray **arr, @@ -432,15 +432,15 @@ void plugin_register_vcpu_mem_cb(GArray **arr, dh_typemask(i64, 3) | dh_typemask(ptr, 4)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_regular_cb regular_cb =3D { .userp =3D udata, + .rw =3D rw, + .f.vcpu_mem =3D cb, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_MEM_REGULAR; - dyn_cb->rw =3D rw; - dyn_cb->regular.f.vcpu_mem =3D cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info =3D &info[flags]; + dyn_cb->regular =3D regular_cb; } =20 /* @@ -557,20 +557,20 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) { - char *ptr =3D cb->inline_insn.entry.score->data->data; + char *ptr =3D cb->entry.score->data->data; size_t elem_size =3D g_array_get_element_size( - cb->inline_insn.entry.score->data); - size_t offset =3D cb->inline_insn.entry.offset; + cb->entry.score->data); + size_t offset =3D cb->entry.offset; uint64_t *val =3D (uint64_t *)(ptr + offset + cpu_index * elem_size); =20 - switch (cb->inline_insn.op) { + switch (cb->op) { case QEMU_PLUGIN_INLINE_ADD_U64: - *val +=3D cb->inline_insn.imm; + *val +=3D cb->imm; break; case QEMU_PLUGIN_INLINE_STORE_U64: - *val =3D cb->inline_insn.imm; + *val =3D cb->imm; break; default: g_assert_not_reached(); @@ -590,17 +590,19 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t = vaddr, struct qemu_plugin_dyn_cb *cb =3D &g_array_index(arr, struct qemu_plugin_dyn_cb, i); =20 - if (!(rw & cb->rw)) { - break; - } switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: - cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi,= rw), - vaddr, cb->userp); + if (rw && cb->regular.rw) { + cb->regular.f.vcpu_mem(cpu->cpu_index, + make_plugin_meminfo(oi, rw), + vaddr, cb->regular.userp); + } break; case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: - exec_inline_op(cb, cpu->cpu_index); + if (rw && cb->inline_insn.rw) { + exec_inline_op(&cb->inline_insn, cpu->cpu_index); + } break; default: g_assert_not_reached(); --=20 2.39.2