From nobody Tue Feb 10 13:16:56 2026 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1711356803; cv=none; d=zohomail.com; s=zohoarc; b=LWAkgDwVZmyw96KCb8+wy4a3e7vXJJoEC1EGoSHVmefq/JZlZf8ubZkHMtSsgAiB6KtOJP3qSYBluBUGHJ4Pt/xdjVYhZQRKYmd0HUBM3k39/spCYn7fdf94dGJYJFOKFxwY7ilw5ObWmLic3urjaq4mxrBxvrQ5YA3dRCz9bQA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1711356803; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=a60WJ2EU1hNFVfjzmSVnsoidxt3qePxyJEp32CRfbpU=; b=YziTSYjBb/Tu3IbBvRRViRjLLrqYjJ9Kk+DXHdee7Baq6W3JTgaNBT42QFEUfMD9wiHx+g1hhETxiwBr2gXqx6gGL2nXvYcFApisNGimlj1ZbS2UHGqolGcCeIXdhS9C7eovBR0iidI9nJvVgsPYyURTxi+OlLrrtZZhTZV5kO0= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 171135680296326.27056618670099; Mon, 25 Mar 2024 01:53:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rog4J-0003Ca-Ho; Mon, 25 Mar 2024 04:52:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rog3v-00031A-64; Mon, 25 Mar 2024 04:52:12 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rog3k-0007Ok-9E; Mon, 25 Mar 2024 04:52:09 -0400 Received: from mail.maildlp.com (unknown [172.19.163.48]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4V367245zCzwQ8Z; Mon, 25 Mar 2024 16:49:18 +0800 (CST) Received: from kwepemi500008.china.huawei.com (unknown [7.221.188.139]) by mail.maildlp.com (Postfix) with ESMTPS id 8CB3A18007B; Mon, 25 Mar 2024 16:51:56 +0800 (CST) Received: from huawei.com (10.67.174.55) by kwepemi500008.china.huawei.com (7.221.188.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Mon, 25 Mar 2024 16:51:55 +0800 To: , , , , , , , CC: Subject: [PATCH v10 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMI Date: Mon, 25 Mar 2024 08:48:39 +0000 Message-ID: <20240325084854.3010562-9-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240325084854.3010562-1-ruanjinjie@huawei.com> References: <20240325084854.3010562-1-ruanjinjie@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.67.174.55] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To kwepemi500008.china.huawei.com (7.221.188.139) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.187; envelope-from=ruanjinjie@huawei.com; helo=szxga01-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jinjie Ruan From: Jinjie Ruan via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1711356804513100005 Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI or CPU_INTERRUPT_VINMI, both CPSR_I and ISR_IS must be set. With CPU_INTERRUPT_VFNMI, both CPSR_F and ISR_FS must be set. Signed-off-by: Jinjie Ruan Reviewed-by: Richard Henderson --- v9: - CPU_INTERRUPT_VNMI -> CPU_INTERRUPT_VINMI. - Handle CPSR_F and ISR_FS according to CPU_INTERRUPT_VFNMI instead of CPU_INTERRUPT_VFIQ and HCRX_EL2.VFNMI. - Update the commit message. v7: - env->cp15.hcrx_el2 -> arm_hcrx_el2_eff(). - Add Reviewed-by. v6: - Verify that HCR_EL2.VF is set before checking VFNMI. v4=EF=BC=9B - Also handle VNMI. v3: - CPU_INTERRUPT_NMI do not set FIQ, so remove it. - With CPU_INTERRUPT_NMI, both CPSR_I and ISR_IS must be set. --- target/arm/cpu.h | 2 ++ target/arm/helper.c | 13 +++++++++++++ 2 files changed, 15 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 08a6bc50de..97997dbd08 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1398,6 +1398,8 @@ void pmu_init(ARMCPU *cpu); #define CPSR_N (1U << 31) #define CPSR_NZCV (CPSR_N | CPSR_Z | CPSR_C | CPSR_V) #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F) +#define ISR_FS (1U << 9) +#define ISR_IS (1U << 10) =20 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) #define CACHED_CPSR_BITS (CPSR_T | CPSR_AIF | CPSR_GE | CPSR_IT | CPSR_Q \ diff --git a/target/arm/helper.c b/target/arm/helper.c index 077c9a6923..b57114d35d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2021,16 +2021,29 @@ static uint64_t isr_read(CPUARMState *env, const AR= MCPRegInfo *ri) if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { ret |=3D CPSR_I; } + if (cs->interrupt_request & CPU_INTERRUPT_VINMI) { + ret |=3D ISR_IS; + ret |=3D CPSR_I; + } } else { if (cs->interrupt_request & CPU_INTERRUPT_HARD) { ret |=3D CPSR_I; } + + if (cs->interrupt_request & CPU_INTERRUPT_NMI) { + ret |=3D ISR_IS; + ret |=3D CPSR_I; + } } =20 if (hcr_el2 & HCR_FMO) { if (cs->interrupt_request & CPU_INTERRUPT_VFIQ) { ret |=3D CPSR_F; } + if (cs->interrupt_request & CPU_INTERRUPT_VFNMI) { + ret |=3D ISR_FS; + ret |=3D CPSR_F; + } } else { if (cs->interrupt_request & CPU_INTERRUPT_FIQ) { ret |=3D CPSR_F; --=20 2.34.1