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Tue, 19 Mar 2024 08:43:54 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Anton Johansson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-9.1 09/27] target/hppa: Convert to TCGCPUOps::get_cpu_state() Date: Tue, 19 Mar 2024 16:42:38 +0100 Message-ID: <20240319154258.71206-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240319154258.71206-1-philmd@linaro.org> References: <20240319154258.71206-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=philmd@linaro.org; helo=mail-lf1-x133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1710863398563100005 Convert cpu_get_tb_cpu_state() to TCGCPUOps::get_cpu_state(). Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/hppa/cpu.h | 44 -------------------------------------------- target/hppa/cpu.c | 43 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+), 44 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index cdb2904936..9bc54124c1 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -314,50 +314,6 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr); #define TB_FLAG_PRIV_SHIFT 8 #define TB_FLAG_UNALIGN 0x400 =20 -#define TARGET_HAS_CPU_GET_TB_CPU_STATE - -static inline void cpu_get_tb_cpu_state(CPUHPPAState *env, vaddr *pc, - uint64_t *cs_base, uint32_t *pflag= s) -{ - uint32_t flags =3D env->psw_n * PSW_N; - - /* TB lookup assumes that PC contains the complete virtual address. - If we leave space+offset separate, we'll get ITLB misses to an - incomplete virtual address. This also means that we must separate - out current cpu privilege from the low bits of IAOQ_F. */ -#ifdef CONFIG_USER_ONLY - *pc =3D env->iaoq_f & -4; - *cs_base =3D env->iaoq_b & -4; - flags |=3D TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus; -#else - /* ??? E, T, H, L, B bits need to be here, when implemented. */ - flags |=3D env->psw & (PSW_W | PSW_C | PSW_D | PSW_P); - flags |=3D (env->iaoq_f & 3) << TB_FLAG_PRIV_SHIFT; - - *pc =3D hppa_form_gva_psw(env->psw, (env->psw & PSW_C ? env->iasq_f : = 0), - env->iaoq_f & -4); - *cs_base =3D env->iasq_f; - - /* Insert a difference between IAOQ_B and IAOQ_F within the otherwise = zero - low 32-bits of CS_BASE. This will succeed for all direct branches, - which is the primary case we care about -- using goto_tb within a p= age. - Failure is indicated by a zero difference. */ - if (env->iasq_f =3D=3D env->iasq_b) { - target_long diff =3D env->iaoq_b - env->iaoq_f; - if (diff =3D=3D (int32_t)diff) { - *cs_base |=3D (uint32_t)diff; - } - } - if ((env->sr[4] =3D=3D env->sr[5]) - & (env->sr[4] =3D=3D env->sr[6]) - & (env->sr[4] =3D=3D env->sr[7])) { - flags |=3D TB_FLAG_SR_SAME; - } -#endif - - *pflags =3D flags; -} - target_ulong cpu_hppa_get_psw(CPUHPPAState *env); void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong); void cpu_hppa_loaded_fr0(CPUHPPAState *env); diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 3831cb6db2..f2dc1e79e9 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -89,6 +89,48 @@ static void hppa_restore_state_to_opc(CPUState *cs, cpu->env.psw_n =3D 0; } =20 +static void hppa_get_cpu_state(CPUHPPAState *env, vaddr *pc, + uint64_t *cs_base, uint32_t *pflags) +{ + uint32_t flags =3D env->psw_n * PSW_N; + + /* TB lookup assumes that PC contains the complete virtual address. + If we leave space+offset separate, we'll get ITLB misses to an + incomplete virtual address. This also means that we must separate + out current cpu privilege from the low bits of IAOQ_F. */ +#ifdef CONFIG_USER_ONLY + *pc =3D env->iaoq_f & -4; + *cs_base =3D env->iaoq_b & -4; + flags |=3D TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus; +#else + /* ??? E, T, H, L, B bits need to be here, when implemented. */ + flags |=3D env->psw & (PSW_W | PSW_C | PSW_D | PSW_P); + flags |=3D (env->iaoq_f & 3) << TB_FLAG_PRIV_SHIFT; + + *pc =3D hppa_form_gva_psw(env->psw, (env->psw & PSW_C ? env->iasq_f : = 0), + env->iaoq_f & -4); + *cs_base =3D env->iasq_f; + + /* Insert a difference between IAOQ_B and IAOQ_F within the otherwise = zero + low 32-bits of CS_BASE. This will succeed for all direct branches, + which is the primary case we care about -- using goto_tb within a p= age. + Failure is indicated by a zero difference. */ + if (env->iasq_f =3D=3D env->iasq_b) { + target_long diff =3D env->iaoq_b - env->iaoq_f; + if (diff =3D=3D (int32_t)diff) { + *cs_base |=3D (uint32_t)diff; + } + } + if ((env->sr[4] =3D=3D env->sr[5]) + & (env->sr[4] =3D=3D env->sr[6]) + & (env->sr[4] =3D=3D env->sr[7])) { + flags |=3D TB_FLAG_SR_SAME; + } +#endif + + *pflags =3D flags; +} + static bool hppa_cpu_has_work(CPUState *cs) { return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI= ); @@ -186,6 +228,7 @@ static const TCGCPUOps hppa_tcg_ops =3D { .initialize =3D hppa_translate_init, .synchronize_from_tb =3D hppa_cpu_synchronize_from_tb, .restore_state_to_opc =3D hppa_restore_state_to_opc, + .get_cpu_state =3D hppa_get_cpu_state, =20 #ifndef CONFIG_USER_ONLY .tlb_fill =3D hppa_cpu_tlb_fill, --=20 2.41.0