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Mon, 11 Mar 2024 11:52:14 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora Subject: [PATCH 02/13] target/ppc: POWER10 does not have transactional memory Date: Tue, 12 Mar 2024 04:51:44 +1000 Message-ID: <20240311185200.2185753-3-npiggin@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240311185200.2185753-1-npiggin@gmail.com> References: <20240311185200.2185753-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1710183256029100001 Content-Type: text/plain; charset="utf-8" POWER10 hardware implements a degenerate transactional memory facility in POWER8/9 PCR compatibility modes to permit migration from older CPUs, but POWER10 / ISA v3.1 mode does not support it so the CPU model should not support it. Signed-off-by: Nicholas Piggin Reviewed-by: Harsh Prateek Bora --- target/ppc/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 572cbdf25f..d7e84a2f40 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6573,7 +6573,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310 | + PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310 | PPC2_MEM_LWSYNC | PPC2_BCDA_ISA206; pcc->msr_mask =3D (1ull << MSR_SF) | (1ull << MSR_HV) | @@ -6617,7 +6617,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) pcc->flags =3D POWERPC_FLAG_VRE | POWERPC_FLAG_SE | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK | POWERPC_FLAG_CFAR | - POWERPC_FLAG_VSX | POWERPC_FLAG_TM | POWERPC_FLAG_SCV; + POWERPC_FLAG_VSX | POWERPC_FLAG_SCV; pcc->l1_dcache_size =3D 0x8000; pcc->l1_icache_size =3D 0x8000; } --=20 2.42.0