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Mon, 11 Mar 2024 11:52:43 -0700 (PDT) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , qemu-devel@nongnu.org, Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora Subject: [PATCH 10/13] spapr: set MSR[ME] and MSR[FP] on client entry Date: Tue, 12 Mar 2024 04:51:52 +1000 Message-ID: <20240311185200.2185753-11-npiggin@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240311185200.2185753-1-npiggin@gmail.com> References: <20240311185200.2185753-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1710183312170100002 Content-Type: text/plain; charset="utf-8" The initial MSR state for PAPR specifies MSR[ME] and MSR[FP] are set. Signed-off-by: Nicholas Piggin Reviewed-by: Harsh Prateek Bora --- hw/ppc/spapr_cpu_core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 50523ead25..f3b01b0801 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -42,6 +42,8 @@ static void spapr_reset_vcpu(PowerPCCPU *cpu) * as 32bit (MSR_SF=3D0) in "8.2.1. Initial Register Values". */ env->msr &=3D ~(1ULL << MSR_SF); + env->msr |=3D (1ULL << MSR_ME) | (1ULL << MSR_FP); + env->spr[SPR_HIOR] =3D 0; =20 lpcr =3D env->spr[SPR_LPCR]; --=20 2.42.0