From nobody Tue Nov 26 06:37:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1709697823; cv=none; d=zohomail.com; s=zohoarc; b=T1MragDTrQEcJ+NRpbjcBRsVcj64yNmVw/itQMnk2w/jws9aGopS8QyEmUguWvqTnGf6j5sw6trN5b8ITNSosA+I5br7iup7kHjPTh7OCL85iOSeegYWCjx1BEYkwNQf5vGuE4tCwNPnIGQEdTILyVk+AugHpKQ/jhHs8y1OGJM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1709697823; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=zAV8RlXbi69zrXtiow4CreyXgoNVEwvQdXsW6ZPaiMs=; b=PiT23mQP2enTTo/vwiJ1G6d+5wdOt/cV0o239MtoDBdnQjEDqKd0T+lh5QpKkzLYRa+Oeh9ChJ0fg/FPXzgskETmBgEN/E51Qwbf2duOMriSRkRi/vxsFZ+XvrNWltMMTNorhz2t8dDmvfZ5VZsCgqo9yppwQPIgb1pQ8Fj70t8= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1709697823471712.2759783894728; Tue, 5 Mar 2024 20:03:43 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rhiQR-0000pK-37; Tue, 05 Mar 2024 22:58:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rhiQQ-0000ow-2q; Tue, 05 Mar 2024 22:58:38 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rhiQO-0006kw-Ef; Tue, 05 Mar 2024 22:58:37 -0500 Received: from mail.maildlp.com (unknown [172.19.88.163]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4TqJWd1Zwtz1h1FS; Wed, 6 Mar 2024 11:56:13 +0800 (CST) Received: from kwepemi500008.china.huawei.com (unknown [7.221.188.139]) by mail.maildlp.com (Postfix) with ESMTPS id DF1A118001B; Wed, 6 Mar 2024 11:58:33 +0800 (CST) Received: from huawei.com (10.67.174.55) by kwepemi500008.china.huawei.com (7.221.188.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Wed, 6 Mar 2024 11:58:33 +0800 To: , , , , , , CC: Subject: [RFC PATCH v7 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI Date: Wed, 6 Mar 2024 03:57:06 +0000 Message-ID: <20240306035721.2333531-9-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240306035721.2333531-1-ruanjinjie@huawei.com> References: <20240306035721.2333531-1-ruanjinjie@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.67.174.55] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To kwepemi500008.china.huawei.com (7.221.188.139) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.191; envelope-from=ruanjinjie@huawei.com; helo=szxga05-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jinjie Ruan From: Jinjie Ruan via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1709697823963100004 Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI or CPU_INTERRUPT_VNMI, both CPSR_I and ISR_IS must be set. With CPU_INTERRUPT_VFIQ and HCRX_EL2.VFNMI set, both CPSR_F and ISR_FS must be s= et. Signed-off-by: Jinjie Ruan Reviewed-by: Richard Henderson --- v7: - env->cp15.hcrx_el2 -> arm_hcrx_el2_eff(). - Add Reviewed-by. v6: - Verify that HCR_EL2.VF is set before checking VFNMI. v4=EF=BC=9B - Also handle VNMI. v3: - CPU_INTERRUPT_NMI do not set FIQ, so remove it. - With CPU_INTERRUPT_NMI, both CPSR_I and ISR_IS must be set. --- target/arm/cpu.h | 2 ++ target/arm/helper.c | 14 ++++++++++++++ 2 files changed, 16 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index de9446c68c..97f276559f 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1467,6 +1467,8 @@ FIELD(CPTR_EL3, TCPAC, 31, 1) #define CPSR_N (1U << 31) #define CPSR_NZCV (CPSR_N | CPSR_Z | CPSR_C | CPSR_V) #define CPSR_AIF (CPSR_A | CPSR_I | CPSR_F) +#define ISR_FS (1U << 9) +#define ISR_IS (1U << 10) =20 #define CPSR_IT (CPSR_IT_0_1 | CPSR_IT_2_7) #define CACHED_CPSR_BITS (CPSR_T | CPSR_AIF | CPSR_GE | CPSR_IT | CPSR_Q \ diff --git a/target/arm/helper.c b/target/arm/helper.c index 7cdc90e9e3..15f72fa425 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2018,15 +2018,29 @@ static uint64_t isr_read(CPUARMState *env, const AR= MCPRegInfo *ri) if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { ret |=3D CPSR_I; } + if (cs->interrupt_request & CPU_INTERRUPT_VNMI) { + ret |=3D ISR_IS; + ret |=3D CPSR_I; + } } else { if (cs->interrupt_request & CPU_INTERRUPT_HARD) { ret |=3D CPSR_I; } + + if (cs->interrupt_request & CPU_INTERRUPT_NMI) { + ret |=3D ISR_IS; + ret |=3D CPSR_I; + } } =20 if (hcr_el2 & HCR_FMO) { if (cs->interrupt_request & CPU_INTERRUPT_VFIQ) { ret |=3D CPSR_F; + + if ((arm_hcr_el2_eff(env) & HCR_VF) && + (arm_hcrx_el2_eff(env) & HCRX_VFNMI)) { + ret |=3D ISR_FS; + } } } else { if (cs->interrupt_request & CPU_INTERRUPT_FIQ) { --=20 2.34.1