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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1709356648942100008 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/sparc/translate.c | 33 ++++++++++++++++++++++++++++++--- target/sparc/insns.decode | 1 + 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 77b53cbf3b..8e67d9023d 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -818,7 +818,8 @@ static void gen_op_fpsubs32s(TCGv_i32 d, TCGv_i32 src1,= TCGv_i32 src2) tcg_gen_movcond_i32(TCG_COND_LT, d, v, z, t, r); } =20 -static void gen_op_faligndata(TCGv_i64 dst, TCGv_i64 s1, TCGv_i64 s2) +static void gen_op_faligndata_i(TCGv_i64 dst, TCGv_i64 s1, + TCGv_i64 s2, TCGv gsr) { #ifdef TARGET_SPARC64 TCGv t1, t2, shift; @@ -827,7 +828,7 @@ static void gen_op_faligndata(TCGv_i64 dst, TCGv_i64 s1= , TCGv_i64 s2) t2 =3D tcg_temp_new(); shift =3D tcg_temp_new(); =20 - tcg_gen_andi_tl(shift, cpu_gsr, 7); + tcg_gen_andi_tl(shift, gsr, 7); tcg_gen_shli_tl(shift, shift, 3); tcg_gen_shl_tl(t1, s1, shift); =20 @@ -845,6 +846,11 @@ static void gen_op_faligndata(TCGv_i64 dst, TCGv_i64 s= 1, TCGv_i64 s2) #endif } =20 +static void gen_op_faligndata_g(TCGv_i64 dst, TCGv_i64 s1, TCGv_i64 s2) +{ + gen_op_faligndata_i(dst, s1, s2, cpu_gsr); +} + static void gen_op_bshuffle(TCGv_i64 dst, TCGv_i64 src1, TCGv_i64 src2) { #ifdef TARGET_SPARC64 @@ -5060,7 +5066,7 @@ TRANS(FORNOTd, VIS1, do_ddd, a, tcg_gen_orc_i64) TRANS(FORd, VIS1, do_ddd, a, tcg_gen_or_i64) =20 TRANS(FPACK32, VIS1, do_ddd, a, gen_op_fpack32) -TRANS(FALIGNDATAg, VIS1, do_ddd, a, gen_op_faligndata) +TRANS(FALIGNDATAg, VIS1, do_ddd, a, gen_op_faligndata_g) TRANS(BSHUFFLE, VIS2, do_ddd, a, gen_op_bshuffle) =20 TRANS(FHADDd, VIS3, do_ddd, a, gen_op_fhaddd) @@ -5221,6 +5227,27 @@ TRANS(FNMADDd, FMAF, do_dddd, a, gen_op_fnmaddd) TRANS(FPMADDX, IMA, do_dddd, a, gen_op_fpmaddx) TRANS(FPMADDXHI, IMA, do_dddd, a, gen_op_fpmaddxhi) =20 +static bool trans_FALIGNDATAi(DisasContext *dc, arg_r_r_r *a) +{ + TCGv_i64 dst, src1, src2; + TCGv src3; + + if (!avail_VIS4(dc)) { + return false; + } + if (gen_trap_ifnofpu(dc)) { + return true; + } + + dst =3D tcg_temp_new_i64(); + src1 =3D gen_load_fpr_D(dc, a->rd); + src2 =3D gen_load_fpr_D(dc, a->rs2); + src3 =3D gen_load_gpr(dc, a->rs1); + gen_op_faligndata_i(dst, src1, src2, src3); + gen_store_fpr_D(dc, a->rd, dst); + return advance_pc(dc); +} + static bool do_env_qqq(DisasContext *dc, arg_r_r_r *a, void (*func)(TCGv_i128, TCGv_env, TCGv_i128, TCGv_i= 128)) { diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index 56a82123a9..7833437f6c 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -446,6 +446,7 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 .....= \ FPMERGE 10 ..... 110110 ..... 0 0100 1011 ..... @d_r_r BSHUFFLE 10 ..... 110110 ..... 0 0100 1100 ..... @d_d_d FEXPAND 10 ..... 110110 00000 0 0100 1101 ..... @r_d2 + FALIGNDATAi 10 ..... 110110 ..... 0 0100 1001 ..... @d_r_d =20 FSRCd 10 ..... 110110 ..... 0 0111 0100 00000 @d_d1 # FSRC1d FSRCs 10 ..... 110110 ..... 0 0111 0101 00000 @r_r1 # FSRC1s --=20 2.34.1