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Wed, 28 Feb 2024 03:57:16 -0800 (PST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Akihiko Odaki , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Peter Maydell , Nicholas Piggin , Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , qemu-arm@nongnu.org (open list:ARM TCG CPUs), qemu-ppc@nongnu.org (open list:PowerPC TCG CPUs), qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Subject: [PULL 13/29] hw/core/cpu: Remove gdb_get_dynamic_xml member Date: Wed, 28 Feb 2024 11:56:45 +0000 Message-Id: <20240228115701.1416107-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240228115701.1416107-1-alex.bennee@linaro.org> References: <20240228115701.1416107-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1709121714703100001 From: Akihiko Odaki This function is no longer used. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Benn=C3=A9e Message-Id: <20231213-gdb-v17-9-777047380591@daynix.com> Signed-off-by: Alex Benn=C3=A9e Message-Id: <20240227144335.1196131-14-alex.bennee@linaro.org> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1bbf21b2201..4b659799b00 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -133,9 +133,6 @@ struct SysemuCPUOps; * before the insn which triggers a watchpoint rather than after= it. * @gdb_arch_name: Optional callback that returns the architecture name kn= own * to GDB. The caller must free the returned string with g_free. - * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for = the - * gdb stub. Returns a pointer to the XML contents for the specified XML= file - * or NULL if the CPU doesn't have a dynamically generated content for i= t. * @disas_set_info: Setup architecture specific components of disassembly = info * @adjust_watchpoint_address: Perform a target-specific adjustment to an * address before attempting to match it against watchpoints. @@ -167,7 +164,6 @@ struct CPUClass { =20 const char *gdb_core_xml_file; const gchar * (*gdb_arch_name)(CPUState *cpu); - const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname= ); =20 void (*disas_set_info)(CPUState *cpu, disassemble_info *info); =20 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 508a9c1e0d6..a5b3d8f7da7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1159,12 +1159,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *c= pu, vaddr addr, int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); =20 -/* Returns the dynamically generated XML for the gdb stub. - * Returns a pointer to the XML contents for the specified XML file or NULL - * if the XML name doesn't match the predefined one. - */ -const char *arm_gdb_get_dynamic_xml(CPUState *cpu, const char *xmlname); - int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, DumpState *s); int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c66989a5e60..0133da4e079 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1545,7 +1545,6 @@ int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t= *buf, int reg); int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg); #ifndef CONFIG_USER_ONLY hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name); #endif int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, DumpState *s); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 84887084d95..b2ea5d65132 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2516,7 +2516,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void = *data) cc->sysemu_ops =3D &arm_sysemu_ops; #endif cc->gdb_arch_name =3D arm_gdb_arch_name; - cc->gdb_get_dynamic_xml =3D arm_gdb_get_dynamic_xml; cc->gdb_stop_before_watchpoint =3D true; cc->disas_set_info =3D arm_disas_set_info; =20 diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 059d84f98e5..a3bb73cfa7c 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -474,24 +474,6 @@ static GDBFeature *arm_gen_dynamic_m_secextreg_feature= (CPUState *cs, #endif #endif /* CONFIG_TCG */ =20 -const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) -{ - ARMCPU *cpu =3D ARM_CPU(cs); - - if (strcmp(xmlname, "system-registers.xml") =3D=3D 0) { - return cpu->dyn_sysreg_feature.desc.xml; - } else if (strcmp(xmlname, "sve-registers.xml") =3D=3D 0) { - return cpu->dyn_svereg_feature.desc.xml; - } else if (strcmp(xmlname, "arm-m-system.xml") =3D=3D 0) { - return cpu->dyn_m_systemreg_feature.desc.xml; -#ifndef CONFIG_USER_ONLY - } else if (strcmp(xmlname, "arm-m-secext.xml") =3D=3D 0) { - return cpu->dyn_m_secextreg_feature.desc.xml; -#endif - } - return NULL; -} - void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) { CPUState *cs =3D CPU(cpu); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 5f0ecf443d8..1d3d1db7c31 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7385,9 +7385,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void = *data) #endif =20 cc->gdb_num_core_regs =3D 71; -#ifndef CONFIG_USER_ONLY - cc->gdb_get_dynamic_xml =3D ppc_gdb_get_dynamic_xml; -#endif #ifdef USE_APPLE_GDB cc->gdb_read_register =3D ppc_cpu_gdb_read_register_apple; cc->gdb_write_register =3D ppc_cpu_gdb_write_register_apple; diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 43f61130c5f..122ea9d0c00 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -342,16 +342,6 @@ static void gdb_gen_spr_feature(CPUState *cs) =20 gdb_feature_builder_end(&builder); } - -const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name) -{ - PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cs); - - if (strcmp(xml_name, "power-spr.xml") =3D=3D 0) { - return pcc->gdb_spr.xml; - } - return NULL; -} #endif =20 #if !defined(CONFIG_USER_ONLY) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index dd8a0e94897..5ff0192c527 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2300,19 +2300,6 @@ static const gchar *riscv_gdb_arch_name(CPUState *cs) } } =20 -static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xml= name) -{ - RISCVCPU *cpu =3D RISCV_CPU(cs); - - if (strcmp(xmlname, "riscv-csr.xml") =3D=3D 0) { - return cpu->dyn_csr_feature.xml; - } else if (strcmp(xmlname, "riscv-vector.xml") =3D=3D 0) { - return cpu->dyn_vreg_feature.xml; - } - - return NULL; -} - #ifndef CONFIG_USER_ONLY static int64_t riscv_get_arch_id(CPUState *cs) { @@ -2359,7 +2346,6 @@ static void riscv_cpu_common_class_init(ObjectClass *= c, void *data) cc->get_arch_id =3D riscv_get_arch_id; #endif cc->gdb_arch_name =3D riscv_gdb_arch_name; - cc->gdb_get_dynamic_xml =3D riscv_gdb_get_dynamic_xml; =20 device_class_set_props(dc, riscv_cpu_properties); } --=20 2.39.2