From nobody Tue Nov 26 09:37:43 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1709112875; cv=none; d=zohomail.com; s=zohoarc; b=S/pX0EcMBcYp4OaCyGYXQKzOM38bTBAsWbshv6wnQM6b21ANMjkdgqSxOUMlngEnoBzdq1a0Flz/wc2NsI7UrfCGufB+RxYT3iG6mIhom/sKhPEPfTWsONwOWUyQmrveEby5TVKXsxALyShR7ry0UzQ1Bwo/uVJu5gcCB/SXsIU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1709112875; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=Z3EdLF9clAp9tSpaJE+9Jj3JRxyPU2DQSDQvQP1UcVI=; b=NYAYQIzdPovMwYpw60qWH1SSd15ORWQUPYO5AUuoSMpXLtKyFEC4/6iOSS/Gmjsczvv7Vx8T94tMSgQwLB/7tkOreCY+FRrtYNULT6swpugmh2soBi+F/t5R4+Yst0AfSBGyssgaC0PhE5dwQv4KBbjo7e5kUroKRAXOtutvxmk= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1709112875915407.0614196741924; Wed, 28 Feb 2024 01:34:35 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rfGHX-00018j-Sw; Wed, 28 Feb 2024 04:31:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rfGHK-000111-Sl; Wed, 28 Feb 2024 04:31:07 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rfGHI-0001Sa-FS; Wed, 28 Feb 2024 04:31:06 -0500 Received: from mail.maildlp.com (unknown [172.19.163.44]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4Tl8DN4YWPz1Q9PF; Wed, 28 Feb 2024 17:28:36 +0800 (CST) Received: from kwepemi500008.china.huawei.com (unknown [7.221.188.139]) by mail.maildlp.com (Postfix) with ESMTPS id E52D01402CC; Wed, 28 Feb 2024 17:30:51 +0800 (CST) Received: from huawei.com (10.67.174.55) by kwepemi500008.china.huawei.com (7.221.188.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Wed, 28 Feb 2024 17:30:51 +0800 To: , , , , , , CC: Subject: [RFC PATCH v4 02/22] target/arm: Add PSTATE.ALLINT Date: Wed, 28 Feb 2024 09:29:26 +0000 Message-ID: <20240228092946.1768728-3-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228092946.1768728-1-ruanjinjie@huawei.com> References: <20240228092946.1768728-1-ruanjinjie@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.67.174.55] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500008.china.huawei.com (7.221.188.139) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.35; envelope-from=ruanjinjie@huawei.com; helo=szxga07-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jinjie Ruan From: Jinjie Ruan via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1709112877940100009 Content-Type: text/plain; charset="utf-8" When PSTATE.ALLINT is set, an IRQ or FIQ interrupt that is targeted to ELx, with or without superpriority is masked. As Richard suggested, place ALLINT bit in PSTATE in env->pstate. With the change to pstate_read/write, exception entry and return are automatically handled. Signed-off-by: Jinjie Ruan Reviewed-by: Richard Henderson --- v4: - Keep PSTATE.ALLINT in env->pstate but not env->allint. - Update the commit message. v3: - Remove ALLINT dump in aarch64_cpu_dump_state(). - Update the commit message. --- target/arm/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 63f31e0d98..d6c3f8a935 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -224,6 +224,7 @@ typedef struct CPUArchState { * semantics as for AArch32, as described in the comments on each f= ield) * nRW (also known as M[4]) is kept, inverted, in env->aarch64 * DAIF (exception masks) are kept in env->daif + * ALLINT (all IRQ or FIQ interrupts masks) are kept in env->pstate * BTYPE is kept in env->btype * SM and ZA are kept in env->svcr * all other bits are stored in their correct places in env->pstate @@ -1543,6 +1544,7 @@ FIELD(VTCR, SL2, 33, 1) #define PSTATE_D (1U << 9) #define PSTATE_BTYPE (3U << 10) #define PSTATE_SSBS (1U << 12) +#define PSTATE_ALLINT (1U << 13) #define PSTATE_IL (1U << 20) #define PSTATE_SS (1U << 21) #define PSTATE_PAN (1U << 22) --=20 2.34.1