From nobody Tue Nov 26 09:49:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1709112725; cv=none; d=zohomail.com; s=zohoarc; b=jqoQaNOv235uPRxZybXWuid4aq4dE+k6355pOjrOq7DCPk4p+yxe/AA+ONQlnUnzniiW9pt4/MdZLuPNNUlZo5xuwwETQy2Gm/Ob7yVbxCSp5d4+01kAbX1vU+MF2H428nEM7D4Z0Gd0oHD0YQEzXY7P8C9/1XoR75um115iHgk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1709112725; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=o7ZGcGJxdVQIY0D33zNlz53xzmhWoTCMIxEgZDwaG+g=; b=M0Hgbbt6PAPt8rjHC5gc+4qM8y8NDA80inG9+bEtElTHy+xKyd8xtxHMaM18xMnq3S4rv816hTz+JHJ11qCeUniLLPt0bX8zGm4kAmR1QkuxXD8nnJuwe5//hws68jbldPrgo5IwdqYIp4TZB6jPuP/68f4g/p0JPZ1OMKHP+bI= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1709112725293411.65746063793654; Wed, 28 Feb 2024 01:32:05 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rfGHf-0001Jv-Sh; Wed, 28 Feb 2024 04:31:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rfGHT-00015g-IA; Wed, 28 Feb 2024 04:31:17 -0500 Received: from szxga08-in.huawei.com ([45.249.212.255]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rfGHR-0001tD-4E; Wed, 28 Feb 2024 04:31:15 -0500 Received: from mail.maildlp.com (unknown [172.19.163.252]) by szxga08-in.huawei.com (SkyGuard) with ESMTP id 4Tl8FD5V7Tz1Q99L; Wed, 28 Feb 2024 17:29:20 +0800 (CST) Received: from kwepemi500008.china.huawei.com (unknown [7.221.188.139]) by mail.maildlp.com (Postfix) with ESMTPS id 38F0B18005C; Wed, 28 Feb 2024 17:31:09 +0800 (CST) Received: from huawei.com (10.67.174.55) by kwepemi500008.china.huawei.com (7.221.188.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Wed, 28 Feb 2024 17:31:05 +0800 To: , , , , , , CC: Subject: [RFC PATCH v4 18/22] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Date: Wed, 28 Feb 2024 09:29:42 +0000 Message-ID: <20240228092946.1768728-19-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240228092946.1768728-1-ruanjinjie@huawei.com> References: <20240228092946.1768728-1-ruanjinjie@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.67.174.55] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To kwepemi500008.china.huawei.com (7.221.188.139) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=45.249.212.255; envelope-from=ruanjinjie@huawei.com; helo=szxga08-in.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jinjie Ruan From: Jinjie Ruan via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1709112727717100009 Content-Type: text/plain; charset="utf-8" If GICD_CTLR_DS bit is zero and the NMI is non-secure, the NMI prioirty is higher than 0x80, otherwise it is higher than 0x0. And save NMI super prioirty information in hppi.superprio to deliver NMI exception. Since both GICR and GICD can deliver NMI, it is both necessary to check whether the pending irq is NMI in gicv3_redist_update_noirqset and gicv3_update_noirqset. And In irqbetter(), only a non-NMI with the same priority and a smaller interrupt number can be preempted but not NMI. Signed-off-by: Jinjie Ruan --- v4: - Replace is_nmi with has_superprio to not a mix NMI and superpriority. - Update the comment in irqbetter(). - Extract gicv3_get_priority() to avoid code repeat. --- v3: - Add missing brace --- hw/intc/arm_gicv3.c | 71 ++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 63 insertions(+), 8 deletions(-) diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c index 0b8f79a122..1d16a53b23 100644 --- a/hw/intc/arm_gicv3.c +++ b/hw/intc/arm_gicv3.c @@ -21,7 +21,8 @@ #include "hw/intc/arm_gicv3.h" #include "gicv3_internal.h" =20 -static bool irqbetter(GICv3CPUState *cs, int irq, uint8_t prio) +static bool irqbetter(GICv3CPUState *cs, int irq, uint8_t prio, + bool has_superprio) { /* Return true if this IRQ at this priority should take * precedence over the current recorded highest priority @@ -33,11 +34,24 @@ static bool irqbetter(GICv3CPUState *cs, int irq, uint8= _t prio) if (prio < cs->hppi.prio) { return true; } + + /* + * Current highest prioirity pending interrupt is an IRQ without + * superpriority, the new IRQ with superpriority has same priority + * should signal to the CPU as it have the priority higher than + * the labelled 0x80 or 0x00. + */ + if (prio =3D=3D cs->hppi.prio && !cs->hppi.superprio && has_superprio)= { + return true; + } + /* If multiple pending interrupts have the same priority then it is an * IMPDEF choice which of them to signal to the CPU. We choose to - * signal the one with the lowest interrupt number. + * signal the one with the lowest interrupt number if they don't have + * superpriority. */ - if (prio =3D=3D cs->hppi.prio && irq <=3D cs->hppi.irq) { + if (prio =3D=3D cs->hppi.prio && !cs->hppi.superprio && + !has_superprio && irq <=3D cs->hppi.irq) { return true; } return false; @@ -129,6 +143,35 @@ static uint32_t gicr_int_pending(GICv3CPUState *cs) return pend; } =20 +static bool gicv3_get_priority(GICv3CPUState *cs, bool is_redist, + uint32_t superprio, uint8_t *prio, int irq) +{ + bool has_superprio =3D false; + + if (superprio) { + has_superprio =3D true; + + /* DS =3D 0 & Non-secure NMI */ + if (!(cs->gic->gicd_ctlr & GICD_CTLR_DS) && + ((is_redist && extract32(cs->gicr_igroupr0, irq, 1)) || + (!is_redist && gicv3_gicd_group_test(cs->gic, irq)))) { + *prio =3D 0x80; + } else { + *prio =3D 0x0; + } + } else { + has_superprio =3D false; + + if (is_redist) { + *prio =3D cs->gicr_ipriorityr[irq]; + } else { + *prio =3D cs->gic->gicd_ipriority[irq]; + } + } + + return has_superprio; +} + /* Update the interrupt status after state in a redistributor * or CPU interface has changed, but don't tell the CPU i/f. */ @@ -141,6 +184,8 @@ static void gicv3_redist_update_noirqset(GICv3CPUState = *cs) uint8_t prio; int i; uint32_t pend; + uint32_t superprio =3D 0; + bool has_superprio =3D false; =20 /* Find out which redistributor interrupts are eligible to be * signaled to the CPU interface. @@ -152,10 +197,13 @@ static void gicv3_redist_update_noirqset(GICv3CPUStat= e *cs) if (!(pend & (1 << i))) { continue; } - prio =3D cs->gicr_ipriorityr[i]; - if (irqbetter(cs, i, prio)) { + superprio =3D extract32(cs->gicr_isuperprio, i, 1); + has_superprio =3D gicv3_get_priority(cs, true, superprio, &pri= o, i); + + if (irqbetter(cs, i, prio, has_superprio)) { cs->hppi.irq =3D i; cs->hppi.prio =3D prio; + cs->hppi.superprio =3D has_superprio; seenbetter =3D true; } } @@ -168,7 +216,7 @@ static void gicv3_redist_update_noirqset(GICv3CPUState = *cs) if ((cs->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) && cs->gic->lpi_enable && (cs->gic->gicd_ctlr & GICD_CTLR_EN_GRP1NS) && (cs->hpplpi.prio !=3D 0xff)) { - if (irqbetter(cs, cs->hpplpi.irq, cs->hpplpi.prio)) { + if (irqbetter(cs, cs->hpplpi.irq, cs->hpplpi.prio, false)) { cs->hppi.irq =3D cs->hpplpi.irq; cs->hppi.prio =3D cs->hpplpi.prio; cs->hppi.grp =3D cs->hpplpi.grp; @@ -213,6 +261,8 @@ static void gicv3_update_noirqset(GICv3State *s, int st= art, int len) int i; uint8_t prio; uint32_t pend =3D 0; + uint32_t superprio =3D 0; + bool has_superprio =3D false; =20 assert(start >=3D GIC_INTERNAL); assert(len > 0); @@ -240,10 +290,15 @@ static void gicv3_update_noirqset(GICv3State *s, int = start, int len) */ continue; } - prio =3D s->gicd_ipriority[i]; - if (irqbetter(cs, i, prio)) { + + superprio =3D *gic_bmp_ptr32(s->superprio, i); + superprio =3D superprio & (1 << (i & 0x1f)); + has_superprio =3D gicv3_get_priority(cs, false, superprio, &prio, = i); + + if (irqbetter(cs, i, prio, has_superprio)) { cs->hppi.irq =3D i; cs->hppi.prio =3D prio; + cs->hppi.superprio =3D has_superprio; cs->seenbetter =3D true; } } --=20 2.34.1