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Wed, 28 Feb 2024 00:07:04 -0800 (PST) X-Google-Smtp-Source: AGHT+IFZSHbHt0TIsRSGAMsv7rhypqyj7CyxCUJLj0jvvHR0qxNOdluvwXgYZfyXgAPsBY20YDOoew== X-Received: by 2002:a05:6402:612:b0:566:1fbd:22bb with SMTP id n18-20020a056402061200b005661fbd22bbmr3741332edv.9.1709107624196; Wed, 28 Feb 2024 00:07:04 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson Subject: [PULL 02/10] target/i386: mask high bits of CR3 in 32-bit mode Date: Wed, 28 Feb 2024 09:06:38 +0100 Message-ID: <20240228080646.261365-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240228080646.261365-1-pbonzini@redhat.com> References: <20240228080646.261365-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.088, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1709107708589100001 Content-Type: text/plain; charset="utf-8" CR3 bits 63:32 are ignored in 32-bit mode (either legacy 2-level paging or PAE paging). Do this in mmu_translate() to remove the last where get_physical_address() meaningfully drops the high bits of the address. Cc: qemu-stable@nongnu.org Suggested-by: Richard Henderson Fixes: 4a1e9d4d11c ("target/i386: Use atomic operations for pte updates", 2= 022-10-18) Signed-off-by: Paolo Bonzini --- target/i386/tcg/sysemu/excp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/= excp_helper.c index 5b86f439add..11126c860d4 100644 --- a/target/i386/tcg/sysemu/excp_helper.c +++ b/target/i386/tcg/sysemu/excp_helper.c @@ -238,7 +238,7 @@ static bool mmu_translate(CPUX86State *env, const Trans= lateParams *in, /* * Page table level 3 */ - pte_addr =3D ((in->cr3 & ~0x1f) + ((addr >> 27) & 0x18)) & a20= _mask; + pte_addr =3D ((in->cr3 & 0xffffffe0ULL) + ((addr >> 27) & 0x18= )) & a20_mask; if (!ptw_translate(&pte_trans, pte_addr)) { return false; } @@ -306,7 +306,7 @@ static bool mmu_translate(CPUX86State *env, const Trans= lateParams *in, /* * Page table level 2 */ - pte_addr =3D ((in->cr3 & ~0xfff) + ((addr >> 20) & 0xffc)) & a20_m= ask; + pte_addr =3D ((in->cr3 & 0xfffff000ULL) + ((addr >> 20) & 0xffc)) = & a20_mask; if (!ptw_translate(&pte_trans, pte_addr)) { return false; } --=20 2.43.2