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Part 1 Date: Tue, 27 Feb 2024 13:33:09 +0000 Message-Id: <20240227133314.1721857-41-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227133314.1721857-1-peter.maydell@linaro.org> References: <20240227133314.1721857-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1709041488943100001 Content-Type: text/plain; charset="utf-8" From: Sergey Kambalin Signed-off-by: Sergey Kambalin Message-id: 20240226000259.2752893-37-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell Reviewed-by: Peter Maydell --- tests/qtest/bcm2838-mailbox.c | 1 - tests/qtest/bcm2838-mbox-property-test.c | 207 +++++++++++++++++++++++ tests/qtest/meson.build | 2 +- 3 files changed, 208 insertions(+), 2 deletions(-) create mode 100644 tests/qtest/bcm2838-mbox-property-test.c diff --git a/tests/qtest/bcm2838-mailbox.c b/tests/qtest/bcm2838-mailbox.c index 1efd3c628a9..0928a3dff8e 100644 --- a/tests/qtest/bcm2838-mailbox.c +++ b/tests/qtest/bcm2838-mailbox.c @@ -11,7 +11,6 @@ #include "hw/registerfields.h" #include "libqtest-single.h" #include "bcm2838-mailbox.h" -#include "hw/arm/raspberrypi-fw-defs.h" =20 REG32(MBOX_EXCHNG_REG, 0) FIELD(MBOX_EXCHNG_REG, CHANNEL, 0, 4) diff --git a/tests/qtest/bcm2838-mbox-property-test.c b/tests/qtest/bcm2838= -mbox-property-test.c new file mode 100644 index 00000000000..1361e84a988 --- /dev/null +++ b/tests/qtest/bcm2838-mbox-property-test.c @@ -0,0 +1,207 @@ +/* + * Tests set for BCM2838 mailbox property interface. + * + * Copyright (c) 2022 Auriga + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "hw/registerfields.h" +#include "libqtest-single.h" +#include "bcm2838-mailbox.h" +#include "hw/arm/raspberrypi-fw-defs.h" + +REG32(MBOX_SIZE_STAT, 0) +FIELD(MBOX_SIZE_STAT, SIZE, 0, 31) +FIELD(MBOX_SIZE_STAT, SUCCESS, 31, 1) + +REG32(SET_POWER_STATE_CMD, 0) +FIELD(SET_POWER_STATE_CMD, EN, 0, 1) +FIELD(SET_POWER_STATE_CMD, WAIT, 1, 1) + +REG32(GET_CLOCK_STATE_CMD, 0) +FIELD(GET_CLOCK_STATE_CMD, EN, 0, 1) +FIELD(GET_CLOCK_STATE_CMD, NPRES, 1, 1) + +#define MBOX_TEST_MESSAGE_ADDRESS 0x10000000 + +#define TEST_TAG(x) RPI_FWREQ_ ## x +#define TEST_TAG_TYPE(x) TAG_##x##_t + +#define TEST_FN_NAME(test, subtest) \ + test ## _ ## subtest ## _test + +#define SETUP_FN_NAME(test, subtest) \ + test ## _ ## subtest ## _setup + +#define CHECK_FN_NAME(test, subtest) \ + test ## _ ## subtest ## _spec_check + +#define DECLARE_TEST_CASE_SETUP(testname, ...) \ + void SETUP_FN_NAME(testname, __VA_ARGS__) \ + (TEST_TAG_TYPE(testname) * tag) + +/*------------------------------------------------------------------------= ----*/ +#define DECLARE_TEST_CASE(testname, ...) = \ + __attribute__((weak)) = \ + void SETUP_FN_NAME(testname, __VA_ARGS__) = \ + (TEST_TAG_TYPE(testname) * tag); = \ + static void CHECK_FN_NAME(testname, __VA_ARGS__) = \ + (TEST_TAG_TYPE(testname) *tag); = \ + static void TEST_FN_NAME(testname, __VA_ARGS__)(void) { = \ + struct { = \ + MboxBufHeader header; = \ + TEST_TAG_TYPE(testname) tag; = \ + uint32_t end_tag; = \ + } mailbox_buffer =3D { 0 }; = \ + = \ + QTestState *qts =3D qtest_init("-machine raspi4b"); = \ + = \ + mailbox_buffer.header.size =3D sizeof(mailbox_buffer); = \ + mailbox_buffer.header.req_resp_code =3D MBOX_PROCESS_REQUEST; = \ + = \ + mailbox_buffer.tag.id =3D TEST_TAG(testname); = \ + mailbox_buffer.tag.value_buffer_size =3D MAX( = \ + sizeof(mailbox_buffer.tag.request.value), = \ + sizeof(mailbox_buffer.tag.response.value)); = \ + mailbox_buffer.tag.request.zero =3D 0; = \ + = \ + mailbox_buffer.end_tag =3D RPI_FWREQ_PROPERTY_END; = \ + = \ + if (SETUP_FN_NAME(testname, __VA_ARGS__)) { = \ + SETUP_FN_NAME(testname, __VA_ARGS__)(&mailbox_buffer.tag); = \ + } = \ + = \ + qtest_memwrite(qts, MBOX_TEST_MESSAGE_ADDRESS, = \ + &mailbox_buffer, sizeof(mailbox_buffer)); = \ + qtest_mbox1_write_message(qts, MBOX_CHANNEL_ID_PROPERTY, = \ + MBOX_TEST_MESSAGE_ADDRESS); = \ + = \ + qtest_mbox0_read_message(qts, MBOX_CHANNEL_ID_PROPERTY, = \ + &mailbox_buffer, sizeof(mailbox_buffer)); = \ + = \ + g_assert_cmphex(mailbox_buffer.header.req_resp_code, =3D=3D, MBOX_= SUCCESS);\ + = \ + g_assert_cmphex(mailbox_buffer.tag.id, =3D=3D, TEST_TAG(testname))= ; \ + = \ + uint32_t size =3D FIELD_EX32(mailbox_buffer.tag.response.size_stat= , \ + MBOX_SIZE_STAT, SIZE); = \ + uint32_t success =3D FIELD_EX32(mailbox_buffer.tag.response.size_s= tat, \ + MBOX_SIZE_STAT, SUCCESS); = \ + g_assert_cmpint(size, =3D=3D, sizeof(mailbox_buffer.tag.response.v= alue)); \ + g_assert_cmpint(success, =3D=3D, 1); = \ + = \ + CHECK_FN_NAME(testname, __VA_ARGS__)(&mailbox_buffer.tag); = \ + = \ + qtest_quit(qts); = \ + } = \ + static void CHECK_FN_NAME(testname, __VA_ARGS__) = \ + (TEST_TAG_TYPE(testname) * tag) + +/*------------------------------------------------------------------------= ----*/ + +#define QTEST_ADD_TEST_CASE(testname, ...) = \ + qtest_add_func(stringify(/bcm2838/mbox/property/ = \ + TEST_FN_NAME(testname, __VA_ARGS__)-test), = \ + TEST_FN_NAME(testname, __VA_ARGS__)) + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_FIRMWARE_REVISION) { + g_assert_cmpint(tag->response.value.revision, =3D=3D, FIRMWARE_REVISIO= N); +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_BOARD_REVISION) { + g_assert_cmpint(tag->response.value.revision, =3D=3D, BOARD_REVISION); +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_ARM_MEMORY) { + g_assert_cmphex(tag->response.value.base, =3D=3D, ARM_MEMORY_BASE); + g_assert_cmphex(tag->response.value.size, =3D=3D, ARM_MEMORY_SIZE); +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_VC_MEMORY) { + g_assert_cmphex(tag->response.value.base, =3D=3D, VC_MEMORY_BASE); + g_assert_cmphex(tag->response.value.size, =3D=3D, VC_MEMORY_SIZE); +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(SET_POWER_STATE) { + uint32_t enabled =3D + FIELD_EX32(tag->response.value.cmd, SET_POWER_STATE_CMD, EN); + uint32_t wait =3D + FIELD_EX32(tag->response.value.cmd, SET_POWER_STATE_CMD, WAIT); + g_assert_cmphex(tag->response.value.device_id, =3D=3D, DEVICE_ID_UART0= ); + g_assert_cmpint(enabled, =3D=3D, 1); + g_assert_cmpint(wait, =3D=3D, 0); +} +DECLARE_TEST_CASE_SETUP(SET_POWER_STATE) { + tag->request.value.device_id =3D DEVICE_ID_UART0; + tag->response.value.cmd =3D + FIELD_DP32(tag->response.value.cmd, SET_POWER_STATE_CMD, EN, 1); + tag->response.value.cmd =3D + FIELD_DP32(tag->response.value.cmd, SET_POWER_STATE_CMD, WAIT, 1); +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_CLOCK_STATE) { + uint32_t enabled =3D + FIELD_EX32(tag->response.value.cmd, GET_CLOCK_STATE_CMD, EN); + uint32_t not_present =3D + FIELD_EX32(tag->response.value.cmd, GET_CLOCK_STATE_CMD, NPRES); + g_assert_cmphex(tag->response.value.clock_id, =3D=3D, CLOCK_ID_CORE); + g_assert_cmphex(enabled, =3D=3D, 1); + g_assert_cmphex(not_present, =3D=3D, 0); +} +DECLARE_TEST_CASE_SETUP(GET_CLOCK_STATE) { + tag->request.value.clock_id =3D CLOCK_ID_CORE; +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_CLOCK_RATE, EMMC) { + g_assert_cmphex(tag->response.value.clock_id, =3D=3D, CLOCK_ID_EMMC); + g_assert_cmphex(tag->response.value.rate, =3D=3D, CLOCK_RATE_EMMC); +} +DECLARE_TEST_CASE_SETUP(GET_CLOCK_RATE, EMMC) { + tag->request.value.clock_id =3D CLOCK_ID_EMMC; +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_MAX_CLOCK_RATE, EMMC) { + g_assert_cmphex(tag->response.value.clock_id, =3D=3D, CLOCK_ID_EMMC); + g_assert_cmphex(tag->response.value.rate, =3D=3D, CLOCK_RATE_EMMC); +} +DECLARE_TEST_CASE_SETUP(GET_MAX_CLOCK_RATE, EMMC) { + tag->request.value.clock_id =3D CLOCK_ID_EMMC; +} + +/*------------------------------------------------------------------------= ----*/ +DECLARE_TEST_CASE(GET_MIN_CLOCK_RATE, EMMC) { + g_assert_cmphex(tag->response.value.clock_id, =3D=3D, CLOCK_ID_EMMC); + g_assert_cmphex(tag->response.value.rate, =3D=3D, CLOCK_RATE_EMMC); +} +DECLARE_TEST_CASE_SETUP(GET_MIN_CLOCK_RATE, EMMC) { + tag->request.value.clock_id =3D CLOCK_ID_EMMC; +} + +/*------------------------------------------------------------------------= ----*/ +int main(int argc, char **argv) +{ + g_test_init(&argc, &argv, NULL); + + QTEST_ADD_TEST_CASE(GET_FIRMWARE_REVISION); + QTEST_ADD_TEST_CASE(GET_BOARD_REVISION); + QTEST_ADD_TEST_CASE(GET_ARM_MEMORY); + QTEST_ADD_TEST_CASE(GET_VC_MEMORY); + QTEST_ADD_TEST_CASE(SET_POWER_STATE); + QTEST_ADD_TEST_CASE(GET_CLOCK_STATE); + QTEST_ADD_TEST_CASE(GET_CLOCK_RATE, EMMC); + QTEST_ADD_TEST_CASE(GET_MAX_CLOCK_RATE, EMMC); + QTEST_ADD_TEST_CASE(GET_MIN_CLOCK_RATE, EMMC); + + return g_test_run(); +} diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build index e49ce4f0929..194ddf35103 100644 --- a/tests/qtest/meson.build +++ b/tests/qtest/meson.build @@ -230,7 +230,7 @@ qtests_aarch64 =3D \ ['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) + = \ (config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test'= , 'fuzz-xlnx-dp-test'] : []) + \ (config_all_devices.has_key('CONFIG_XLNX_VERSAL') ? ['xlnx-canfd-test', = 'xlnx-versal-trng-test'] : []) + \ - (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test'] : [])= + \ + (config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test', 'bcm2= 838-mbox-property-test'] : []) + \ (config_all_accel.has_key('CONFIG_TCG') and = \ config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test']= : []) + \ ['arm-cpu-features', --=20 2.34.1