From nobody Tue Nov 26 08:50:07 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1709029254; cv=none; d=zohomail.com; s=zohoarc; b=O89jRJFTjs5OlAUigPFLyJwOqbF656UInO2krf00bmD+N8e59OszG+UpyBHTei6D35A9n13tVFzYLRUsz+XrxoT2c1fORC3npkwljBnezL1Aqoz4UikmIiB6AHZjb3pfc7HpZSvZqTePy3ti1g6DSwJGkoNSdzTvXHm0IIQckYE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1709029254; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=vGcbde0xGu9ceDSmJM17JxqCTU2IGzkMNDVrG2yvGkQ=; b=JwbxAQXvJjoigQ6E74dzotiWTt9VtqigL/MfI8FktyCO2UGPK5Gzr/Y1GLCcdV+dSomRnEEt+0H3w37/3j5AaQJowF6HFB5vYYhQN45p4WHwoFqq6/H0oEtkUq+FYFCMe3ZcCZb/VOAz4jjWF7sR+vc9K5uxIPH9WKYdGoBiv10= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1709029254113216.00438997515175; Tue, 27 Feb 2024 02:20:54 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reuYz-0004m4-DP; Tue, 27 Feb 2024 05:19:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reuYp-0004Rq-Jx for qemu-devel@nongnu.org; Tue, 27 Feb 2024 05:19:44 -0500 Received: from mgamail.intel.com ([192.198.163.13]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reuYm-00039H-LE for qemu-devel@nongnu.org; Tue, 27 Feb 2024 05:19:43 -0500 Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Feb 2024 02:19:33 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa010.fm.intel.com with ESMTP; 27 Feb 2024 02:19:29 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709029180; x=1740565180; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PJPFMih2ppMXNU8hF0bfjALdTNkZHH3RQgQUk5bZa78=; b=fSX9Y7ZY86voDCz7PwSGuP8T0K3f+ZRu9LktYpghTFsLfvBWqfjIbqQO e/SGxtdebui+n7w3KEM3dpF0pR/BKeFKTGuEuHJjbd94Z/VEuE5jTBhOa xrsBMIMRijs+V9jsxvHlDEjpRXGHQzZctUfCmZkmwfMt/4d/MUUfh89ay 5Gi6V27jOT5KrJq6HxYLmOF2DPlPx3vV6e3uNZ8nYQU1y4cq0frogANPp ALwBZpKdl0+xi6BsxFu/Y321W9oskrB6rdWDtWg6AkErDyEG0LTnCZ+FU 9IEOL/LnNjmDHkL/Wf55fiNblo5bi2hyfO3NMYQsUFfYlwR139y0K91bC A==; X-IronPort-AV: E=McAfee;i="6600,9927,10996"; a="6310292" X-IronPort-AV: E=Sophos;i="6.06,187,1705392000"; d="scan'208";a="6310292" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,187,1705392000"; d="scan'208";a="6954817" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Eric Blake , Markus Armbruster , Marcelo Tosatti , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Xiaoyao Li Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Babu Moger , Yongwei Ma , Zhao Liu , Robert Hoo Subject: [PATCH v9 08/21] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Date: Tue, 27 Feb 2024 18:32:18 +0800 Message-Id: <20240227103231.1556302-9-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227103231.1556302-1-zhao1.liu@linux.intel.com> References: <20240227103231.1556302-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.198.163.13; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.014, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1709029254800100010 From: Zhao Liu In cpu_x86_cpuid(), there are many variables in representing the cpu topology, e.g., topo_info, cs->nr_cores and cs->nr_threads. Since the names of cs->nr_cores/cs->nr_threads does not accurately represent its meaning, the use of cs->nr_cores/cs->nr_threads is prone to confusion and mistakes. And the structure X86CPUTopoInfo names its members clearly, thus the variable "topo_info" should be preferred. In addition, in cpu_x86_cpuid(), to uniformly use the topology variable, replace env->dies with topo_info.dies_per_pkg as well. Suggested-by: Robert Hoo Tested-by: Yongwei Ma Signed-off-by: Zhao Liu Reviewed-by: Xiaoyao Li Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- Changes since v8: * Add Philippe's reviewed-by tag. Changes since v7: * Renamed cpus_per_pkg to threads_per_pkg. (Xiaoyao) * Dropped Michael/Babu's Acked/Tested tags since the code change. * Re-added Yongwei's Tested tag For his re-testing. * Added Xiaoyao's Reviewed tag. Changes since v3: * Fixed typo. (Babu) Changes since v1: * Extracted cores_per_socket from the code block and use it as a local variable for cpu_x86_cpuid(). (Yanan) * Removed vcpus_per_socket variable and use cpus_per_pkg directly. (Yanan) * Replaced env->dies with topo_info.dies_per_pkg in cpu_x86_cpuid(). --- target/i386/cpu.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index df56c7a449c8..d115fc7002ef 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6017,11 +6017,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, uint32_t limit; uint32_t signature[3]; X86CPUTopoInfo topo_info; + uint32_t cores_per_pkg; + uint32_t threads_per_pkg; =20 topo_info.dies_per_pkg =3D env->nr_dies; topo_info.cores_per_die =3D cs->nr_cores / env->nr_dies; topo_info.threads_per_core =3D cs->nr_threads; =20 + cores_per_pkg =3D topo_info.cores_per_die * topo_info.dies_per_pkg; + threads_per_pkg =3D cores_per_pkg * topo_info.threads_per_core; + /* Calculate & apply limits for different index ranges */ if (index >=3D 0xC0000000) { limit =3D env->cpuid_xlevel2; @@ -6057,8 +6062,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, *ecx |=3D CPUID_EXT_OSXSAVE; } *edx =3D env->features[FEAT_1_EDX]; - if (cs->nr_cores * cs->nr_threads > 1) { - *ebx |=3D (cs->nr_cores * cs->nr_threads) << 16; + if (threads_per_pkg > 1) { + *ebx |=3D threads_per_pkg << 16; *edx |=3D CPUID_HT; } if (!cpu->enable_pmu) { @@ -6098,15 +6103,15 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, */ if (*eax & 31) { int host_vcpus_per_cache =3D 1 + ((*eax & 0x3FFC000) >> 14= ); - int vcpus_per_socket =3D cs->nr_cores * cs->nr_threads; - if (cs->nr_cores > 1) { + + if (cores_per_pkg > 1) { addressable_cores_width =3D apicid_pkg_offset(&topo_in= fo) - apicid_core_offset(&topo_inf= o); =20 *eax &=3D ~0xFC000000; *eax |=3D ((1 << addressable_cores_width) - 1) << 26; } - if (host_vcpus_per_cache > vcpus_per_socket) { + if (host_vcpus_per_cache > threads_per_pkg) { /* Share the cache at package level. */ addressable_threads_width =3D apicid_pkg_offset(&topo_= info); =20 @@ -6252,12 +6257,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index= , uint32_t count, switch (count) { case 0: *eax =3D apicid_core_offset(&topo_info); - *ebx =3D cs->nr_threads; + *ebx =3D topo_info.threads_per_core; *ecx |=3D CPUID_TOPOLOGY_LEVEL_SMT; break; case 1: *eax =3D apicid_pkg_offset(&topo_info); - *ebx =3D cs->nr_cores * cs->nr_threads; + *ebx =3D threads_per_pkg; *ecx |=3D CPUID_TOPOLOGY_LEVEL_CORE; break; default: @@ -6277,7 +6282,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, break; case 0x1F: /* V2 Extended Topology Enumeration Leaf */ - if (env->nr_dies < 2) { + if (topo_info.dies_per_pkg < 2) { *eax =3D *ebx =3D *ecx =3D *edx =3D 0; break; } @@ -6287,7 +6292,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, switch (count) { case 0: *eax =3D apicid_core_offset(&topo_info); - *ebx =3D cs->nr_threads; + *ebx =3D topo_info.threads_per_core; *ecx |=3D CPUID_TOPOLOGY_LEVEL_SMT; break; case 1: @@ -6297,7 +6302,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, break; case 2: *eax =3D apicid_pkg_offset(&topo_info); - *ebx =3D cs->nr_cores * cs->nr_threads; + *ebx =3D threads_per_pkg; *ecx |=3D CPUID_TOPOLOGY_LEVEL_DIE; break; default: @@ -6525,7 +6530,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, * discards multiple thread information if it is set. * So don't set it here for Intel to make Linux guests happy. */ - if (cs->nr_cores * cs->nr_threads > 1) { + if (threads_per_pkg > 1) { if (env->cpuid_vendor1 !=3D CPUID_VENDOR_INTEL_1 || env->cpuid_vendor2 !=3D CPUID_VENDOR_INTEL_2 || env->cpuid_vendor3 !=3D CPUID_VENDOR_INTEL_3) { @@ -6591,7 +6596,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, *eax |=3D (cpu_x86_virtual_addr_width(env) << 8); } *ebx =3D env->features[FEAT_8000_0008_EBX]; - if (cs->nr_cores * cs->nr_threads > 1) { + if (threads_per_pkg > 1) { /* * Bits 15:12 is "The number of bits in the initial * Core::X86::Apic::ApicId[ApicId] value that indicate @@ -6599,7 +6604,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, * Bits 7:0 is "The number of threads in the package is NC+1" */ *ecx =3D (apicid_pkg_offset(&topo_info) << 12) | - ((cs->nr_cores * cs->nr_threads) - 1); + (threads_per_pkg - 1); } else { *ecx =3D 0; } --=20 2.34.1