From nobody Tue Nov 26 09:50:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1709029254; cv=none; d=zohomail.com; s=zohoarc; b=ki9iHy3OycLGZvRFI6g7HswklbkbGKPm6HyN5uGP9MJDVHz8FtdbwPxyZdxp9+sNxBv00YvlupwvtEwUBpBzY7MZjnjIuKqAfR3bwLzgU4U29vDq8vjIJNMORA8x3ms/KMwkhJCNYVigQdsgxUtDDm0v1+jo+dMfR0kA1MhLyxI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1709029254; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=mtxi9BcxbyvqSJR652uWcRO0MXjGJfPmnXNGAR/FsQI=; b=M+dPjHgKiOGdlBOJG0HrnY8EA8d0Xe7I4P8o7WRy/NanH1fy++sYheq9/oZ3kKZx/KgfBvbickaAv5Q6GDb4QiI21oG6h0GPEaR7M9wUs/aY74IE68Hn7EK48WjpGtGtUxpuAkxY9HB0xhNKQICgJczUvSrxMl5wt7oOT9M4BbA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1709029254154719.2861656868835; Tue, 27 Feb 2024 02:20:54 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reuZe-00086L-EG; Tue, 27 Feb 2024 05:20:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reuZb-0007kh-2m for qemu-devel@nongnu.org; Tue, 27 Feb 2024 05:20:31 -0500 Received: from mgamail.intel.com ([192.198.163.13]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reuZZ-0003gS-2e for qemu-devel@nongnu.org; Tue, 27 Feb 2024 05:20:30 -0500 Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Feb 2024 02:20:26 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa010.fm.intel.com with ESMTP; 27 Feb 2024 02:20:17 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709029229; x=1740565229; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8+96PePSRKtenIK/x5fCLFSm4clWmWTXdDfDGZmt7YE=; b=ZwUg414cHVkNK6Z0j14DRha+jdAND76DTMfpdXNY+Z4HLXK2TvpwBHm7 rcita12ue9R53g2vEsF5xw4MJKyffq44Q39tQB9MhLK59m8cgSnH0VLbY 29sI/jyGFsz0/DyP8FSXp53SI9GAZIJsi5a2WO+AVoU+3pA46oHC4K0nc 3L/nR5go778CZZrJW7jKSxcTe623/jfsQ9wi4WHMOf8007fAMOUyq7C3v f3MT+vXGGZYx+80zr/TJ7thOMPQoHhnJW6lM6DAGZ+obTCOGgZHcmUPkP W6epooc19xvnIJli/a8upfiFrFg+eIwbof9wXL8qTesWqMsspryMBP41p g==; X-IronPort-AV: E=McAfee;i="6600,9927,10996"; a="6310468" X-IronPort-AV: E=Sophos;i="6.06,187,1705392000"; d="scan'208";a="6310468" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,187,1705392000"; d="scan'208";a="6955175" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Eric Blake , Markus Armbruster , Marcelo Tosatti , =?UTF-8?q?Daniel=20P=20=2E=20Berrang=C3=A9?= , Xiaoyao Li Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhenyu Wang , Zhuocheng Ding , Babu Moger , Yongwei Ma , Zhao Liu Subject: [PATCH v9 18/21] hw/i386/pc: Support smp.modules for x86 PC machine Date: Tue, 27 Feb 2024 18:32:28 +0800 Message-Id: <20240227103231.1556302-19-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240227103231.1556302-1-zhao1.liu@linux.intel.com> References: <20240227103231.1556302-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.198.163.13; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.014, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1709029254796100009 Content-Type: text/plain; charset="utf-8" From: Zhao Liu As module-level topology support is added to X86CPU, now we can enable the support for the modules parameter on PC machines. With this support, we can define a 5-level x86 CPU topology with "-smp": -smp cpus=3D*,maxcpus=3D*,sockets=3D*,dies=3D*,modules=3D*,cores=3D*,thread= s=3D*. Additionally, add the 5-level topology example in description of "-smp". Tested-by: Yongwei Ma Co-developed-by: Zhuocheng Ding Signed-off-by: Zhuocheng Ding Signed-off-by: Zhao Liu Reviewed-by: Babu Moger --- Changes since v8: * Add missing "modules" parameter in -smp example. Changes since v7: * Supported modules instead of clusters for PC. * Dropped Michael/Babu/Yanan's ACKed/Tested/Reviewed tags since the code change. * Re-added Yongwei's Tested tag For his re-testing. --- hw/i386/pc.c | 1 + qemu-options.hx | 18 ++++++++++-------- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index f8eb684a4926..b270a66605fc 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1830,6 +1830,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->default_cpu_type =3D TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported =3D true; mc->smp_props.dies_supported =3D true; + mc->smp_props.modules_supported =3D true; mc->default_ram_id =3D "pc.ram"; pcmc->default_smbios_ep_type =3D SMBIOS_ENTRY_POINT_TYPE_64; =20 diff --git a/qemu-options.hx b/qemu-options.hx index 9be1e5817c7d..b5784fda32cb 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -281,7 +281,8 @@ ERST =20 DEF("smp", HAS_ARG, QEMU_OPTION_smp, "-smp [[cpus=3D]n][,maxcpus=3Dmaxcpus][,drawers=3Ddrawers][,books=3Dbo= oks][,sockets=3Dsockets]\n" - " [,dies=3Ddies][,clusters=3Dclusters][,cores=3Dcores][,= threads=3Dthreads]\n" + " [,dies=3Ddies][,clusters=3Dclusters][,modules=3Dmodule= s][,cores=3Dcores]\n" + " [,threads=3Dthreads]\n" " set the number of initial CPUs to 'n' [default=3D1]\n" " maxcpus=3D maximum number of total CPUs, including\n" " offline CPUs for hotplug, etc\n" @@ -290,7 +291,8 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp, " sockets=3D number of sockets in one book\n" " dies=3D number of dies in one socket\n" " clusters=3D number of clusters in one die\n" - " cores=3D number of cores in one cluster\n" + " modules=3D number of modules in one cluster\n" + " cores=3D number of cores in one module\n" " threads=3D number of threads in one core\n" "Note: Different machines may have different subsets of the CPU topolo= gy\n" " parameters supported, so the actual meaning of the supported pa= rameters\n" @@ -306,7 +308,7 @@ DEF("smp", HAS_ARG, QEMU_OPTION_smp, " must be set as 1 in the purpose of correct parsing.\n", QEMU_ARCH_ALL) SRST -``-smp [[cpus=3D]n][,maxcpus=3Dmaxcpus][,sockets=3Dsockets][,dies=3Ddies][= ,clusters=3Dclusters][,cores=3Dcores][,threads=3Dthreads]`` +``-smp [[cpus=3D]n][,maxcpus=3Dmaxcpus][,drawers=3Ddrawers][,books=3Dbooks= ][,sockets=3Dsockets][,dies=3Ddies][,clusters=3Dclusters][,modules=3Dmodule= s][,cores=3Dcores][,threads=3Dthreads]`` Simulate a SMP system with '\ ``n``\ ' CPUs initially present on the machine type board. On boards supporting CPU hotplug, the optional '\ ``maxcpus``\ ' parameter can be set to enable further CPUs to be @@ -345,14 +347,14 @@ SRST -smp 8,sockets=3D2,cores=3D2,threads=3D2,maxcpus=3D8 =20 The following sub-option defines a CPU topology hierarchy (2 sockets - totally on the machine, 2 dies per socket, 2 cores per die, 2 threads - per core) for PC machines which support sockets/dies/cores/threads. - Some members of the option can be omitted but their values will be - automatically computed: + totally on the machine, 2 dies per socket, 2 modules per die, 2 cores = per + module, 2 threads per core) for PC machines which support sockets/dies + /modules/cores/threads. Some members of the option can be omitted but + their values will be automatically computed: =20 :: =20 - -smp 16,sockets=3D2,dies=3D2,cores=3D2,threads=3D2,maxcpus=3D16 + -smp 32,sockets=3D2,dies=3D2,modules=3D2,cores=3D2,threads=3D2,max= cpus=3D32 =20 The following sub-option defines a CPU topology hierarchy (2 sockets totally on the machine, 2 clusters per socket, 2 cores per cluster, --=20 2.34.1