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[220.235.194.103]) by smtp.gmail.com with ESMTPSA id h18-20020a170902f2d200b001d913992d8csm11808208plc.242.2024.02.23.07.44.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Feb 2024 07:44:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708703090; x=1709307890; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PwPtUyKyEVd6AyaLlqPC6tZGZHAetOay6q3kchulGSU=; b=Fi3jFPngklzXt/sylbVCrLIfdDXn8ChifHYv+jqvaSwDQqxGq4tmAtF2Z2Z86Zw914 jRobPqcC2i+FBBIJ7UJRrJb9q1+M07B6i5z1+EFji0C+Gjya+yFaQ1D8POREQkh70L+f 94U8nstau2Yh7/6g6JqyuddBOrcgbQJ0/Dqd+tMyaqENjVWGSxH779bq2oDhNaD6JNyy /lpD1CmBKnTi/i3UGb5dgQxPmKgB32SstC/88xdOSYTnTUpH2kMvtOPmwpq1DD6ISE60 8/WUygwkiSurfWjD6cSKxEKCtl8MR//0capnrfpdlql4zDTn7yPrEzDJZUe0y4XktDDV gFJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708703090; x=1709307890; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PwPtUyKyEVd6AyaLlqPC6tZGZHAetOay6q3kchulGSU=; b=azOzkXArNFhGrFrSd3bD860cxn6t2V2SqZiNVZH7YMOA49Cn/lYfnxMqOwCYCvPiNv KAP/Vb77YRNAHecymcxBXYNt4T3LWsVbMdPE9+4XoD3SbfyeWblpI5DcDUIHLszo+3ST jd8AJPeVv7AZChe4dGSMaTBLAAUm7cgjqSJzV6gvVIrYplrO5p8FCO2GG4XxS8WoOO/i eICnSRNtLfYeSFj6+y2KIu9dfCrsMbqaUj1KhVR9s0ZSB9pxLYSDIwFtxL3rG+TV/NsP tunh9SdSyV/lntodAS3vDtcfoKGIAqKYs2K2V9y6rM4DRgcXEgrj7V735uJB3MhGiFaw BZtQ== X-Forwarded-Encrypted: i=1; AJvYcCXkn1B6LUWSTCpJ/maf6RzNl1uE/H6DNPOvDlLX7sMQMPYFe7QvVLUJ+VoDGiHWUJje3On3w/AQha6hd6XBjqUu5RYT X-Gm-Message-State: AOJu0Yzi2OP09w7IvOgFD/8YaP7bkpsue+Kkb24ZTxbZZfWC/AgqJ9RB fvNZ0kfk7GyTYrlDAE/RsDNoosFmeA+Pi7Oh/eL1dhw7ECVd2HyZJqIoHNO0 X-Google-Smtp-Source: AGHT+IFxEdy3U7F1c2BKq9ONa0jbKwdPlQsHEgMM0JPzkl099V9DzJsKdEHX+tjH43v0LCYPJeoX1w== X-Received: by 2002:a17:902:db10:b0:1db:ca53:41d with SMTP id m16-20020a170902db1000b001dbca53041dmr179794plx.31.1708703090088; Fri, 23 Feb 2024 07:44:50 -0800 (PST) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Harsh Prateek Bora , Glenn Miles Subject: [PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control Date: Sat, 24 Feb 2024 01:41:44 +1000 Message-ID: <20240223154211.1001692-26-npiggin@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240223154211.1001692-1-npiggin@gmail.com> References: <20240223154211.1001692-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=npiggin@gmail.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708703907675100001 From: Glenn Miles For power10-rainier, a pca9552 device is used for PCIe slot hotplug power control by the Power Hypervisor code. The code expects that some time after it enables power to a PCIe slot by asserting one of the pca9552 GPIO pins 0-4, it should see a "power good" signal asserted on one of pca9552 GPIO pins 5-9. To simulate this behavior, we simply connect the GPIO outputs for pins 0-4 to the GPIO inputs for pins 5-9. Each PCIe slot is assigned 3 GPIO pins on the pca9552 device, for control of up to 5 PCIe slots. The per-slot signal names are: SLOTx_EN.......PHYP uses this as an output to enable slot power. We connect this to the SLOTx_PG pin to simulate a PGOOD signal. SLOTx_PG.......PHYP uses this as in input to detect PGOOD for the slot. For our purposes we just connect this to the SLOTx_EN output. SLOTx_Control..PHYP uses this as an output to prevent a race condition in the real hotplug circuitry, but we can ignore this output for simulation. Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: Glenn Miles Signed-off-by: Nicholas Piggin --- hw/ppc/pnv.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 78f5c6262a..97bdfb2d1e 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1900,7 +1900,19 @@ static void pnv_rainier_i2c_init(PnvMachineState *pn= v) * Add a PCA9552 I2C device for PCIe hotplug control * to engine 2, bus 1, address 0x63 */ - i2c_slave_create_simple(chip10->i2c[2].busses[1], "pca9552", 0x63); + I2CSlave *dev =3D i2c_slave_create_simple(chip10->i2c[2].busses[1], + "pca9552", 0x63); + + /* + * Connect PCA9552 GPIO pins 0-4 (SLOTx_EN) outputs to GPIO pins 5= -9 + * (SLOTx_PG) inputs in order to fake the pgood state of PCIe slots + * after hypervisor code sets a SLOTx_EN pin high. + */ + qdev_connect_gpio_out(DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(dev)= , 5)); + qdev_connect_gpio_out(DEVICE(dev), 1, qdev_get_gpio_in(DEVICE(dev)= , 6)); + qdev_connect_gpio_out(DEVICE(dev), 2, qdev_get_gpio_in(DEVICE(dev)= , 7)); + qdev_connect_gpio_out(DEVICE(dev), 3, qdev_get_gpio_in(DEVICE(dev)= , 8)); + qdev_connect_gpio_out(DEVICE(dev), 4, qdev_get_gpio_in(DEVICE(dev)= , 9)); } } =20 --=20 2.42.0