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Fri, 23 Feb 2024 05:10:00 -0800 (PST) X-Google-Smtp-Source: AGHT+IH6ctPWsSITOZkh017u0lakxn8dLN3iAtpvysL3g4XP347kvxf6IuotRPjrhe/wn/Q3b2cE/g== X-Received: by 2002:a05:651c:1a07:b0:2d2:3c88:cd57 with SMTP id by7-20020a05651c1a0700b002d23c88cd57mr1559350ljb.32.1708693799826; Fri, 23 Feb 2024 05:09:59 -0800 (PST) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, mcb30@ipxe.org Subject: [PATCH v2 3/7] target/i386: introduce function to query MMU indices Date: Fri, 23 Feb 2024 14:09:44 +0100 Message-ID: <20240223130948.237186-4-pbonzini@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240223130948.237186-1-pbonzini@redhat.com> References: <20240223130948.237186-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.066, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1708693905351100001 Content-Type: text/plain; charset="utf-8" Remove knowledge of specific MMU indexes (other than MMU_NESTED_IDX and MMU_PHYS_IDX) from mmu_translate(). This will make it possible to split 32-bit and 64-bit MMU indexes. Signed-off-by: Paolo Bonzini Reviewed-by: Zhao Liu --- target/i386/cpu.h | 10 ++++++++++ target/i386/tcg/sysemu/excp_helper.c | 4 ++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index dfe43b82042..8c271ca62e5 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2305,6 +2305,16 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define MMU_NESTED_IDX 3 #define MMU_PHYS_IDX 4 =20 +static inline bool is_mmu_index_smap(int mmu_index) +{ + return mmu_index =3D=3D MMU_KSMAP_IDX; +} + +static inline bool is_mmu_index_user(int mmu_index) +{ + return mmu_index =3D=3D MMU_USER_IDX; +} + static inline int cpu_mmu_index_kernel(CPUX86State *env) { return !(env->hflags & HF_SMAP_MASK) ? MMU_KNOSMAP_IDX : diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/= excp_helper.c index 11126c860d4..a0d5ce39300 100644 --- a/target/i386/tcg/sysemu/excp_helper.c +++ b/target/i386/tcg/sysemu/excp_helper.c @@ -137,7 +137,7 @@ static bool mmu_translate(CPUX86State *env, const Trans= lateParams *in, const int32_t a20_mask =3D x86_get_a20_mask(env); const target_ulong addr =3D in->addr; const int pg_mode =3D in->pg_mode; - const bool is_user =3D (in->mmu_idx =3D=3D MMU_USER_IDX); + const bool is_user =3D is_mmu_index_user(in->mmu_idx); const MMUAccessType access_type =3D in->access_type; uint64_t ptep, pte, rsvd_mask; PTETranslate pte_trans =3D { @@ -363,7 +363,7 @@ do_check_protect_pse36: } =20 int prot =3D 0; - if (in->mmu_idx !=3D MMU_KSMAP_IDX || !(ptep & PG_USER_MASK)) { + if (!is_mmu_index_smap(in->mmu_idx) || !(ptep & PG_USER_MASK)) { prot |=3D PAGE_READ; if ((ptep & PG_RW_MASK) || !(is_user || (pg_mode & PG_MODE_WP))) { prot |=3D PAGE_WRITE; --=20 2.43.0