From nobody Tue Nov 26 11:37:30 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1708634694; cv=none; d=zohomail.com; s=zohoarc; b=UAN+2piDNNg/KCs3zY2wKvKGTen55QxyhFxpe+mVkLmoopUyjbOEQcYJ4cVxtqqmAFYOWdRFY43W512NuyRtYfcisLNBNcBDvZz7m2+lkfQynafl80MKYEVgk/KSCNOyRKFN0u8ACh23oh7MMwy9n96PvGbh8+HDntCk1EUagGw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1708634694; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=uW4mSrnyRkLcpmuT0B32llPRivoOZrRn2N/1ffLpPkI=; b=dySo6ncxRzSeXc2e1Am1Pk78dwx3IbIoLwTnzHGrbg/Lea0uwqHhj1iDzE/iOrIAWYD4Zsue1MHqxYtQOi/ZVNlKsjsBPKczQVFi5pwLFllUCTRVkhWPQTnc5dn6WLDbw+P4txjgkeehRCycq4z4y9MDaqtGuxJUz5YaD4Ai1Qk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170863469443510.712587608234344; Thu, 22 Feb 2024 12:44:54 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rdFvc-0008CR-1g; Thu, 22 Feb 2024 15:44:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rdFva-0008BR-Ts for qemu-devel@nongnu.org; Thu, 22 Feb 2024 15:44:22 -0500 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rdFvZ-0002o9-8G for qemu-devel@nongnu.org; Thu, 22 Feb 2024 15:44:22 -0500 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1d7431e702dso2274875ad.1 for ; Thu, 22 Feb 2024 12:44:20 -0800 (PST) Received: from stoup.. (173-197-098-125.biz.spectrum.com. [173.197.98.125]) by smtp.gmail.com with ESMTPSA id l12-20020a170902d34c00b001d8f81ecebesm10275500plk.192.2024.02.22.12.44.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Feb 2024 12:44:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708634660; x=1709239460; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uW4mSrnyRkLcpmuT0B32llPRivoOZrRn2N/1ffLpPkI=; b=MCW1gh4Z6LvjG6XcVCAqvXJL25fVM5H1tIDHvZuA7ZwuTfXV9aW/aY7Meb9ykuV/qm BnYvJ37vhQwPfQ9ECPgkbJXwlMiDRG8rXe85hqSwgMLtB4hBWT/aCfhZZO+SZV79RTph /mwA0d/7WvpxrbYH1rBXiiFL0bN6DK0/XPVc/d29QqU2eub7b2acDFcnMnSEd7ouQUMS PjuhnQFa44F59OGsJhoBiHPC+GaAhJhSV8dFV+cM5lST9ubwgVpWv11Qm4/pCPoYAfy9 GTbJThp2vOhHKOb8q/fNwKN2Vbh9GwaF1ZaF/2bMGW16il9mrZCFM2Vvs0os0XAXM8kp oLMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708634660; x=1709239460; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uW4mSrnyRkLcpmuT0B32llPRivoOZrRn2N/1ffLpPkI=; b=l9EXCDLNnX3Fkf+fH6TeejWGdk7/p8QIWswoTmUAN4es/YL2nTYaP8aNIOHme7zK4x dA6+1yGaDQdEk7hMZM4mDj4ytP97i45mUM3YnwzsdiHgzx1fkhd0HsDZPjQSzZccM9Lo TsFM4Do1bBwmTI2EPFKz0YhVzuBeHl+POEWZ6ULhYOl1rQyKgcmPnZ0QPWlAks5EbbPB 4Nd3DWSFiZtTZO2rYBmqrRWdAxH3z4WdAhvTWexmL/57rWNrF4TN6gzlPE9xTtO6PQ18 UqPyh0+EtCQZvfeR/+62ZQVPE0ZlV+7iwvgECzKCuDkjKPUhO+SUUe+dGLJF0gF9MEgr 6WDA== X-Gm-Message-State: AOJu0Yx5dxXk+6gfvU8NcpPnjPzJbU82Ovl+gSCL/Vz/cV5d3KJQmJrn wD37iVrZMM28NBHcQHCZlwNuCQ0rI7eNJaC9hS5UNqSHI8cnizJHg9ylOgLSKCmEXmzDVZcNmI5 b X-Google-Smtp-Source: AGHT+IEdWzwPJBH6227neRzvDAzwO+ClwUrkcp8wmtteXbAZ/uHB7QPYFxb5urDKVHJU1wyJO0tQ4A== X-Received: by 2002:a17:902:6504:b0:1dc:4aa1:df32 with SMTP id b4-20020a170902650400b001dc4aa1df32mr2747689plk.14.1708634659940; Thu, 22 Feb 2024 12:44:19 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Pierrick Bouvier , Helge Deller Subject: [PULL 35/39] target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only Date: Thu, 22 Feb 2024 10:43:19 -1000 Message-Id: <20240222204323.268539-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240222204323.268539-1-richard.henderson@linaro.org> References: <20240222204323.268539-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1708634695597100001 Content-Type: text/plain; charset="utf-8" Since aarch64 binaries are generally built for multiple page sizes, it is trivial to allow the page size to vary. Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier Acked-by: Helge Deller Message-Id: <20240102015808.132373-31-richard.henderson@linaro.org> --- target/arm/cpu-param.h | 6 ++++- target/arm/cpu.c | 51 ++++++++++++++++++++++++------------------ 2 files changed, 34 insertions(+), 23 deletions(-) diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index f9b462a98f..da3243ab21 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -19,9 +19,13 @@ #endif =20 #ifdef CONFIG_USER_ONLY -#define TARGET_PAGE_BITS 12 # ifdef TARGET_AARCH64 # define TARGET_TAGGED_ADDRESSES +/* Allow user-only to vary page size from 4k */ +# define TARGET_PAGE_BITS_VARY +# define TARGET_PAGE_BITS_MIN 12 +# else +# define TARGET_PAGE_BITS 12 # endif #else /* diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5fa86bc8d5..2325d4007f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1809,7 +1809,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) ARMCPU *cpu =3D ARM_CPU(dev); ARMCPUClass *acc =3D ARM_CPU_GET_CLASS(dev); CPUARMState *env =3D &cpu->env; - int pagebits; Error *local_err =3D NULL; =20 #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) @@ -2100,28 +2099,36 @@ static void arm_cpu_realizefn(DeviceState *dev, Err= or **errp) !cpu_isar_feature(aa32_vfp_simd, cpu) || !arm_feature(env, ARM_FEATURE_XSCALE)); =20 - if (arm_feature(env, ARM_FEATURE_V7) && - !arm_feature(env, ARM_FEATURE_M) && - !arm_feature(env, ARM_FEATURE_PMSA)) { - /* v7VMSA drops support for the old ARMv5 tiny pages, so we - * can use 4K pages. - */ - pagebits =3D 12; - } else { - /* For CPUs which might have tiny 1K pages, or which have an - * MPU and might have small region sizes, stick with 1K pages. - */ - pagebits =3D 10; - } - if (!set_preferred_target_page_bits(pagebits)) { - /* This can only ever happen for hotplugging a CPU, or if - * the board code incorrectly creates a CPU which it has - * promised via minimum_page_size that it will not. - */ - error_setg(errp, "This CPU requires a smaller page size than the " - "system is using"); - return; +#ifndef CONFIG_USER_ONLY + { + int pagebits; + if (arm_feature(env, ARM_FEATURE_V7) && + !arm_feature(env, ARM_FEATURE_M) && + !arm_feature(env, ARM_FEATURE_PMSA)) { + /* + * v7VMSA drops support for the old ARMv5 tiny pages, + * so we can use 4K pages. + */ + pagebits =3D 12; + } else { + /* + * For CPUs which might have tiny 1K pages, or which have an + * MPU and might have small region sizes, stick with 1K pages. + */ + pagebits =3D 10; + } + if (!set_preferred_target_page_bits(pagebits)) { + /* + * This can only ever happen for hotplugging a CPU, or if + * the board code incorrectly creates a CPU which it has + * promised via minimum_page_size that it will not. + */ + error_setg(errp, "This CPU requires a smaller page size " + "than the system is using"); + return; + } } +#endif =20 /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will overri= de it. * We don't support setting cluster ID ([16..23]) (known as Aff2 --=20 2.34.1