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Wed, 21 Feb 2024 09:33:32 -0800 (PST) Date: Wed, 21 Feb 2024 17:33:25 +0000 In-Reply-To: <20240221173325.1494895-1-nabihestefan@google.com> Mime-Version: 1.0 References: <20240221173325.1494895-1-nabihestefan@google.com> X-Mailer: git-send-email 2.44.0.rc0.258.g7320e95886-goog Message-ID: <20240221173325.1494895-3-nabihestefan@google.com> Subject: [PATCH 2/2] hw/intc/arm_gicv3_its: Use send_msi in the GITS_TRANSLATER write From: Nabih Estefan To: peter.maydell@linaro.org Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-block@nongnu.org, its@irrelevant.dk, kbusch@kernel.org, roqueh@google.com, nabihestefan@google.com Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::b49; envelope-from=37DPWZQwKCuEQDELKHVWHIDQJRRJOH.FRPTHPX-GHYHOQRQJQX.RUJ@flex--nabihestefan.bounces.google.com; helo=mail-yb1-xb49.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @google.com) X-ZM-MESSAGEID: 1708536897746100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Roque Arcudia Hernandez This is trying to achieve 2 things: To be able to redefine the send_msi in a derived class of arm_gicv3_its and/or to expose a method call interface to inject interrupts from another device. Signed-off-by: Roque Arcudia Hernandez Signed-off-by: Nabih Estefan --- hw/intc/arm_gicv3_its.c | 20 +++++++++----------- include/hw/intc/arm_gicv3_its_common.h | 13 +++++++++++-- 2 files changed, 20 insertions(+), 13 deletions(-) diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c index 52e9aca9c6..9342e96be3 100644 --- a/hw/intc/arm_gicv3_its.c +++ b/hw/intc/arm_gicv3_its.c @@ -20,16 +20,6 @@ #include "qom/object.h" #include "qapi/error.h" =20 -typedef struct GICv3ITSClass GICv3ITSClass; -/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */ -DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass, - ARM_GICV3_ITS, TYPE_ARM_GICV3_ITS) - -struct GICv3ITSClass { - GICv3ITSCommonClass parent_class; - ResettablePhases parent_phases; -}; - /* * This is an internal enum used to distinguish between LPI triggered * via command queue and LPI triggered via gits_translater write. @@ -1561,7 +1551,8 @@ static MemTxResult gicv3_its_translation_write(void *= opaque, hwaddr offset, switch (offset) { case GITS_TRANSLATER: if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) { - result =3D do_process_its_cmd(s, attrs.requester_id, data, NON= E); + GICv3ITSCommonClass *c =3D ARM_GICV3_ITS_COMMON_GET_CLASS(s); + result =3D c->send_msi(s, data, attrs.requester_id); } break; default: @@ -1994,6 +1985,12 @@ static void gicv3_its_reset_hold(Object *obj) } } =20 +static int gicv3_its_send_msi(GICv3ITSState *s, uint32_t eventid, + uint32_t devid) +{ + return do_process_its_cmd(s, devid, eventid, NONE); +} + static void gicv3_its_post_load(GICv3ITSState *s) { if (s->ctlr & R_GITS_CTLR_ENABLED_MASK) { @@ -2020,6 +2017,7 @@ static void gicv3_its_class_init(ObjectClass *klass, = void *data) resettable_class_set_parent_phases(rc, NULL, gicv3_its_reset_hold, NUL= L, &ic->parent_phases); icc->post_load =3D gicv3_its_post_load; + icc->send_msi =3D gicv3_its_send_msi; } =20 static const TypeInfo gicv3_its_info =3D { diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_g= icv3_its_common.h index e072c36cca..c81bd0b26e 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -25,8 +25,6 @@ #include "hw/intc/arm_gicv3_common.h" #include "qom/object.h" =20 -#define TYPE_ARM_GICV3_ITS "arm-gicv3-its" - #define ITS_CONTROL_SIZE 0x10000 #define ITS_TRANS_SIZE 0x10000 #define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE) @@ -132,4 +130,15 @@ struct GICv3ITSCommonClass { */ const char *its_class_name(void); =20 +#define TYPE_ARM_GICV3_ITS "arm-gicv3-its" +typedef struct GICv3ITSClass GICv3ITSClass; +/* This is reusing the GICv3ITSState typedef from ARM_GICV3_ITS_COMMON */ +DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass, + ARM_GICV3_ITS, TYPE_ARM_GICV3_ITS) + +struct GICv3ITSClass { + GICv3ITSCommonClass parent_class; + ResettablePhases parent_phases; +}; + #endif --=20 2.44.0.rc0.258.g7320e95886-goog