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[176.184.23.7]) by smtp.gmail.com with ESMTPSA id ay5-20020a5d6f05000000b0033d1ef15821sm13635990wrb.25.2024.02.20.07.08.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 20 Feb 2024 07:08:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1708441736; x=1709046536; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c1TV5sCnl17G7fDWs4b3B3U9yT3t3/ekFX78vUNTAvs=; b=k2QAQiX0h9hdemJUtCtmdVOTsNNCQ6lmb1AcH+ap8T7w9jLEMBcYr5pRGXrkSLntdq kIkTtEvC9d4gCbDUpB0hvNs4x3YgD+rq/m+2pnApAgFpfJXweCMhZ5+d3HgrQkCW4wVO TqEVQqbLod52zOm0MA3+Phv0bnQsltFfDr5g6LUMFucY51SCr91AecxdWQSAxUCoLlfg Ko6frg9Z6Axv+ELpXocXyOCak6j4B3PzXY7kAru6zfXAEUWqd0dzzZOwufST3GXp9AWR KjguGrLZ13ieUtWdQ5IP/TnCDUJlBeVFuNa7z5hOiWGbO05c6haNnjvig1/rZslaK4Kf 1zFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708441736; x=1709046536; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c1TV5sCnl17G7fDWs4b3B3U9yT3t3/ekFX78vUNTAvs=; b=mtdhc38Pz7EhEidMtPzDa6+EJkTUe6ycCaygrJpG8BFeod1pY/grsRx3PB/OwYsReF qJ+WtK1jR1D9/94NKnK12MXFO0JjUJHa4telWy9P8rvHGUR1kqg6qBVWmfDBjWxUVHSh Baf+7R09i6LodsqhyHiN9kQoAwPASd1+zjiBI02xCI8+Gxz1OfapuMbk82YSwoLdrnzJ El6tF/ZjMLJfxCWq5wcPvGu3QHHzHkImXxxoNsKgTpxCkiaGmsoYVEK6xohAJTn6GpxT 1jZEoqFGH9Bmg8yPrrws9v9BDlkI4jgTpjcUO3QamCzu8VoiDgOXmIuQYe+N82lGDywN 0CpA== X-Gm-Message-State: AOJu0YzHj2SoJpc7y7/S0GgeAideJAR49HB7XZzLwlPlWO7fQ/y1t5HK HBiq9di++Csy6DlK6ThK90aDu4/lL0EejxifzjINKp5fKzsOB9dqQguP+E0DBCxcAEfU5L10BuE F X-Google-Smtp-Source: AGHT+IGb+FdbrT00j0U8Uxf+mqkoGDX+JU4NnFMo1mEZ2CqrmobuIE9ddAMt5g5MnwXrf/PPUWnLpw== X-Received: by 2002:a2e:9858:0:b0:2d2:31f4:35c with SMTP id e24-20020a2e9858000000b002d231f4035cmr4858299ljj.25.1708441736022; Tue, 20 Feb 2024 07:08:56 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , Markus Armbruster , qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, Christian Borntraeger , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Helge Deller , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Eduardo Habkost , Laurent Vivier , Mark Cave-Ayland , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Nicholas Piggin , =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Barrat?= , Daniel Henrique Barboza , David Gibson , Harsh Prateek Bora , Halil Pasic , Eric Farman , David Hildenbrand , Ilya Leoshkevich Subject: [PATCH 3/4] hw/nmi: Remove @cpu_index argument from NMIClass::nmi_handler() Date: Tue, 20 Feb 2024 16:08:32 +0100 Message-ID: <20240220150833.13674-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240220150833.13674-1-philmd@linaro.org> References: <20240220150833.13674-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::232; envelope-from=philmd@linaro.org; helo=mail-lj1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1708441775739100003 Only s390x was using the 'cpu_index' argument, but since the previous commit it isn't anymore (it use the first cpu). Since this argument is now completely unused, remove it. Have the callback return a boolean indicating failure. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/nmi.h | 11 ++++++++++- hw/core/nmi.c | 3 +-- hw/hppa/machine.c | 8 +++++--- hw/i386/x86.c | 7 ++++--- hw/intc/m68k_irqc.c | 6 ++++-- hw/m68k/q800-glue.c | 6 ++++-- hw/misc/macio/gpio.c | 6 ++++-- hw/ppc/pnv.c | 6 ++++-- hw/ppc/spapr.c | 6 ++++-- hw/s390x/s390-virtio-ccw.c | 6 ++++-- 10 files changed, 44 insertions(+), 21 deletions(-) diff --git a/include/hw/nmi.h b/include/hw/nmi.h index fff41bebc6..c70db941c9 100644 --- a/include/hw/nmi.h +++ b/include/hw/nmi.h @@ -37,7 +37,16 @@ typedef struct NMIState NMIState; struct NMIClass { InterfaceClass parent_class; =20 - void (*nmi_monitor_handler)(NMIState *n, int cpu_index, Error **errp); + /** + * nmi_handler: Callback to handle NMI notifications. + * + * @n: Class #NMIState state + * @errp: pointer to error object + * + * On success, return %true. + * On failure, store an error through @errp and return %false. + */ + bool (*nmi_handler)(NMIState *n, Error **errp); }; =20 void nmi_monitor_handle(int cpu_index, Error **errp); diff --git a/hw/core/nmi.c b/hw/core/nmi.c index f5220111c1..409164d445 100644 --- a/hw/core/nmi.c +++ b/hw/core/nmi.c @@ -40,8 +40,7 @@ static int do_nmi(Object *o, void *opaque) NMIClass *nc =3D NMI_GET_CLASS(n); =20 ns->handled =3D true; - nc->nmi_monitor_handler(n, ns->cpu_index, &ns->err); - if (ns->err) { + if (!nc->nmi_handler(n, &ns->err)) { return -1; } } diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 5fcaf5884b..75b61a0683 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -673,13 +673,15 @@ static void hppa_machine_reset(MachineState *ms, Shut= downCause reason) cpu[0]->env.gr[19] =3D FW_CFG_IO_BASE; } =20 -static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) +static bool hppa_nmi(NMIState *n, Error **errp) { CPUState *cs; =20 CPU_FOREACH(cs) { cpu_interrupt(cs, CPU_INTERRUPT_NMI); } + + return true; } =20 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) @@ -705,7 +707,7 @@ static void HP_B160L_machine_init_class_init(ObjectClas= s *oc, void *data) mc->default_ram_id =3D "ram"; mc->default_nic =3D "tulip"; =20 - nc->nmi_monitor_handler =3D hppa_nmi; + nc->nmi_handler =3D hppa_nmi; } =20 static const TypeInfo HP_B160L_machine_init_typeinfo =3D { @@ -741,7 +743,7 @@ static void HP_C3700_machine_init_class_init(ObjectClas= s *oc, void *data) mc->default_ram_id =3D "ram"; mc->default_nic =3D "tulip"; =20 - nc->nmi_monitor_handler =3D hppa_nmi; + nc->nmi_handler =3D hppa_nmi; } =20 static const TypeInfo HP_C3700_machine_init_typeinfo =3D { diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 684dce90e9..0d756c4857 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -512,9 +512,8 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineS= tate *ms) return ms->possible_cpus; } =20 -static void x86_nmi(NMIState *n, int cpu_index, Error **errp) +static bool x86_nmi(NMIState *n, Error **errp) { - /* cpu index isn't used */ CPUState *cs; =20 CPU_FOREACH(cs) { @@ -526,6 +525,8 @@ static void x86_nmi(NMIState *n, int cpu_index, Error *= *errp) cpu_interrupt(cs, CPU_INTERRUPT_NMI); } } + + return true; } =20 static long get_file_size(FILE *f) @@ -1416,7 +1417,7 @@ static void x86_machine_class_init(ObjectClass *oc, v= oid *data) mc->possible_cpu_arch_ids =3D x86_possible_cpu_arch_ids; x86mc->save_tsc_khz =3D true; x86mc->fwcfg_dma_enabled =3D true; - nc->nmi_monitor_handler =3D x86_nmi; + nc->nmi_handler =3D x86_nmi; =20 object_class_property_add(oc, X86_MACHINE_SMM, "OnOffAuto", x86_machine_get_smm, x86_machine_set_smm, diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index 4b11fb9f72..acc9348218 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -71,9 +71,11 @@ static void m68k_irqc_instance_init(Object *obj) qdev_init_gpio_in(DEVICE(obj), m68k_set_irq, M68K_IRQC_LEVEL_NUM); } =20 -static void m68k_nmi(NMIState *n, int cpu_index, Error **errp) +static bool m68k_nmi(NMIState *n, Error **errp) { m68k_set_irq(n, M68K_IRQC_LEVEL_7, 1); + + return true; } =20 static const VMStateDescription vmstate_m68k_irqc =3D { @@ -99,7 +101,7 @@ static void m68k_irqc_class_init(ObjectClass *oc, void *= data) InterruptStatsProviderClass *ic =3D INTERRUPT_STATS_PROVIDER_CLASS(oc); =20 device_class_set_props(dc, m68k_irqc_properties); - nc->nmi_monitor_handler =3D m68k_nmi; + nc->nmi_handler =3D m68k_nmi; dc->reset =3D m68k_irqc_reset; dc->vmsd =3D &vmstate_m68k_irqc; ic->get_statistics =3D m68k_irqc_get_statistics; diff --git a/hw/m68k/q800-glue.c b/hw/m68k/q800-glue.c index b5a7713863..f92bd5064a 100644 --- a/hw/m68k/q800-glue.c +++ b/hw/m68k/q800-glue.c @@ -159,13 +159,15 @@ static void glue_auxmode_set_irq(void *opaque, int ir= q, int level) s->auxmode =3D level; } =20 -static void glue_nmi(NMIState *n, int cpu_index, Error **errp) +static bool glue_nmi(NMIState *n, Error **errp) { GLUEState *s =3D GLUE(n); =20 /* Hold NMI active for 100ms */ GLUE_set_irq(s, GLUE_IRQ_IN_NMI, 1); timer_mod(s->nmi_release, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100); + + return true; } =20 static void glue_nmi_release(void *opaque) @@ -238,7 +240,7 @@ static void glue_class_init(ObjectClass *klass, void *d= ata) dc->vmsd =3D &vmstate_glue; device_class_set_props(dc, glue_properties); rc->phases.hold =3D glue_reset_hold; - nc->nmi_monitor_handler =3D glue_nmi; + nc->nmi_handler =3D glue_nmi; } =20 static const TypeInfo glue_info_types[] =3D { diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c index 549563747d..9ac93d9ed5 100644 --- a/hw/misc/macio/gpio.c +++ b/hw/misc/macio/gpio.c @@ -183,10 +183,12 @@ static void macio_gpio_reset(DeviceState *dev) macio_set_gpio(s, 1, true); } =20 -static void macio_gpio_nmi(NMIState *n, int cpu_index, Error **errp) +static bool macio_gpio_nmi(NMIState *n, Error **errp) { macio_set_gpio(MACIO_GPIO(n), 9, true); macio_set_gpio(MACIO_GPIO(n), 9, false); + + return true; } =20 static void macio_gpio_class_init(ObjectClass *oc, void *data) @@ -196,7 +198,7 @@ static void macio_gpio_class_init(ObjectClass *oc, void= *data) =20 dc->reset =3D macio_gpio_reset; dc->vmsd =3D &vmstate_macio_gpio; - nc->nmi_monitor_handler =3D macio_gpio_nmi; + nc->nmi_handler =3D macio_gpio_nmi; } =20 static const TypeInfo macio_gpio_init_info =3D { diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 0297871bdd..f572f8d0ce 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2321,13 +2321,15 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run= _on_cpu_data arg) } } =20 -static void pnv_nmi(NMIState *n, int cpu_index, Error **errp) +static bool pnv_nmi(NMIState *n, Error **errp) { CPUState *cs; =20 CPU_FOREACH(cs) { async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL); } + + return true; } =20 static void pnv_machine_class_init(ObjectClass *oc, void *data) @@ -2351,7 +2353,7 @@ static void pnv_machine_class_init(ObjectClass *oc, v= oid *data) mc->default_ram_size =3D 1 * GiB; mc->default_ram_id =3D "pnv.ram"; ispc->print_info =3D pnv_pic_print_info; - nc->nmi_monitor_handler =3D pnv_nmi; + nc->nmi_handler =3D pnv_nmi; =20 object_class_property_add_bool(oc, "hb-mode", pnv_machine_get_hb, pnv_machine_set_hb); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0d72d286d8..7327bf3429 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3505,13 +3505,15 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run= _on_cpu_data arg) } } =20 -static void spapr_nmi(NMIState *n, int cpu_index, Error **errp) +static bool spapr_nmi(NMIState *n, Error **errp) { CPUState *cs; =20 CPU_FOREACH(cs) { async_run_on_cpu(cs, spapr_do_system_reset_on_cpu, RUN_ON_CPU_NULL= ); } + + return true; } =20 int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr, @@ -4672,7 +4674,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) mc->nvdimm_supported =3D true; smc->resize_hpt_default =3D SPAPR_RESIZE_HPT_ENABLED; fwc->get_dev_path =3D spapr_get_fw_dev_path; - nc->nmi_monitor_handler =3D spapr_nmi; + nc->nmi_handler =3D spapr_nmi; smc->phb_placement =3D spapr_phb_placement; vhc->cpu_in_nested =3D spapr_cpu_in_nested; vhc->deliver_hv_excp =3D spapr_exit_nested; diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index ba1fa6472f..817f414767 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -603,9 +603,11 @@ static HotplugHandler *s390_get_hotplug_handler(Machin= eState *machine, return NULL; } =20 -static void s390_nmi(NMIState *n, int cpu_index, Error **errp) +static bool s390_nmi(NMIState *n, Error **errp) { s390_cpu_restart(S390_CPU(first_cpu)); + + return true; } =20 static ram_addr_t s390_fixup_ram_size(ram_addr_t sz) @@ -774,7 +776,7 @@ static void ccw_machine_class_init(ObjectClass *oc, voi= d *data) mc->default_cpu_type =3D S390_CPU_TYPE_NAME("qemu"); hc->plug =3D s390_machine_device_plug; hc->unplug_request =3D s390_machine_device_unplug_request; - nc->nmi_monitor_handler =3D s390_nmi; + nc->nmi_handler =3D s390_nmi; mc->default_ram_id =3D "s390.ram"; mc->default_nic =3D "virtio-net-ccw"; =20 --=20 2.41.0