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Sun, 18 Feb 2024 17:18:05 -0800 (PST) From: Sergey Kambalin X-Google-Original-From: Sergey Kambalin To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, Sergey Kambalin Subject: [PATCH v5 15/41] Enable BCM2838 PCIE Date: Sun, 18 Feb 2024 19:17:13 -0600 Message-Id: <20240219011739.2316619-16-sergey.kambalin@auriga.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240219011739.2316619-1-sergey.kambalin@auriga.com> References: <20240219011739.2316619-1-sergey.kambalin@auriga.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1132; envelope-from=serg.oker@gmail.com; helo=mail-yw1-x1132.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1708305745045100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Sergey Kambalin --- hw/arm/bcm2838.c | 9 +++++++++ hw/arm/bcm2838_peripherals.c | 23 +++++++++++++++++++++++ hw/arm/meson.build | 7 ++++--- hw/arm/raspi4b.c | 1 - include/hw/arm/bcm2838_peripherals.h | 2 ++ 5 files changed, 38 insertions(+), 4 deletions(-) diff --git a/hw/arm/bcm2838.c b/hw/arm/bcm2838.c index ddb7c5f757..481b262b02 100644 --- a/hw/arm/bcm2838.c +++ b/hw/arm/bcm2838.c @@ -226,6 +226,15 @@ static void bcm2838_realize(DeviceState *dev, Error **= errp) qdev_connect_gpio_out(dma_9_10_irq_orgate, 0, qdev_get_gpio_in(gicdev, GIC_SPI_INTERRUPT_DMA_9= _10)); =20 + /* Connect PCIe host bridge to the interrupt controller */ + for (int n =3D 0; n < BCM2838_PCIE_NUM_IRQS; n++) { + int int_n =3D GIC_SPI_INTERRUPT_PCI_INT_A + n; + sysbus_connect_irq(SYS_BUS_DEVICE(&ps->pcie_host), n, + qdev_get_gpio_in(gicdev, int_n)); + bcm2838_pcie_host_set_irq_num(BCM2838_PCIE_HOST(&ps->pcie_host), n, + int_n); + } + /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(dev, bcm2838_gic_set_irq, GIC_NUM_IRQS); =20 diff --git a/hw/arm/bcm2838_peripherals.c b/hw/arm/bcm2838_peripherals.c index ca2f37b260..7e86ebb555 100644 --- a/hw/arm/bcm2838_peripherals.c +++ b/hw/arm/bcm2838_peripherals.c @@ -12,6 +12,11 @@ #include "hw/arm/raspi_platform.h" #include "hw/arm/bcm2838_peripherals.h" =20 +#define PCIE_RC_OFFSET 0x1500000 +#define PCIE_MMIO_OFFSET 0xc0000000 +#define PCIE_MMIO_ARM_OFFSET 0x600000000 +#define PCIE_MMIO_SIZE 0x40000000 + /* Lower peripheral base address on the VC (GPU) system bus */ #define BCM2838_VC_PERI_LOW_BASE 0x7c000000 =20 @@ -29,6 +34,10 @@ static void bcm2838_peripherals_init(Object *obj) bc->peri_low_size); sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_low_mr); =20 + /* PCIe Host Bridge */ + object_initialize_child(obj, "pcie-host", &s->pcie_host, + TYPE_BCM2838_PCIE_HOST); + /* Extended Mass Media Controller 2 */ object_initialize_child(obj, "emmc2", &s->emmc2, TYPE_SYSBUS_SDHCI); =20 @@ -64,6 +73,9 @@ static void bcm2838_peripherals_realize(DeviceState *dev,= Error **errp) MemoryRegion *mphi_mr; BCM2838PeripheralState *s =3D BCM2838_PERIPHERALS(dev); BCMSocPeripheralBaseState *s_base =3D BCM_SOC_PERIPHERALS_BASE(dev); + MemoryRegion *regs_mr; + MemoryRegion *mmio_mr; + int n; =20 bcm_soc_peripherals_common_realize(dev, errp); @@ -175,6 +187,17 @@ static void bcm2838_peripherals_realize(DeviceState *d= ev, Error **errp) BCM2838_MPHI_SIZE); memory_region_add_subregion(&s_base->peri_mr, BCM2838_MPHI_OFFSET, &s->mphi_mr_alias); + /* PCIe Root Complex */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->pcie_host), errp)) { + return; + } + /* RC registers region */ + regs_mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->pcie_host), 0); + memory_region_add_subregion(&s->peri_low_mr, PCIE_RC_OFFSET, regs_mr); + /* MMIO region */ + mmio_mr =3D sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->pcie_host), 1); + memory_region_add_subregion(get_system_memory(), PCIE_MMIO_ARM_OFFSET, + mmio_mr); =20 /* GPIO */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { diff --git a/hw/arm/meson.build b/hw/arm/meson.build index 39f6df7431..4d11ec0eae 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -32,7 +32,6 @@ arm_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('= allwinner-r40.c', 'bana arm_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2836.c', 'raspi.c')) arm_ss.add(when: ['CONFIG_RASPI', 'TARGET_AARCH64'], if_true: files( 'bcm2838.c', - 'bcm2838_pcie.c', 'raspi4b.c')) arm_ss.add(when: 'CONFIG_STM32F100_SOC', if_true: files('stm32f100_soc.c')) arm_ss.add(when: 'CONFIG_STM32F205_SOC', if_true: files('stm32f205_soc.c')) @@ -70,8 +69,10 @@ system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('ex= ynos4_boards.c')) system_ss.add(when: 'CONFIG_GUMSTIX', if_true: files('gumstix.c')) system_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c')) system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap2.c')) -system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'= )) -system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2838_peripherals.c'= )) +system_ss.add(when: 'CONFIG_RASPI', if_true: files( + 'bcm2835_peripherals.c', + 'bcm2838_peripherals.c', + 'bcm2838_pcie.c')) system_ss.add(when: 'CONFIG_SPITZ', if_true: files('spitz.c')) system_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c')) system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c')) diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c index 49dec6e53a..2431b0b8c3 100644 --- a/hw/arm/raspi4b.c +++ b/hw/arm/raspi4b.c @@ -67,7 +67,6 @@ static void raspi4_modify_dtb(const struct arm_boot_info = *info, void *fdt) =20 /* Temporarily disable following devices until they are implemented */ const char *nodes_to_remove[] =3D { - "brcm,bcm2711-pcie", "brcm,bcm2711-rng200", "brcm,bcm2711-thermal", "brcm,bcm2711-genet-v5", diff --git a/include/hw/arm/bcm2838_peripherals.h b/include/hw/arm/bcm2838_= peripherals.h index af085934c9..bbd8387cff 100644 --- a/include/hw/arm/bcm2838_peripherals.h +++ b/include/hw/arm/bcm2838_peripherals.h @@ -10,6 +10,7 @@ #define BCM2838_PERIPHERALS_H =20 #include "hw/arm/bcm2835_peripherals.h" +#include "hw/arm/bcm2838_pcie.h" #include "hw/sd/sdhci.h" #include "hw/gpio/bcm2838_gpio.h" =20 @@ -64,6 +65,7 @@ struct BCM2838PeripheralState { MemoryRegion mphi_mr_alias; =20 SDHCIState emmc2; + BCM2838PcieHostState pcie_host; BCM2838GpioState gpio; =20 OrIRQState mmc_irq_orgate; --=20 2.34.1