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Iglesias" , Daniel Henrique Barboza , Yanan Wang , Palmer Dabbelt , Marcel Apfelbaum , Brian Cain , Mahmoud Mandour , Alexandre Iooss , Bin Meng , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Daniel Henrique Barboza , Eduardo Habkost , Alistair Francis , Liu Zhiwei , Akihiko Odaki Subject: [PATCH 20/23] contrib/plugins: extend execlog to track register changes Date: Fri, 16 Feb 2024 16:30:22 +0000 Message-Id: <20240216163025.424857-21-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240216163025.424857-1-alex.bennee@linaro.org> References: <20240216163025.424857-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1708101503836100005 With the new plugin register API we can now track changes to register values. Currently the implementation is fairly dumb which will slow down if a large number of register values are being tracked. This could be improved by only instrumenting instructions which mention registers we are interested in tracking. Example usage: ./qemu-aarch64 -D plugin.log -d plugin \ -cpu max,sve256=3Don \ -plugin contrib/plugins/libexeclog.so,reg=3Dsp,reg=3Dz\* \ ./tests/tcg/aarch64-linux-user/sha512-sve will display in the execlog any changes to the stack pointer (sp) and the SVE Z registers. As testing registers every instruction will be quite a heavy operation there is an additional flag which attempts to optimise the register tracking by only instrumenting instructions which are likely to change its value. This relies on the QEMU disassembler showing up the register names in disassembly so is an explicit opt-in. Message-Id: <20240103173349.398526-41-alex.bennee@linaro.org> Signed-off-by: Alex Benn=C3=A9e Cc: Akihiko Odaki Based-On: <20231025093128.33116-19-akihiko.odaki@daynix.com> Reviewed-by: Pierrick Bouvier --- v3 - just use a GArray for the CPU array - drop duplicate of cpu_index v4 - rebase and api fixups - I accidentally squashed the optimisation last round so update commit message with the details. --- docs/devel/tcg-plugins.rst | 17 +- contrib/plugins/execlog.c | 316 +++++++++++++++++++++++++++++++------ 2 files changed, 281 insertions(+), 52 deletions(-) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 81dcd43a612..fa7421279f5 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -497,6 +497,22 @@ arguments if required:: $ qemu-system-arm $(QEMU_ARGS) \ -plugin ./contrib/plugins/libexeclog.so,ifilter=3Dst1w,afilter=3D0x400= 01808 -d plugin =20 +This plugin can also dump registers when they change value. Specify the na= me of the +registers with multiple ``reg`` options. You can also use glob style match= ing if you wish:: + + $ qemu-system-arm $(QEMU_ARGS) \ + -plugin ./contrib/plugins/libexeclog.so,reg=3D\*_el2,reg=3Dsp -d plugin + +Be aware that each additional register to check will slow down +execution quite considerably. You can optimise the number of register +checks done by using the rdisas option. This will only instrument +instructions that mention the registers in question in disassembly. +This is not foolproof as some instructions implicitly change +instructions. You can use the ifilter to catch these cases: + + $ qemu-system-arm $(QEMU_ARGS) \ + -plugin ./contrib/plugins/libexeclog.so,ifilter=3Dmsr,ifilter=3Dblr,re= g=3Dx30,reg=3D\*_el1,rdisas=3Don + - contrib/plugins/cache.c =20 Cache modelling plugin that measures the performance of a given L1 cache @@ -583,4 +599,3 @@ The following API is generated from the inline document= ation in include the full kernel-doc annotations. =20 .. kernel-doc:: include/qemu/qemu-plugin.h - diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c index f262e5555eb..dd7168cb548 100644 --- a/contrib/plugins/execlog.c +++ b/contrib/plugins/execlog.c @@ -1,7 +1,7 @@ /* * Copyright (C) 2021, Alexandre Iooss * - * Log instruction execution with memory access. + * Log instruction execution with memory access and register changes * * License: GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -15,29 +15,40 @@ =20 #include =20 +typedef struct { + struct qemu_plugin_register *handle; + GByteArray *last; + GByteArray *new; + const char *name; +} Register; + +typedef struct CPU { + /* Store last executed instruction on each vCPU as a GString */ + GString *last_exec; + /* Ptr array of Register */ + GPtrArray *registers; +} CPU; + QEMU_PLUGIN_EXPORT int qemu_plugin_version =3D QEMU_PLUGIN_VERSION; =20 -/* Store last executed instruction on each vCPU as a GString */ -static GPtrArray *last_exec; +static GArray *cpus; static GRWLock expand_array_lock; =20 static GPtrArray *imatches; static GArray *amatches; +static GPtrArray *rmatches; +static bool disas_assist; +static GMutex add_reg_name_lock; +static GPtrArray *all_reg_names; =20 -/* - * Expand last_exec array. - * - * As we could have multiple threads trying to do this we need to - * serialise the expansion under a lock. - */ -static void expand_last_exec(int cpu_index) +static CPU *get_cpu(int vcpu_index) { - g_rw_lock_writer_lock(&expand_array_lock); - while (cpu_index >=3D last_exec->len) { - GString *s =3D g_string_new(NULL); - g_ptr_array_add(last_exec, s); - } - g_rw_lock_writer_unlock(&expand_array_lock); + CPU *c; + g_rw_lock_reader_lock(&expand_array_lock); + c =3D &g_array_index(cpus, CPU, vcpu_index); + g_rw_lock_reader_unlock(&expand_array_lock); + + return c; } =20 /** @@ -46,13 +57,10 @@ static void expand_last_exec(int cpu_index) static void vcpu_mem(unsigned int cpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, void *udata) { - GString *s; + CPU *c =3D get_cpu(cpu_index); + GString *s =3D c->last_exec; =20 /* Find vCPU in array */ - g_rw_lock_reader_lock(&expand_array_lock); - g_assert(cpu_index < last_exec->len); - s =3D g_ptr_array_index(last_exec, cpu_index); - g_rw_lock_reader_unlock(&expand_array_lock); =20 /* Indicate type of memory access */ if (qemu_plugin_mem_is_store(info)) { @@ -73,32 +81,91 @@ static void vcpu_mem(unsigned int cpu_index, qemu_plugi= n_meminfo_t info, } =20 /** - * Log instruction execution + * Log instruction execution, outputting the last one. + * + * vcpu_insn_exec() is a copy and paste of vcpu_insn_exec_with_regs() + * without the checking of register values when we've attempted to + * optimise with disas_assist. */ -static void vcpu_insn_exec(unsigned int cpu_index, void *udata) +static void insn_check_regs(CPU *cpu) { - GString *s; + for (int n =3D 0; n < cpu->registers->len; n++) { + Register *reg =3D cpu->registers->pdata[n]; + int sz; =20 - /* Find or create vCPU in array */ - g_rw_lock_reader_lock(&expand_array_lock); - if (cpu_index >=3D last_exec->len) { - g_rw_lock_reader_unlock(&expand_array_lock); - expand_last_exec(cpu_index); - g_rw_lock_reader_lock(&expand_array_lock); + g_byte_array_set_size(reg->new, 0); + sz =3D qemu_plugin_read_register(reg->handle, reg->new); + g_assert(sz =3D=3D reg->last->len); + + if (memcmp(reg->last->data, reg->new->data, sz)) { + GByteArray *temp =3D reg->last; + g_string_append_printf(cpu->last_exec, ", %s -> 0x", reg->name= ); + /* TODO: handle BE properly */ + for (int i =3D sz; i >=3D 0; i--) { + g_string_append_printf(cpu->last_exec, "%02x", + reg->new->data[i]); + } + reg->last =3D reg->new; + reg->new =3D temp; + } + } +} + +/* Log last instruction while checking registers */ +static void vcpu_insn_exec_with_regs(unsigned int cpu_index, void *udata) +{ + CPU *cpu =3D get_cpu(cpu_index); + + /* Print previous instruction in cache */ + if (cpu->last_exec->len) { + if (cpu->registers) { + insn_check_regs(cpu); + } + + qemu_plugin_outs(cpu->last_exec->str); + qemu_plugin_outs("\n"); + } + + /* Store new instruction in cache */ + /* vcpu_mem will add memory access information to last_exec */ + g_string_printf(cpu->last_exec, "%u, ", cpu_index); + g_string_append(cpu->last_exec, (char *)udata); +} + +/* Log last instruction while checking registers, ignore next */ +static void vcpu_insn_exec_only_regs(unsigned int cpu_index, void *udata) +{ + CPU *cpu =3D get_cpu(cpu_index); + + /* Print previous instruction in cache */ + if (cpu->last_exec->len) { + if (cpu->registers) { + insn_check_regs(cpu); + } + + qemu_plugin_outs(cpu->last_exec->str); + qemu_plugin_outs("\n"); } - s =3D g_ptr_array_index(last_exec, cpu_index); - g_rw_lock_reader_unlock(&expand_array_lock); + + /* reset */ + cpu->last_exec->len =3D 0; +} + +/* Log last instruction without checking regs, setup next */ +static void vcpu_insn_exec(unsigned int cpu_index, void *udata) +{ + CPU *cpu =3D get_cpu(cpu_index); =20 /* Print previous instruction in cache */ - if (s->len) { - qemu_plugin_outs(s->str); + if (cpu->last_exec->len) { + qemu_plugin_outs(cpu->last_exec->str); qemu_plugin_outs("\n"); } =20 /* Store new instruction in cache */ /* vcpu_mem will add memory access information to last_exec */ - g_string_printf(s, "%u, ", cpu_index); - g_string_append(s, (char *)udata); + g_string_printf(cpu->last_exec, "%u, ", cpu_index); + g_string_append(cpu->last_exec, (char *)udata); } =20 /** @@ -111,6 +178,8 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct q= emu_plugin_tb *tb) { struct qemu_plugin_insn *insn; bool skip =3D (imatches || amatches); + bool check_regs_this =3D rmatches; + bool check_regs_next =3D false; =20 size_t n =3D qemu_plugin_tb_n_insns(tb); for (size_t i =3D 0; i < n; i++) { @@ -131,7 +200,8 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct q= emu_plugin_tb *tb) /* * If we are filtering we better check out if we have any * hits. The skip "latches" so we can track memory accesses - * after the instruction we care about. + * after the instruction we care about. Also enable register + * checking on the next instruction. */ if (skip && imatches) { int j; @@ -139,6 +209,7 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct q= emu_plugin_tb *tb) char *m =3D g_ptr_array_index(imatches, j); if (g_str_has_prefix(insn_disas, m)) { skip =3D false; + check_regs_next =3D rmatches; } } } @@ -153,8 +224,39 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct = qemu_plugin_tb *tb) } } =20 + /* + * Check the disassembly to see if a register we care about + * will be affected by this instruction. This relies on the + * dissembler doing something sensible for the registers we + * care about. + */ + if (disas_assist && rmatches) { + check_regs_next =3D false; + gchar *args =3D g_strstr_len(insn_disas, -1, " "); + for (int n =3D 0; n < all_reg_names->len; n++) { + gchar *reg =3D g_ptr_array_index(all_reg_names, n); + if (g_strrstr(args, reg)) { + check_regs_next =3D true; + skip =3D false; + } + } + } + + /* + * We now have 3 choices: + * + * - Log insn + * - Log insn while checking registers + * - Don't log this insn but check if last insn changed registers + */ + if (skip) { - g_free(insn_disas); + if (check_regs_this) { + qemu_plugin_register_vcpu_insn_exec_cb(insn, + vcpu_insn_exec_only= _regs, + QEMU_PLUGIN_CB_R_RE= GS, + NULL); + } } else { uint32_t insn_opcode; insn_opcode =3D *((uint32_t *)qemu_plugin_insn_data(insn)); @@ -167,30 +269,124 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struc= t qemu_plugin_tb *tb) QEMU_PLUGIN_MEM_RW, NULL); =20 /* Register callback on instruction */ - qemu_plugin_register_vcpu_insn_exec_cb(insn, vcpu_insn_exec, - QEMU_PLUGIN_CB_NO_REGS,= output); + if (check_regs_this) { + qemu_plugin_register_vcpu_insn_exec_cb( + insn, vcpu_insn_exec_with_regs, + QEMU_PLUGIN_CB_R_REGS, + output); + } else { + qemu_plugin_register_vcpu_insn_exec_cb( + insn, vcpu_insn_exec, + QEMU_PLUGIN_CB_NO_REGS, + output); + } =20 /* reset skip */ skip =3D (imatches || amatches); } =20 + /* set regs for next */ + if (disas_assist && rmatches) { + check_regs_this =3D check_regs_next; + } + + g_free(insn_disas); } } =20 +static Register *init_vcpu_register(qemu_plugin_reg_descriptor *desc) +{ + Register *reg =3D g_new0(Register, 1); + g_autofree gchar *lower =3D g_utf8_strdown(desc->name, -1); + int r; + + reg->handle =3D desc->handle; + reg->name =3D g_intern_string(lower); + reg->last =3D g_byte_array_new(); + reg->new =3D g_byte_array_new(); + + /* read the initial value */ + r =3D qemu_plugin_read_register(reg->handle, reg->last); + g_assert(r > 0); + return reg; +} + +static GPtrArray *registers_init(int vcpu_index) +{ + g_autoptr(GPtrArray) registers =3D g_ptr_array_new(); + g_autoptr(GArray) reg_list =3D qemu_plugin_get_registers(); + + if (rmatches && reg_list && reg_list->len) { + /* + * Go through each register in the complete list and + * see if we want to track it. + */ + for (int r =3D 0; r < reg_list->len; r++) { + qemu_plugin_reg_descriptor *rd =3D &g_array_index( + reg_list, qemu_plugin_reg_descriptor, r); + for (int p =3D 0; p < rmatches->len; p++) { + g_autoptr(GPatternSpec) pat =3D g_pattern_spec_new(rmatche= s->pdata[p]); + g_autofree gchar *rd_lower =3D g_utf8_strdown(rd->name, -1= ); + if (g_pattern_match_string(pat, rd->name) || + g_pattern_match_string(pat, rd_lower)) { + Register *reg =3D init_vcpu_register(rd); + g_ptr_array_add(registers, reg); + + /* we need a list of regnames at TB translation time */ + if (disas_assist) { + g_mutex_lock(&add_reg_name_lock); + if (!g_ptr_array_find(all_reg_names, reg->name, NU= LL)) { + g_ptr_array_add(all_reg_names, reg->name); + } + g_mutex_unlock(&add_reg_name_lock); + } + } + } + } + } + + return registers->len ? g_steal_pointer(®isters) : NULL; +} + +/* + * Initialise a new vcpu/thread with: + * - last_exec tracking data + * - list of tracked registers + * - initial value of registers + * + * As we could have multiple threads trying to do this we need to + * serialise the expansion under a lock. + */ +static void vcpu_init(qemu_plugin_id_t id, unsigned int vcpu_index) +{ + CPU *c; + + g_rw_lock_writer_lock(&expand_array_lock); + if (vcpu_index >=3D cpus->len) { + g_array_set_size(cpus, vcpu_index + 1); + } + g_rw_lock_writer_unlock(&expand_array_lock); + + c =3D get_cpu(vcpu_index); + c->last_exec =3D g_string_new(NULL); + c->registers =3D registers_init(vcpu_index); +} + /** * On plugin exit, print last instruction in cache */ static void plugin_exit(qemu_plugin_id_t id, void *p) { guint i; - GString *s; - for (i =3D 0; i < last_exec->len; i++) { - s =3D g_ptr_array_index(last_exec, i); - if (s->str) { - qemu_plugin_outs(s->str); + g_rw_lock_reader_lock(&expand_array_lock); + for (i =3D 0; i < cpus->len; i++) { + CPU *c =3D get_cpu(i); + if (c->last_exec && c->last_exec->str) { + qemu_plugin_outs(c->last_exec->str); qemu_plugin_outs("\n"); } } + g_rw_lock_reader_unlock(&expand_array_lock); } =20 /* Add a match to the array of matches */ @@ -212,6 +408,18 @@ static void parse_vaddr_match(char *match) g_array_append_val(amatches, v); } =20 +/* + * We have to wait until vCPUs are started before we can check the + * patterns find anything. + */ +static void add_regpat(char *regpat) +{ + if (!rmatches) { + rmatches =3D g_ptr_array_new(); + } + g_ptr_array_add(rmatches, g_strdup(regpat)); +} + /** * Install the plugin */ @@ -223,11 +431,8 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin= _id_t id, * Initialize dynamic array to cache vCPU instruction. In user mode * we don't know the size before emulation. */ - if (info->system_emulation) { - last_exec =3D g_ptr_array_sized_new(info->system.max_vcpus); - } else { - last_exec =3D g_ptr_array_new(); - } + cpus =3D g_array_sized_new(true, true, sizeof(CPU), + info->system_emulation ? info->system.max_vcp= us : 1); =20 for (int i =3D 0; i < argc; i++) { char *opt =3D argv[i]; @@ -236,13 +441,22 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugi= n_id_t id, parse_insn_match(tokens[1]); } else if (g_strcmp0(tokens[0], "afilter") =3D=3D 0) { parse_vaddr_match(tokens[1]); + } else if (g_strcmp0(tokens[0], "reg") =3D=3D 0) { + add_regpat(tokens[1]); + } else if (g_strcmp0(tokens[0], "rdisas") =3D=3D 0) { + if (!qemu_plugin_bool_parse(tokens[0], tokens[1], &disas_assis= t)) { + fprintf(stderr, "boolean argument parsing failed: %s\n", o= pt); + return -1; + } + all_reg_names =3D g_ptr_array_new(); } else { fprintf(stderr, "option parsing failed: %s\n", opt); return -1; } } =20 - /* Register translation block and exit callbacks */ + /* Register init, translation block and exit callbacks */ + qemu_plugin_register_vcpu_init_cb(id, vcpu_init); qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); =20 --=20 2.39.2