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([177.94.15.159]) by smtp.gmail.com with ESMTPSA id j2-20020a170902758200b001db40866e25sm1733679pll.308.2024.02.15.14.40.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 14:40:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1708036838; x=1708641638; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lTTNcK59UiSXYalt2ktdHl6kS2NT43afEsYVYkGvX6k=; b=Rk29nn/hg2m2WiO+S1DOschvUmvIXi3Y/oPtfUozkXpzlzF6pK/8kzo++RbsqUi4iR SN8d5VMvCYB4RRXJZrzgfvUi05X/hKAyIyc+1HKoW7259h9C7tpXjwGwks9Oic/QQEuP wQY8rLKR0ZeMabKL8vQPmxS2nDUhLHUP0hmncRG6rnD1+atpYgXL0nvH3NZqCtQJr0hD tUkOeRAsO0OS2Dp8isNwC5luaCIzsSt4ClWlyR6qOHTwxnMHrJifxAWuxXpG/7zJwF8m 4KptHUINlTEuKWUJrLDFZH9kpoc8/Wwx6V2cKvBStQZjUs2O4XWh8rcbi28DOQgUZKoW vIrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708036838; x=1708641638; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lTTNcK59UiSXYalt2ktdHl6kS2NT43afEsYVYkGvX6k=; b=CcA2aKImqpdL1YiNNT92iOmnSEQGgM7mcrpzl/p+Efuc2hJweyWo4LP9jEKKwjChFI JiscMhetYRNpTmBPmiCjRESnOl3i7kd8/Vb6qPe59PSq1LucscBC7U9mvImgSYOBuJXU 6HkX2YrZ5ND5Xd1zboc1v7/dM4NoeKoVoWUh1bnxFc9RcXIzioqJHNQmXPK8So+g20Ox aUuXCpnTqrAv1SXzLKwpegxy8IV0/7+UBk2Q/ckruOWRslcGRRbv7mtLcbjrrFms7YMX T52MQTapkKHzZf3nZQ2ApPERitmZq1KPTMrIYlk6dkODLHQ6p37c5bPTv4RzdI+SxV9O l+cg== X-Gm-Message-State: AOJu0YzSUiNcDNYRJRHDvBmfY1+uBtL2GpA7XPUH9YvlhLmBEgzcKl2J hr2F4xOH3jr/W3QlUCu/CldFD8TE3MOBNJ9HYufJ1adAXvpI04qOrAD7mmql+fZParY/qwzcOrG + X-Google-Smtp-Source: AGHT+IFXEYRKewXhM2hkRWrQtboAGIpmiggQRYIqQJWX1FL7856E0gtqEBWF4t+maF1E9Tn2jdDRLg== X-Received: by 2002:a17:902:650e:b0:1d9:7046:fbcd with SMTP id b14-20020a170902650e00b001d97046fbcdmr2734641plk.3.1708036838141; Thu, 15 Feb 2024 14:40:38 -0800 (PST) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Andrew Jones , Daniel Henrique Barboza Subject: [PATCH v4 4/6] target/riscv: Reset henvcfg to zero Date: Thu, 15 Feb 2024 19:39:53 -0300 Message-ID: <20240215223955.969568-5-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240215223955.969568-1-dbarboza@ventanamicro.com> References: <20240215223955.969568-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=dbarboza@ventanamicro.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ventanamicro.com) X-ZM-MESSAGEID: 1708036912474100003 Content-Type: text/plain; charset="utf-8" From: Andrew Jones The hypervisor should decide what it wants to enable. Zero all configuration enable bits on reset. Also, commit ed67d63798f2 ("target/riscv: Update CSR bits name for svadu extension") missed one reference to 'hade'. Change it now. Fixes: 0af3f115e68e ("target/riscv: Add *envcfg.HADE related check in addre= ss translation") Fixes: ed67d63798f2 ("target/riscv: Update CSR bits name for svadu extensio= n") Reviewed-by: Daniel Henrique Barboza Signed-off-by: Andrew Jones Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 3 +-- target/riscv/csr.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f424751962..e5eef3a4de 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -961,8 +961,7 @@ static void riscv_cpu_reset_hold(Object *obj) =20 env->menvcfg =3D (cpu->cfg.ext_svpbmt ? MENVCFG_PBMTE : 0) | (cpu->cfg.ext_svadu ? MENVCFG_ADUE : 0); - env->henvcfg =3D (cpu->cfg.ext_svpbmt ? HENVCFG_PBMTE : 0) | - (cpu->cfg.ext_svadu ? HENVCFG_ADUE : 0); + env->henvcfg =3D 0; =20 /* Initialized default priorities of local interrupts. */ for (i =3D 0; i < ARRAY_SIZE(env->miprio); i++) { diff --git a/target/riscv/csr.c b/target/riscv/csr.c index d4e8ac13b9..cc9cef3d85 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -2133,7 +2133,7 @@ static RISCVException read_henvcfg(CPURISCVState *env= , int csrno, /* * henvcfg.pbmte is read_only 0 when menvcfg.pbmte =3D 0 * henvcfg.stce is read_only 0 when menvcfg.stce =3D 0 - * henvcfg.hade is read_only 0 when menvcfg.hade =3D 0 + * henvcfg.adue is read_only 0 when menvcfg.adue =3D 0 */ *val =3D env->henvcfg & (~(HENVCFG_PBMTE | HENVCFG_STCE | HENVCFG_ADUE= ) | env->menvcfg); --=20 2.43.0