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[114.35.142.126]) by smtp.gmail.com with ESMTPSA id u8-20020a170902a60800b001db5ee73fe9sm1618653plq.114.2024.02.15.11.28.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 11:28:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1708025318; x=1708630118; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3KR/e7xd2t/WfUhq1nU3nYx+Y5DrBWOVXBN9h9UKvfc=; b=RjVJwxAdZRI1wo40etlhF1Ffh0FaC5Eutzl9iHNbDcox3hjElCl5OZdAnojTDOU93c i2STawdRueljR01Pttx+pztyy1Ddx8yf2aAHvyp80wvlkRBtZ8e55jYJH8yguGS1015p ZCne2UufDLVif8tHNbMSMDseCE6TGmjuuBqJtNa9cynltNPN/nmzSIFC4TwoOxxOjQKt aIKMYdrjTFVFiv2mltNIXVzwUhRPOvhu5C7jRTebUnVRCrGPlMGeTZRgpsoWPuGDWosC 1IfEO8K7+MFrfF1WOUu3ZYWnQSOGb7/lP7LBoW0PWe9o6Rg4DGMH5mIy8GPSR7bJfFyZ xhJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708025318; x=1708630118; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3KR/e7xd2t/WfUhq1nU3nYx+Y5DrBWOVXBN9h9UKvfc=; b=Lp8zTnqb8wiKCkd3tnqs0Scl2WRZO4iQePTm92yuMNPMy+v7RXn9IWAkhSsb+Ek2A/ Hgeaz/2pFfOwh2C8cuZpnrM/8GDHA1baCpJtor1ZXQE+I3TFqwVGuOGnXA2KVPzkP/QE JWTJcWzzO7XspbaxUVGTeOqGoSZbAghs8SqqUP3PSMys8esilsJ69o3U35wCc0jMbIo1 Q8tJPy6NuUX+i71CQixQyaQqbmUmASLmg2fswjR4N3YSNI4tPoT0At6zL8GfjFG6c3Wf r1oMDZTX1Yg9ekg3tpI0ON2Jo5MWKCBWk227RrMIKB8/wpAwomuEHv8Wq7rNKVqZMmqE M89g== X-Gm-Message-State: AOJu0YwgK8SyBmG5Rag5rJFoexdnyEwZJ1iAQT616b8IviDGsYTv+4R5 lQTKHl7OoCxkTuf8CYidYELZv7KgiFb/GVBf0erDfWl9hozth2HvGfSLwLU3eTM6pCo6rzX+IWz W2hcT/WgVgO2k0UmE5Zjr23SyOfHXSN13BlmJOJ0UKRhPq4EOBNnHoeJvegUKk7nz4ZOmveyCal d89+mcWYZixtnr6NUaAggXILnHxULDAAnX+T/Qa9JH X-Google-Smtp-Source: AGHT+IHH07zKpvDk6lvEZgaiG7tRGZgTkNUFnN8TiRSiVQbRRAR2azynSv/UhmuI4NuIotPhoe4okg== X-Received: by 2002:a17:902:8218:b0:1db:5eaa:e9a2 with SMTP id x24-20020a170902821800b001db5eaae9a2mr2529567pln.64.1708025317939; Thu, 15 Feb 2024 11:28:37 -0800 (PST) From: Max Chou To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: dbarboza@ventanamicro.com, Max Chou , Richard Henderson , Paolo Bonzini Subject: [RFC PATCH 2/6] accel/tcg: Avoid uncessary call overhead from qemu_plugin_vcpu_mem_cb Date: Fri, 16 Feb 2024 03:28:13 +0800 Message-Id: <20240215192823.729209-3-max.chou@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240215192823.729209-1-max.chou@sifive.com> References: <20240215192823.729209-1-max.chou@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=max.chou@sifive.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @sifive.com) X-ZM-MESSAGEID: 1708025423682100001 Content-Type: text/plain; charset="utf-8" If there are not any QEMU plugin memory callback functions, checking before calling the qemu_plugin_vcpu_mem_cb function can reduce the function call overhead. Signed-off-by: Max Chou --- accel/tcg/ldst_common.c.inc | 40 +++++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 10 deletions(-) diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index c82048e377e..bf24986c562 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -134,7 +134,9 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, Me= mOpIdx oi, uintptr_t ra) =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_UB); ret =3D do_ld1_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_load_cb(env, addr, oi); + } return ret; } =20 @@ -145,7 +147,9 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_16); ret =3D do_ld2_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_load_cb(env, addr, oi); + } return ret; } =20 @@ -156,7 +160,9 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_32); ret =3D do_ld4_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_load_cb(env, addr, oi); + } return ret; } =20 @@ -167,7 +173,9 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_64); ret =3D do_ld8_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_load_cb(env, addr, oi); + } return ret; } =20 @@ -178,7 +186,9 @@ Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_128); ret =3D do_ld16_mmu(env_cpu(env), addr, oi, ra); - plugin_load_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_load_cb(env, addr, oi); + } return ret; } =20 @@ -195,7 +205,9 @@ void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8= _t val, MemOpIdx oi, uintptr_t retaddr) { helper_stb_mmu(env, addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_store_cb(env, addr, oi); + } } =20 void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, @@ -203,7 +215,9 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint1= 6_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_16); do_st2_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_store_cb(env, addr, oi); + } } =20 void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, @@ -211,7 +225,9 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint3= 2_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_32); do_st4_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_store_cb(env, addr, oi); + } } =20 void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, @@ -219,7 +235,9 @@ void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint6= 4_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_64); do_st8_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_store_cb(env, addr, oi); + } } =20 void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, @@ -227,7 +245,9 @@ void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int1= 28 val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_128); do_st16_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + plugin_store_cb(env, addr, oi); + } } =20 /* --=20 2.34.1