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Thu, 15 Feb 2024 10:02:02 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-block@nongnu.org, =?UTF-8?q?Cl=C3=A9ment=20Chigot?= , Frederic Konrad , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Artyom Tarasenko Subject: [PULL 37/56] target/sparc: implement asr17 feature for smp Date: Thu, 15 Feb 2024 18:57:31 +0100 Message-ID: <20240215175752.82828-38-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240215175752.82828-1-philmd@linaro.org> References: <20240215175752.82828-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1708020194196100001 From: Cl=C3=A9ment Chigot This allows the guest program to know its cpu id. Co-developed-by: Frederic Konrad Signed-off-by: Cl=C3=A9ment Chigot Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-ID: <20240131085047.18458-6-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- target/sparc/helper.h | 1 + target/sparc/helper.c | 16 ++++++++++++++++ target/sparc/translate.c | 13 +++---------- 3 files changed, 20 insertions(+), 10 deletions(-) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 6a42ba4e9e..e55fad5b8c 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -2,6 +2,7 @@ DEF_HELPER_1(rett, void, env) DEF_HELPER_2(wrpsr, void, env, tl) DEF_HELPER_1(rdpsr, tl, env) +DEF_HELPER_1(rdasr17, tl, env) DEF_HELPER_1(power_down, void, env) #else DEF_HELPER_FLAGS_2(wrpil, TCG_CALL_NO_RWG, void, env, tl) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index bd10b60e4b..2247e243b5 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -212,4 +212,20 @@ void helper_power_down(CPUSPARCState *env) env->npc =3D env->pc + 4; cpu_loop_exit(cs); } + +target_ulong helper_rdasr17(CPUSPARCState *env) +{ + CPUState *cs =3D env_cpu(env); + target_ulong val; + + /* + * TODO: There are many more fields to be filled, + * some of which are writable. + */ + val =3D env->def.nwindows - 1; /* [4:0] NWIN */ + val |=3D 1 << 8; /* [8] V8 */ + val |=3D (cs->cpu_index) << 28; /* [31:28] INDEX */ + + return val; +} #endif diff --git a/target/sparc/translate.c b/target/sparc/translate.c index d9304a5bc4..692ce0b010 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -37,6 +37,7 @@ =20 #ifdef TARGET_SPARC64 # define gen_helper_rdpsr(D, E) qemu_build_not_reached() +# define gen_helper_rdasr17(D, E) qemu_build_not_reached() # define gen_helper_rett(E) qemu_build_not_reached() # define gen_helper_power_down(E) qemu_build_not_reached() # define gen_helper_wrpsr(E, S) qemu_build_not_reached() @@ -2382,16 +2383,8 @@ static bool trans_RDY(DisasContext *dc, arg_RDY *a) =20 static TCGv do_rd_leon3_config(DisasContext *dc, TCGv dst) { - uint32_t val; - - /* - * TODO: There are many more fields to be filled, - * some of which are writable. - */ - val =3D dc->def->nwindows - 1; /* [4:0] NWIN */ - val |=3D 1 << 8; /* [8] V8 */ - - return tcg_constant_tl(val); + gen_helper_rdasr17(dst, tcg_env); + return dst; } =20 TRANS(RDASR17, ASR17, do_rd_special, true, a->rd, do_rd_leon3_config) --=20 2.41.0