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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 04/35] target/arm: Adjust and validate mtedesc sizem1
Date: Thu, 15 Feb 2024 17:35:07 +0000
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From: Richard Henderson <richard.henderson@linaro.org>
When we added SVE_MTEDESC_SHIFT, we effectively limited the
maximum size of MTEDESC. Adjust SIZEM1 to consume the remaining
bits (32 - 10 - 5 - 12 =3D=3D 5). Assert that the data to be stored
fits within the field (expecting 8 * 4 - 1 =3D=3D 31, exact fit).
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20240207025210.8837-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/internals.h | 2 +-
target/arm/tcg/translate-sve.c | 7 ++++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index fc337fe40e5..50bff445494 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1278,7 +1278,7 @@ FIELD(MTEDESC, TBI, 4, 2)
FIELD(MTEDESC, TCMA, 6, 2)
FIELD(MTEDESC, WRITE, 8, 1)
FIELD(MTEDESC, ALIGN, 9, 3)
-FIELD(MTEDESC, SIZEM1, 12, SIMD_DATA_BITS - 12) /* size - 1 */
+FIELD(MTEDESC, SIZEM1, 12, SIMD_DATA_BITS - SVE_MTEDESC_SHIFT - 12) /* si=
ze - 1 */
=20
bool mte_probe(CPUARMState *env, uint32_t desc, uint64_t ptr);
uint64_t mte_check(CPUARMState *env, uint32_t desc, uint64_t ptr, uintptr_=
t ra);
diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
index 7108938251e..a88e523cbab 100644
--- a/target/arm/tcg/translate-sve.c
+++ b/target/arm/tcg/translate-sve.c
@@ -4443,17 +4443,18 @@ static void do_mem_zpa(DisasContext *s, int zt, int=
pg, TCGv_i64 addr,
{
unsigned vsz =3D vec_full_reg_size(s);
TCGv_ptr t_pg;
+ uint32_t sizem1;
int desc =3D 0;
=20
assert(mte_n >=3D 1 && mte_n <=3D 4);
+ sizem1 =3D (mte_n << dtype_msz(dtype)) - 1;
+ assert(sizem1 <=3D R_MTEDESC_SIZEM1_MASK >> R_MTEDESC_SIZEM1_SHIFT);
if (s->mte_active[0]) {
- int msz =3D dtype_msz(dtype);
-
desc =3D FIELD_DP32(desc, MTEDESC, MIDX, get_mem_index(s));
desc =3D FIELD_DP32(desc, MTEDESC, TBI, s->tbid);
desc =3D FIELD_DP32(desc, MTEDESC, TCMA, s->tcma);
desc =3D FIELD_DP32(desc, MTEDESC, WRITE, is_write);
- desc =3D FIELD_DP32(desc, MTEDESC, SIZEM1, (mte_n << msz) - 1);
+ desc =3D FIELD_DP32(desc, MTEDESC, SIZEM1, sizem1);
desc <<=3D SVE_MTEDESC_SHIFT;
} else {
addr =3D clean_data_tbi(s, addr);
--=20
2.34.1