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bh=8ZKfU39A1bMk0UwDjVa+J1YcXnTXR8vg2vSYAIExryI=; b=jGbciuiYv+72SW4GbPcuZpouWvgMiab/g6QZkrze5wkc9z4D+HTFX4NTfTffkwHJAeJquT 24HPWP/MJYovBnc0JDF1tJuafM0rzv0cB+D2r5CrxYli1v8Z/1/ctLhceg5vuK9InpWEKh DekKvN6ZjY/BMiquvdDQaT2KvP3N4wA= X-MC-Unique: qViMEr85OnC9Jn-M5PsGuA-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, mst@redhat.com, peter.maydell@linaro.org, clg@redhat.com, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: alex.williamson@redhat.com, jasowang@redhat.com Subject: [PATCH v5 1/4] virtio-iommu: Add an option to define the input range width Date: Thu, 15 Feb 2024 09:42:11 +0100 Message-ID: <20240215084315.863897-2-eric.auger@redhat.com> In-Reply-To: <20240215084315.863897-1-eric.auger@redhat.com> References: <20240215084315.863897-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.531, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1707986686668100001 aw-bits is a new option that allows to set the bit width of the input address range. This value will be used as a default for the device config input_range.end. By default it is set to 64 bits which is the current value. Signed-off-by: Eric Auger Reviewed-by: Zhenzhong Duan Reviewed-by: C=C3=A9dric Le Goater --- v1 -> v2: - Check the aw-bits value is within [32,64] --- include/hw/virtio/virtio-iommu.h | 1 + hw/virtio/virtio-iommu.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-io= mmu.h index 781ebaea8f..5fbe4677c2 100644 --- a/include/hw/virtio/virtio-iommu.h +++ b/include/hw/virtio/virtio-iommu.h @@ -66,6 +66,7 @@ struct VirtIOIOMMU { bool boot_bypass; Notifier machine_done; bool granule_frozen; + uint8_t aw_bits; }; =20 #endif diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 86623d55a5..8b541de850 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1314,7 +1314,11 @@ static void virtio_iommu_device_realize(DeviceState = *dev, Error **errp) */ s->config.bypass =3D s->boot_bypass; s->config.page_size_mask =3D qemu_target_page_mask(); - s->config.input_range.end =3D UINT64_MAX; + if (s->aw_bits < 32 || s->aw_bits > 64) { + error_setg(errp, "aw-bits must be within [32,64]"); + } + s->config.input_range.end =3D + s->aw_bits =3D=3D 64 ? UINT64_MAX : BIT_ULL(s->aw_bits) - 1; s->config.domain_range.end =3D UINT32_MAX; s->config.probe_size =3D VIOMMU_PROBE_SIZE; =20 @@ -1522,6 +1526,7 @@ static Property virtio_iommu_properties[] =3D { DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, TYPE_PCI_BUS, PCIBus *), DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), + DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 2.41.0 From nobody Tue Nov 26 10:23:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1707986700; cv=none; d=zohomail.com; s=zohoarc; b=CJmZGZytHNZFT/dI/X7W/EQFZH2lW2B2h6pC0au7iuhX0wrFT71ZH8fN/dk+tbnrVA2IPLOm/SOUFWfE59hXGWKnk9Cr0N797eLeHhMbaPWfqLik4yzDUt9DcNuIYEUT4DHk3txeVPtAhaQiYpE+cOJje3rnSfbpiUGBZKZEvg4= ARC-Message-Signature: i=1; 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Thu, 15 Feb 2024 08:43:29 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.39.193.101]) by smtp.corp.redhat.com (Postfix) with ESMTP id A992EAC0A; Thu, 15 Feb 2024 08:43:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1707986652; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cyZooDCSfcEkdv9/7vg+GOMr/LkugjJbT4YX/tuXRXs=; b=fz4mbS6Cim7iSYjtAyws0qlmdwLzxipyPe4K7e+sAFpMEdbo2WDx+EZUJRP1mrRVcUgLI9 RsJmASTBMDiss0dJBGNPkIY/NNqMC+Mn60MJM8MT6Ss/i+rUZTrI+12UXY4TzmCq8QgVGp kijzEns7kbS53nFCkCmr/kdDi1IuyFk= X-MC-Unique: Uxham-c1OeObl78R7R1Bdg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, mst@redhat.com, peter.maydell@linaro.org, clg@redhat.com, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: alex.williamson@redhat.com, jasowang@redhat.com Subject: [PATCH v5 2/4] virtio-iommu: Trace domain range limits as unsigned int Date: Thu, 15 Feb 2024 09:42:12 +0100 Message-ID: <20240215084315.863897-3-eric.auger@redhat.com> In-Reply-To: <20240215084315.863897-1-eric.auger@redhat.com> References: <20240215084315.863897-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.531, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_HELO_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1707986702746100001 Use %u format to trace domain_range limits. Signed-off-by: Eric Auger Reviewed-by: Zhenzhong Duan Reviewed-by: C=C3=A9dric Le Goater --- hw/virtio/trace-events | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 77905d1994..2350849fbd 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -111,7 +111,7 @@ virtio_iommu_device_reset(void) "reset!" virtio_iommu_system_reset(void) "system reset!" virtio_iommu_get_features(uint64_t features) "device supports features=3D0= x%"PRIx64 virtio_iommu_device_status(uint8_t status) "driver status =3D %d" -virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t = end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8= _t bypass) "page_size_mask=3D0x%"PRIx64" input range start=3D0x%"PRIx64" in= put range end=3D0x%"PRIx64" domain range start=3D%d domain range end=3D%d p= robe_size=3D0x%x bypass=3D0x%x" +virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t = end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8= _t bypass) "page_size_mask=3D0x%"PRIx64" input range start=3D0x%"PRIx64" in= put range end=3D0x%"PRIx64" domain range start=3D%u domain range end=3D%u p= robe_size=3D0x%x bypass=3D0x%x" virtio_iommu_set_config(uint8_t bypass) "bypass=3D0x%x" virtio_iommu_attach(uint32_t domain_id, uint32_t ep_id) "domain=3D%d endpo= int=3D%d" virtio_iommu_detach(uint32_t domain_id, uint32_t ep_id) "domain=3D%d endpo= int=3D%d" --=20 2.41.0 From nobody Tue Nov 26 10:23:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=WhfD4H1lq1cIUvrRfuqhNN4ApQ6HAgwLpt5SyBkOdxA=; b=EX149tx9r2DDkopDJdw1kZvUxjhWhjsKpUsdNS2qGe3cuWdCfSyOCsmRT22Bqxf16kco8q uaITwBF7ssuM0kmfUwAvTgko3hVptoFbTG2+KpAouUffRqQ5+uBOXWxoGRXIw5YR1eoa46 fWK5lKCbFNbBm5g0OkiCrMZp89NRJgM= X-MC-Unique: Vt2O73IoNaOIw3Hxvf1oUg-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, mst@redhat.com, peter.maydell@linaro.org, clg@redhat.com, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: alex.williamson@redhat.com, jasowang@redhat.com Subject: [PATCH v5 3/4] hw: Set virtio-iommu aw-bits default value on pc_q35 and arm virt Date: Thu, 15 Feb 2024 09:42:13 +0100 Message-ID: <20240215084315.863897-4-eric.auger@redhat.com> In-Reply-To: <20240215084315.863897-1-eric.auger@redhat.com> References: <20240215084315.863897-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.531, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1707986658571100001 Currently the default input range can extend to 64 bits. On x86, when the virtio-iommu protects vfio devices, the physical iommu may support only 39 bits. Let's set the default to 39, as done for the intel-iommu. On ARM we set 48b as a default (matching SMMUv3 SMMU_IDR5.VAX =3D=3D 0). We use hw_compat_8_2 to handle the compatibility for machines before 9.0 which used to have a virtio-iommu default input range of 64 bits. Of course if aw-bits is set from the command line, the default is overriden. Signed-off-by: Eric Auger Reviewed-by: Zhenzhong Duan Tested-by: Yanghang Liu --- v3 -> v4: - update the qos test to relax the check on the max input IOVA v2 -> v3: - collected Zhenzhong's R-b - use &error_abort instead of NULL error handle on object_property_get_uint() call (C=C3=A9dric) - use VTD_HOST_AW_39BIT (C=C3=A9dric) v1 -> v2: - set aw-bits to 48b on ARM - use hw_compat_8_2 to handle the compat for older machines which used 64b as a default --- hw/arm/virt.c | 6 ++++++ hw/core/machine.c | 5 ++++- hw/i386/pc.c | 6 ++++++ hw/virtio/virtio-iommu.c | 2 +- tests/qtest/virtio-iommu-test.c | 2 +- 5 files changed, 18 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 368c2a415a..0994f2a560 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2716,10 +2716,16 @@ static void virt_machine_device_pre_plug_cb(Hotplug= Handler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_pre_plug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + uint8_t aw_bits =3D object_property_get_uint(OBJECT(dev), + "aw-bits", &error_abort= ); hwaddr db_start =3D 0, db_end =3D 0; QList *reserved_regions; char *resv_prop_str; =20 + if (!aw_bits) { + qdev_prop_set_uint8(dev, "aw-bits", 48); + } + if (vms->iommu !=3D VIRT_IOMMU_NONE) { error_setg(errp, "virt machine does not support multiple IOMMU= s"); return; diff --git a/hw/core/machine.c b/hw/core/machine.c index fb5afdcae4..70ac96954c 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -30,9 +30,12 @@ #include "exec/confidential-guest-support.h" #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-net.h" +#include "hw/virtio/virtio-iommu.h" #include "audio/audio.h" =20 -GlobalProperty hw_compat_8_2[] =3D {}; +GlobalProperty hw_compat_8_2[] =3D { + { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, +}; const size_t hw_compat_8_2_len =3D G_N_ELEMENTS(hw_compat_8_2); =20 GlobalProperty hw_compat_8_1[] =3D { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 196827531a..ee2d379c90 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1456,6 +1456,8 @@ static void pc_machine_device_pre_plug_cb(HotplugHand= ler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_pre_plug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + uint8_t aw_bits =3D object_property_get_uint(OBJECT(dev), + "aw-bits", &error_abort= ); /* Declare the APIC range as the reserved MSI region */ char *resv_prop_str =3D g_strdup_printf("0xfee00000:0xfeefffff:%d", VIRTIO_IOMMU_RESV_MEM_T_MSI); @@ -1464,6 +1466,10 @@ static void pc_machine_device_pre_plug_cb(HotplugHan= dler *hotplug_dev, qlist_append_str(reserved_regions, resv_prop_str); qdev_prop_set_array(dev, "reserved-regions", reserved_regions); =20 + if (!aw_bits) { + qdev_prop_set_uint8(dev, "aw-bits", VTD_HOST_AW_39BIT); + } + g_free(resv_prop_str); } =20 diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 8b541de850..2ec5ef3cd1 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1526,7 +1526,7 @@ static Property virtio_iommu_properties[] =3D { DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, TYPE_PCI_BUS, PCIBus *), DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), - DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), + DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 0), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/tests/qtest/virtio-iommu-test.c b/tests/qtest/virtio-iommu-tes= t.c index 068e7a9e6c..0f36381acb 100644 --- a/tests/qtest/virtio-iommu-test.c +++ b/tests/qtest/virtio-iommu-test.c @@ -34,7 +34,7 @@ static void pci_config(void *obj, void *data, QGuestAlloc= ator *t_alloc) uint8_t bypass =3D qvirtio_config_readb(dev, 36); =20 g_assert_cmpint(input_range_start, =3D=3D, 0); - g_assert_cmphex(input_range_end, =3D=3D, UINT64_MAX); + g_assert_cmphex(input_range_end, >=3D, 32); g_assert_cmpint(domain_range_start, =3D=3D, 0); g_assert_cmpint(domain_range_end, =3D=3D, UINT32_MAX); g_assert_cmpint(bypass, =3D=3D, 1); --=20 2.41.0 From nobody Tue Nov 26 10:23:48 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; 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Thu, 15 Feb 2024 03:43:36 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 182D785CBA3; Thu, 15 Feb 2024 08:43:36 +0000 (UTC) Received: from laptop.redhat.com (unknown [10.39.193.101]) by smtp.corp.redhat.com (Postfix) with ESMTP id 24D75AC0F; Thu, 15 Feb 2024 08:43:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1707986618; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qTDP635O3rFuA54PetQfruYqv8ZMSnd1Lx/gmGu1pDA=; b=MffuVIcDrAMk6qTojnRbQd7JxW/gCeBvjHRfobuUNzRnTFa4uhoUjOclMm0BDHqpSZDZcj LUFQdwAMJu9RJLyTYNiz9OXCEXHSyCd8pM9iL0dVBkhgaU0XXW5YXJ9CTDuGpxE2YEwmh+ MdftxT7+FCugLIarYD80NmQVf+Z2O6I= X-MC-Unique: D3YyCsPsPXWCsgE6BrzbxQ-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, mst@redhat.com, peter.maydell@linaro.org, clg@redhat.com, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: alex.williamson@redhat.com, jasowang@redhat.com Subject: [PATCH v5 4/4] qemu-options.hx: Add an entry for virtio-iommu-pci and document aw-bits Date: Thu, 15 Feb 2024 09:42:14 +0100 Message-ID: <20240215084315.863897-5-eric.auger@redhat.com> In-Reply-To: <20240215084315.863897-1-eric.auger@redhat.com> References: <20240215084315.863897-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.531, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1707986648506100001 We are missing an entry for the virtio-iommu-pci device. Add the information on which machine it is currently supported and document the new aw-bits option. Signed-off-by: Eric Auger Reviewed-by: C=C3=A9dric Le Goater --- v4 -> v5 - tweek the aw-bits option description according to C=C3=A9dric's suggestion --- qemu-options.hx | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qemu-options.hx b/qemu-options.hx index 8547254dbf..a98bc7bd60 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -1172,6 +1172,14 @@ SRST Please also refer to the wiki page for general scenarios of VT-d emulation in QEMU: https://wiki.qemu.org/Features/VT-d. =20 +``-device virtio-iommu-pci[,option=3D...]`` + This is only supported by ``-machine q35`` and ``-machine virt``. + It supports below options: + + ``aw-bits=3Dval`` (val between 32 and 64, default depends on machine) + This decides the address width of IOVA address space. It defaults + to 39 bits on q35 machines and 48 bits on ARM virt machines. + ERST =20 DEF("name", HAS_ARG, QEMU_OPTION_name, --=20 2.41.0