From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330113; cv=none; d=zohomail.com; s=zohoarc; b=dE8RPSKBzYYYq0K/+s44iS+YW1G1sTqWjga4wCCJ23atBsnICBA7GfmTqed4o+gfMLD4d7T6gCqVU0AT7mIAi1vaAavbFaK2T9iVxB8c2KtJDrd8wZIUw031QnGZPpiowCpSKpK8wiOacKiKbXbvDx8WVTBRBX8ijS7rkDkKcdc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1707330113; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=WI9LwLV6jElq+7cq6p8AKRJ2F+XgAVEaW8GmoQDtfew=; b=e3wCzgBXRQnS32+tR7k0YRTa6YNlom8U1vedjjlnyXXJuET/d9J4sIO9iV8yfCrGwHq+DjPayJTVT5wqELGpC9wYVqH0JHbaMRApS++LiK4Zl+Ae0b37JfmPGNky5PRfCXtvIaIGofO2rkpAy8DJbluMu897o3c1hA2HXNRe1yI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1707330113161760.7537798990302; Wed, 7 Feb 2024 10:21:53 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rXmXR-0004mj-Uq; Wed, 07 Feb 2024 13:20:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXJ-0004jI-5P for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:41 -0500 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXH-00085H-IF for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:40 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id C2815CE1A10; Wed, 7 Feb 2024 18:20:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A7FFC433F1; Wed, 7 Feb 2024 18:20:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330028; bh=IvNlnF9mYMcbkeCT+SaYzUm45YczldzSE/Voy2+FLk4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eX/P7WNlMFcBE51lz+nsCTMushfvIyTB9hQmv6XR4LD9QkCRD/PSJcbF5cEYZt37R LvYFgFjwD+/RSbwsr4GJIv1KeT++bEN48sryXmxMdS5N65hQyCl8gwJL9NrI6ndV/+ owRyKuxjs9asOIq8Y3TlwYtXrk2mXrzbIv7lFEWYNIqfR3eFa7k9VBAn+89KsjgJ6J VOpzSUCWL0bfPDqTmrX0jEPo0iWS9irPq9WzrSgz9/S9ZOKfiGdPD0I2Wlo8g7G8u4 t1NILuk1XjC6Qc36HRZM5Z9SSEJU+ckCCt0e8chyhJpQ3UIcociH1uppkwM9lAzBv9 dtfD8d4kCJR2w== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 01/13] disas/hppa: Add disassembly for qemu specific instructions Date: Wed, 7 Feb 2024 19:20:11 +0100 Message-ID: <20240207182023.36316-2-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:40e1:4800::1; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330114700100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller Add disassembly of opcodes for "HALT QEMU", "RESET QEMU" and "RESTORE SHR" (restore shadow registers). Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- disas/hppa.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/disas/hppa.c b/disas/hppa.c index cce4f4aa37..22dce9b41b 100644 --- a/disas/hppa.c +++ b/disas/hppa.c @@ -1609,6 +1609,10 @@ static const struct pa_opcode pa_opcodes[] =3D { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT}, { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT}, =20 +/* Opcodes assigned to QEMU, used by SeaBIOS firmware and Linux kernel */ +{ "HALT QEMU", 0xfffdead0, 0xfffffffd, "n", pa10, FLAG_STRICT}, +{ "RESET QEMU", 0xfffdead1, 0xfffffffd, "n", pa10, FLAG_STRICT}, +{ "RESTORE SHR",0xfffdead2, 0xfffffffd, "n", pa10, FLAG_STRICT}, }; =20 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 7 Feb 2024 18:20:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330029; bh=nnPIll0WdUGBb3j9AjVCaV/yzNrk7pTlwf5F7MC2D1E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bo3xWjXa6k2JT0ZXRFb1MV8jgnMTXIlAXTeehNB3Gmoqr0TTubp9LjafookidUmhh ChmqCC+6pa0sQXgGbyPdaebzEStSoePZXHSn/onJa3KW29BbeMzLm/deZcQUd7fdtH 1ADJhIZqSwm/m4QbWQeFYjVoVgFVhoCRTDSPEg9jz7bQj9D+0JgaOsK/sh79/xqHxw uyb2CmgrEVtRv7lT7ZCTMIv2NP05z4bEwAD20inhbwVGlTbxCe6zAHwYOC1Z4VDEQB ogftnKEGXK/8bYjcJg+Y79npFsE/alWGZ9R32TkETHJf3nlRnobVQsOYfabV3nHe+K jqz8q3f61N70Q== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 02/13] target/hppa: Add "diag 0x101" for console output support Date: Wed, 7 Feb 2024 19:20:12 +0100 Message-ID: <20240207182023.36316-3-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=145.40.73.55; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330197134100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller For debugging purposes at the early stage of the bootup process, the SeaBIOS-hppa firmware sometimes needs to output characters to the serial console. Note that the serial console is the default output method for parisc machines. At this stage PCI busses and other devices haven't been initialized yet. So, SeaBIOS-hppa will not be able to find the correct I/O ports for the serial ports yet. Instead, add an emulation for the "diag 0x101" opcode to assist here. Without any other dependencies, SeaBIOS-hppa can then load the character to be printed in register %r26 and issue the diag assembly instruction. The qemu diag_console_output() helper function will then print that character to the first serial port. Signed-off-by: Helge Deller --- target/hppa/helper.h | 1 + target/hppa/op_helper.c | 32 ++++++++++++++++++++++++++++++++ target/hppa/translate.c | 6 ++++++ 3 files changed, 39 insertions(+) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 20698f68ed..1bdbcd8f98 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -103,4 +103,5 @@ DEF_HELPER_FLAGS_1(ptlbe, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(lpa, TCG_CALL_NO_WG, tl, env, tl) DEF_HELPER_FLAGS_1(change_prot_id, TCG_CALL_NO_RWG, void, env) DEF_HELPER_1(diag_btlb, void, env) +DEF_HELPER_1(diag_console_output, void, env) #endif diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index b1f24a5aad..2c2c4aa183 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -24,6 +24,8 @@ #include "exec/helper-proto.h" #include "exec/cpu_ldst.h" #include "qemu/timer.h" +#include "sysemu/sysemu.h" +#include "chardev/char-fe.h" #include "trace.h" =20 G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp) @@ -484,3 +486,33 @@ uint64_t HELPER(hshradd)(uint64_t r1, uint64_t r2, uin= t32_t sh) } return ret; } + +/* + * diag_console_output() is a helper function used during the initial boot= up + * process of the SeaBIOS-hppa firmware. During the bootup phase, address= es of + * serial ports on e.g. PCI busses are unknown and most other devices have= n't + * been initialized and configured yet. With help of a simple "diag" asse= mbler + * instruction and an ASCII character code in register %r26 firmware can e= asily + * print debug output without any dependencies to the first serial port an= d use + * that as serial console. + */ +void HELPER(diag_console_output)(CPUHPPAState *env) +{ + CharBackend *serial_backend; + Chardev *serial_port; + unsigned char c; + + /* find first serial port */ + serial_port =3D serial_hd(0); + if (!serial_port) + return; + + /* get serial_backend for the serial port */ + serial_backend =3D serial_port->be; + if (!serial_backend || + !qemu_chr_fe_backend_connected(serial_backend)) + return; + + c =3D (unsigned char)env->gr[26]; + qemu_chr_fe_write(serial_backend, &c, sizeof(c)); +} diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 08d09d50d7..53ec57ee86 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4411,6 +4411,12 @@ static bool trans_diag(DisasContext *ctx, arg_diag *= a) gen_helper_diag_btlb(tcg_env); return nullify_end(ctx); } + if (a->i =3D=3D 0x101) { + /* print char in %r26 to first serial console, used by SeaBIOS-hpp= a */ + nullify_over(ctx); + gen_helper_diag_console_output(tcg_env); + return nullify_end(ctx); + } #endif qemu_log_mask(LOG_UNIMP, "DIAG opcode 0x%04x ignored\n", a->i); return true; --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330166; cv=none; d=zohomail.com; s=zohoarc; b=Hi8L4nyRBNYjx8o3TFTW3jXjsH8p+Hb4PDQN9HgHLf61C7WBYm4+mJ8sWS5AhjmsBnuoEc2olHSiTuE9KazGLsTQ/0LN+pXra52HUVN2/CtVj3iB5HhYFM8/uaKyTW8RPmTDOBqJmP9XveQ1T+QvLuln5eLeTinnghzNoT+QqEc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1707330166; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:40e1:4800::1; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330167013100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller The ssm and rsm instructions number the PSW_W and PSW_E bits differently than how they are actually in the PSW. Both bits are relevant on 64-bit CPUs only. Fix the existing ssm and rsm instructions to handle the bits correctly. For that drop the swap_system_mask() helper function in favour of new helper functions get_system_mask, set_system_mask and mtsm_system_mask. get_system_mask() returns the PSW bits how they should be returned in the target register of the ssm and rsm instructions. set_system_mask() sets the PSW bits without any further modification. Note that the a->i constant value of ssm and rsm have already been converted to match the physical PSW bits by expand_sm_imm() in the instruction decoder. The mtsm instruction is different, as it takes the new PSW from a register at runtime, and as such the PSW.E and PSW.W bits are moved at runtime to the right bit positions before setting the PSW. Signed-off-by: Helge Deller --- target/hppa/cpu.h | 2 ++ target/hppa/helper.h | 4 +++- target/hppa/sys_helper.c | 46 +++++++++++++++++++++++++++++++++++++--- target/hppa/translate.c | 38 +++++++++++++++++++++------------ 4 files changed, 73 insertions(+), 17 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 7a181e8f33..06b65f2258 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -122,7 +122,9 @@ #define PSW_T 0x01000000 #define PSW_S 0x02000000 #define PSW_E 0x04000000 +#define PSW_E_BIT 37 /* PA2.0 only */ #define PSW_W 0x08000000 /* PA2.0 only */ +#define PSW_W_BIT 36 /* PA2.0 only */ #define PSW_Z 0x40000000 /* PA1.x only */ #define PSW_Y 0x80000000 /* PA1.x only */ =20 diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 1bdbcd8f98..abffd3f531 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -92,7 +92,9 @@ DEF_HELPER_1(rfi_r, void, env) DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl) -DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl) +DEF_HELPER_FLAGS_1(get_system_mask, TCG_CALL_NO_RWG, tl, env) +DEF_HELPER_FLAGS_2(set_system_mask, TCG_CALL_NO_RWG, void, env, tl) +DEF_HELPER_FLAGS_2(mtsm_system_mask, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_FLAGS_3(idtlbt_pa20, TCG_CALL_NO_RWG, void, env, tl, tl) diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index a59245eed3..88ba99f0d4 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -58,7 +58,27 @@ void HELPER(reset)(CPUHPPAState *env) helper_excp(env, EXCP_HLT); } =20 -target_ulong HELPER(swap_system_mask)(CPUHPPAState *env, target_ulong nsm) +target_ulong HELPER(get_system_mask)(CPUHPPAState *env) +{ + target_ulong psw =3D env->psw; + + /* mask out invalid bits */ + target_ulong psw_new =3D psw & PSW_SM; + + /* ssm/rsm instructions number PSW_W and PSW_E differently */ + psw_new &=3D ~PSW_W; + if (psw & PSW_W) { + psw_new |=3D 1ull << (63 - PSW_W_BIT); + } + psw_new &=3D ~PSW_E; + if (psw & PSW_E) { + psw_new |=3D 1ull << (63 - PSW_E_BIT); + } + + return psw_new; +} + +void HELPER(set_system_mask)(CPUHPPAState *env, target_ulong nsm) { target_ulong psw =3D env->psw; /* @@ -70,8 +90,28 @@ target_ulong HELPER(swap_system_mask)(CPUHPPAState *env,= target_ulong nsm) * machines set the Q bit from 0 to 1 without an exception, * so let this go without comment. */ - env->psw =3D (psw & ~PSW_SM) | (nsm & PSW_SM); - return psw & PSW_SM; + + cpu_hppa_put_psw(env, (psw & ~PSW_SM) | (nsm & PSW_SM)); +} + +void HELPER(mtsm_system_mask)(CPUHPPAState *env, target_ulong nsm) +{ + target_ulong psw_new; + + /* mask out invalid bits */ + psw_new =3D nsm & PSW_SM; + + /* set PSW_E and PSW_W */ + psw_new &=3D ~PSW_W; + if (nsm & (1ull << (63 - PSW_W_BIT))) { + psw_new |=3D PSW_W; + } + psw_new &=3D ~PSW_E; + if (nsm & (1ull << (63 - PSW_E_BIT))) { + psw_new |=3D PSW_E; + } + + helper_set_system_mask(env, psw_new); } =20 void HELPER(rfi)(CPUHPPAState *env) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 53ec57ee86..10fdc0813d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2163,13 +2163,20 @@ static bool trans_rsm(DisasContext *ctx, arg_rsm *a) nullify_over(ctx); =20 tmp =3D tcg_temp_new_i64(); - tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPUHPPAState, psw)); - tcg_gen_andi_i64(tmp, tmp, ~a->i); - gen_helper_swap_system_mask(tmp, tcg_env, tmp); - save_gpr(ctx, a->t, tmp); + if (a->t !=3D 0) { + gen_helper_get_system_mask(tmp, tcg_env); + save_gpr(ctx, a->t, tmp); + } + + if (a->i) { + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPUHPPAState, psw)); + tcg_gen_andi_i64(tmp, tmp, ~a->i); + gen_helper_set_system_mask(tcg_env, tmp); + + /* Exit, check e.g. for new interrupts */ + ctx->base.is_jmp =3D DISAS_IAQ_N_STALE_EXIT; + } =20 - /* Exit the TB to recognize new interrupts, e.g. PSW_M. */ - ctx->base.is_jmp =3D DISAS_IAQ_N_STALE_EXIT; return nullify_end(ctx); #endif } @@ -2183,11 +2190,17 @@ static bool trans_ssm(DisasContext *ctx, arg_ssm *a) nullify_over(ctx); =20 tmp =3D tcg_temp_new_i64(); - tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPUHPPAState, psw)); - tcg_gen_ori_i64(tmp, tmp, a->i); - gen_helper_swap_system_mask(tmp, tcg_env, tmp); - save_gpr(ctx, a->t, tmp); + if (a->t !=3D 0) { + gen_helper_get_system_mask(tmp, tcg_env); + save_gpr(ctx, a->t, tmp); + } + + if (a->i) { + tcg_gen_ld_i64(tmp, tcg_env, offsetof(CPUHPPAState, psw)); + tcg_gen_ori_i64(tmp, tmp, a->i); + gen_helper_set_system_mask(tcg_env, tmp); =20 + } /* Exit the TB to recognize new interrupts, e.g. PSW_I. */ ctx->base.is_jmp =3D DISAS_IAQ_N_STALE_EXIT; return nullify_end(ctx); @@ -2198,12 +2211,11 @@ static bool trans_mtsm(DisasContext *ctx, arg_mtsm = *a) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); #ifndef CONFIG_USER_ONLY - TCGv_i64 tmp, reg; + TCGv_i64 reg; nullify_over(ctx); =20 reg =3D load_gpr(ctx, a->r); - tmp =3D tcg_temp_new_i64(); - gen_helper_swap_system_mask(tmp, tcg_env, reg); + gen_helper_mtsm_system_mask(tcg_env, reg); =20 /* Exit the TB to recognize new interrupts. */ ctx->base.is_jmp =3D DISAS_IAQ_N_STALE_EXIT; --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330181; cv=none; d=zohomail.com; s=zohoarc; b=U/rOHNjJHNSfB+gF5LOFmYpCRkDdLPTqrBVyFU8pMB3UMt3KOH51Z1+vQAKfUFN+LgUsUxcw8SbH0qPFubfbaBeH2t0PzX2PThOKCVQ0kIs9iTQFpm6g357jmg4FuhyuXzLcF3Ok6CDW12HAlIJ13PnNQ09nA3zW9BUdFdSSMu0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=145.40.73.55; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330183008100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller Instead of stopping the emulation, report a MEMTX_DECODE_ERROR if the OS tries to access non-existent registers. Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- hw/pci-host/astro.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 37d271118c..42bd65de53 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -122,10 +122,6 @@ static MemTxResult elroy_chip_read_with_attrs(void *op= aque, hwaddr addr, case 0x0800: /* IOSAPIC_REG_SELECT */ val =3D s->iosapic_reg_select; break; - case 0x0808: - val =3D UINT64_MAX; /* XXX: tbc. */ - g_assert_not_reached(); - break; case 0x0810: /* IOSAPIC_REG_WINDOW */ switch (s->iosapic_reg_select) { case 0x01: /* IOSAPIC_REG_VERSION */ @@ -135,15 +131,15 @@ static MemTxResult elroy_chip_read_with_attrs(void *o= paque, hwaddr addr, if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) { val =3D s->iosapic_reg[s->iosapic_reg_select]; } else { - trace_iosapic_reg_read(s->iosapic_reg_select, size, val); - g_assert_not_reached(); + val =3D 0; + ret =3D MEMTX_DECODE_ERROR; } } trace_iosapic_reg_read(s->iosapic_reg_select, size, val); break; default: - trace_elroy_read(addr, size, val); - g_assert_not_reached(); + val =3D 0; + ret =3D MEMTX_DECODE_ERROR; } trace_elroy_read(addr, size, val); =20 @@ -160,6 +156,7 @@ static MemTxResult elroy_chip_write_with_attrs(void *op= aque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { + MemTxResult ret =3D MEMTX_OK; ElroyState *s =3D opaque; int i; =20 @@ -191,7 +188,7 @@ static MemTxResult elroy_chip_write_with_attrs(void *op= aque, hwaddr addr, if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) { s->iosapic_reg[s->iosapic_reg_select] =3D val; } else { - g_assert_not_reached(); + ret =3D MEMTX_DECODE_ERROR; } break; case 0x0840: /* IOSAPIC_REG_EOI */ @@ -204,9 +201,9 @@ static MemTxResult elroy_chip_write_with_attrs(void *op= aque, hwaddr addr, } break; default: - g_assert_not_reached(); + ret =3D MEMTX_DECODE_ERROR; } - return MEMTX_OK; + return ret; } =20 static const MemoryRegionOps elroy_chip_ops =3D { @@ -594,8 +591,8 @@ static MemTxResult astro_chip_read_with_attrs(void *opa= que, hwaddr addr, #undef EMPTY_PORT =20 default: - trace_astro_chip_read(addr, size, val); - g_assert_not_reached(); + val =3D 0; + ret =3D MEMTX_DECODE_ERROR; } =20 /* for 32-bit accesses mask return value */ @@ -610,6 +607,7 @@ static MemTxResult astro_chip_write_with_attrs(void *op= aque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { + MemTxResult ret =3D MEMTX_OK; AstroState *s =3D opaque; =20 trace_astro_chip_write(addr, size, val); @@ -686,11 +684,9 @@ static MemTxResult astro_chip_write_with_attrs(void *o= paque, hwaddr addr, #undef EMPTY_PORT =20 default: - /* Controlled by astro_chip_mem_valid above. */ - trace_astro_chip_write(addr, size, val); - g_assert_not_reached(); + ret =3D MEMTX_DECODE_ERROR; } - return MEMTX_OK; + return ret; } =20 static const MemoryRegionOps astro_chip_ops =3D { --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 7 Feb 2024 18:20:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330033; bh=x2QqFV0OrTV+B0MBMSpUKn1JRbPiQZhKDBTVpogYAiY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tC54nD+38Adey29kFuNhnmdIp4Y/T1zUYpzutCuYTOCIRY2b84wEknq6WZh04w7fi zJcwMiVjgX0OCNuz0KJ0aX27sKa7HtdZquux4MZZaKUSLIwwDNETOPP7ebAYT2WiMi BEfu+JQX5zeXQlmkPfTqAtkfZbyn3j8aT8VoM7hnLD/tydP7Ve2yoHDD/pNTbJj9fy UyyW24u8yoAl2Y2YqaZpGMlfql/89IpB4hMD84vXDnoMKv5imogeIa7z8Ca9tfKHsv 5zIXzfLzyHG4oE9eJc11on5sA7JgvBbmjX85O4JjSgTnPQ/S8RO2E57BebT30W7LT0 5cqGqQga0IZ+g== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 05/13] hw/pci-host/astro: Implement Hard Fail and Soft Fail mode Date: Wed, 7 Feb 2024 19:20:15 +0100 Message-ID: <20240207182023.36316-6-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330150883100004 Content-Type: text/plain; charset="utf-8" From: Helge Deller The Astro/Elroy chip can work in either Hard-Fail or Soft-Fail mode. Hard fail means the system bus will send an HPMC (=3Dcrash) to the processor, soft fail means the system bus will ignore timeouts of MMIO-reads or MMIO-writes and return -1ULL. The HF mode is controlled by a bit in the status register and is usually programmed by the OS. Return the corresponing values based on the current value of that bit. Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- hw/pci-host/astro.c | 23 +++++++++++++++++------ include/hw/pci-host/astro.h | 2 ++ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c index 42bd65de53..39549df3f5 100644 --- a/hw/pci-host/astro.c +++ b/hw/pci-host/astro.c @@ -131,15 +131,21 @@ static MemTxResult elroy_chip_read_with_attrs(void *o= paque, hwaddr addr, if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) { val =3D s->iosapic_reg[s->iosapic_reg_select]; } else { - val =3D 0; - ret =3D MEMTX_DECODE_ERROR; + goto check_hf; } } trace_iosapic_reg_read(s->iosapic_reg_select, size, val); break; default: - val =3D 0; - ret =3D MEMTX_DECODE_ERROR; + check_hf: + if (s->status_control & HF_ENABLE) { + val =3D 0; + ret =3D MEMTX_DECODE_ERROR; + } else { + /* return -1ULL if HardFail is disabled */ + val =3D ~0; + ret =3D MEMTX_OK; + } } trace_elroy_read(addr, size, val); =20 @@ -188,7 +194,7 @@ static MemTxResult elroy_chip_write_with_attrs(void *op= aque, hwaddr addr, if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) { s->iosapic_reg[s->iosapic_reg_select] =3D val; } else { - ret =3D MEMTX_DECODE_ERROR; + goto check_hf; } break; case 0x0840: /* IOSAPIC_REG_EOI */ @@ -201,7 +207,12 @@ static MemTxResult elroy_chip_write_with_attrs(void *o= paque, hwaddr addr, } break; default: - ret =3D MEMTX_DECODE_ERROR; + check_hf: + if (s->status_control & HF_ENABLE) { + ret =3D MEMTX_DECODE_ERROR; + } else { + ret =3D MEMTX_OK; + } } return ret; } diff --git a/include/hw/pci-host/astro.h b/include/hw/pci-host/astro.h index f63fd220f3..e2966917cd 100644 --- a/include/hw/pci-host/astro.h +++ b/include/hw/pci-host/astro.h @@ -27,6 +27,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRI= DGE) #define IOS_DIST_BASE_ADDR 0xfffee00000ULL #define IOS_DIST_BASE_SIZE 0x10000ULL =20 +#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */ + struct AstroState; =20 struct ElroyState { --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1707330100332634.3238383791576; Wed, 7 Feb 2024 10:21:40 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rXmXM-0004l5-6A; Wed, 07 Feb 2024 13:20:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXI-0004ic-1N for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:40 -0500 Received: from sin.source.kernel.org ([145.40.73.55]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXG-00087d-90 for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:39 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 7713FCE1AD0; Wed, 7 Feb 2024 18:20:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D54F8C433F1; Wed, 7 Feb 2024 18:20:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330034; bh=FaxA3mFrSxmY5kTESFNBYrTItNp7faYaL5jQs64YYHE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rmu/KzsaU6UABUhm+KVn4mv8gcHJLeW6qMC7lknsg7yfFJNSLciicdRKIs3Ou9Sps Tjn1EJUqze7h/emedNv8qIRq8hMb45Y889I5kQhgOq4qOSON2P+biItAnfFhjI1RiR RcyZHRZ2ZEsB8c06jjYUOrmuIa/9DYA8OPXVP/5Jzqn9Ys2fmeal1fYAGmLkxB7Tb8 OHrI/rlj5UJWxyjbXbYzJWiK0BZNnEOFAO3ScA5kstrPH4jgJuYKdF5TINlH2TgIiN NEdYxsdRh+kHrpbXD86XoqaFeMwiiQTZejtJGz5wr2WVy68y9IfQ8Xf8kafZ/Nsftt InunyqljsWgwQ== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 06/13] lasi: allow access to LAN MAC address registers Date: Wed, 7 Feb 2024 19:20:16 +0100 Message-ID: <20240207182023.36316-7-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=145.40.73.55; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330100649100002 Content-Type: text/plain; charset="utf-8" From: Helge Deller Firmware and qemu reads and writes the MAC address for the LASI LAN via registers in LASI. Allow those accesses and return zero even if LASI LAN isn't enabled to avoid HPMCs (=3Dcrashes). Signed-off-by: Helge Deller --- hw/misc/lasi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/misc/lasi.c b/hw/misc/lasi.c index 003f5b5ed8..9cfa5bb316 100644 --- a/hw/misc/lasi.c +++ b/hw/misc/lasi.c @@ -38,6 +38,7 @@ static bool lasi_chip_mem_valid(void *opaque, hwaddr addr, case LASI_LPT: case LASI_UART: case LASI_LAN: + case LASI_LAN + 12: /* LASI LAN MAC */ case LASI_RTC: =20 case LASI_PCR ... LASI_AMR: @@ -78,6 +79,7 @@ static MemTxResult lasi_chip_read_with_attrs(void *opaque= , hwaddr addr, case LASI_LPT: case LASI_UART: case LASI_LAN: + case LASI_LAN + 12: val =3D 0; break; case LASI_RTC: --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330178; cv=none; d=zohomail.com; s=zohoarc; b=neTyWQCS17XX4as09v5L3SRhWqjiT+HIOfz99KO8UHZ+AiXQkkR5riC+eufI9+jRsFemzKlki3sG7kjuqRIZZZqKGd94A5cVuTi11jFexMQ7T85Xyj55uP5InGNKHiqFRvyTC/k9G1bcD+vv/qHw7xGQrw7kDJmoNIYsGgLjMBY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1707330178; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=dLVcAUuRDqL88X25lYvkxp7Z6s2Mu3mKuPZHkAvrT/c=; b=DgXM9vQwIqNAm78kfsbmIHVqGYVVhb6ydwlifzxGPwOLbFqs3IPexPHsO90vCMqUMPM95zLldUYTawqTCM0BLb6c8XyryDs2oIzrdZF7rJWOXCBAu7WhNk0x/Bp7tUNBhuuSsV0JOBi/j1RBSSAHNokITuY5Jpgl9QJob7Z+eas= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1707330178077918.778430853453; Wed, 7 Feb 2024 10:22:58 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rXmXK-0004kR-Ft; Wed, 07 Feb 2024 13:20:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXH-0004hy-3S for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:39 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXF-00087u-Fp for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:38 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 5616B619D7; Wed, 7 Feb 2024 18:20:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3419EC43390; Wed, 7 Feb 2024 18:20:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330036; bh=98mbO8TIJY8H/aHyk2tyxWud+0ypEkYGWnHIB/+v55o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J33HycEiFoJvFiphlurxfoPMYFzYlTto+n2J+NkvCYNXlK8CYfvryhXfqxuNRVBSy zJgcpeUJQmtLQR1pxVE2jkzplqPa6SaVDB0ypZTebP9w21ko+kUVvlBWqNH/K8vyTY sDusbKOLLHYLWqisAmSgiA/zJFSFDh7dwF7byJ1ZPQz6GVeGiVhsuHtjE70FgH9l4Q KWFoxGM9+zkgKSpSZ2YCaxXc6TbOZg8PdxBWHqE1pdf5tNAZeKIE/IKQd53VaPba9z ofArXS0Tq5r9fJjV/lIavEVCd70Hhp5yjWh08NwYLOhg7lNLEu9NyTu5uoRka0XsOH H0e95FmarA3nw== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 07/13] target/hppa: Implement do_transaction_failed handler for I/O errors Date: Wed, 7 Feb 2024 19:20:17 +0100 Message-ID: <20240207182023.36316-8-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=139.178.84.217; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -71 X-Spam_score: -7.2 X-Spam_bar: ------- X-Spam_report: (-7.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330179001100002 Content-Type: text/plain; charset="utf-8" From: Helge Deller Add the do_transaction_failed() handler to tigger a HPMC to the CPU in case of I/O transaction errors. This is a preparation commit. We still lack implementation for some registers, so do not yet enable sendi= ng HPMCs. Having this hunk here now nevertheless helps for the further development, so that it can easily be enabled later on. Signed-off-by: Helge Deller --- target/hppa/cpu.c | 1 + target/hppa/cpu.h | 5 +++++ target/hppa/mem_helper.c | 19 +++++++++++++++++++ 3 files changed, 25 insertions(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 5f87c1b12a..afe73d4474 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -191,6 +191,7 @@ static const TCGCPUOps hppa_tcg_ops =3D { .cpu_exec_interrupt =3D hppa_cpu_exec_interrupt, .do_interrupt =3D hppa_cpu_do_interrupt, .do_unaligned_access =3D hppa_cpu_do_unaligned_access, + .do_transaction_failed =3D hppa_cpu_do_transaction_failed, #endif /* !CONFIG_USER_ONLY */ }; =20 diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 06b65f2258..5a4b56c975 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -383,6 +383,11 @@ bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_re= q); int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, int type, hwaddr *pphys, int *pprot, HPPATLBEntry **tlb_entry); +void hppa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, + vaddr addr, unsigned size, + MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retad= dr); extern const MemoryRegionOps hppa_io_eir_ops; extern const VMStateDescription vmstate_hppa_cpu; void hppa_cpu_alarm_timer(void *); diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 629a9d90ef..676c0b3003 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -353,6 +353,25 @@ raise_exception_with_ior(CPUHPPAState *env, int excp, = uintptr_t retaddr, cpu_loop_exit_restore(cs, retaddr); } =20 +void hppa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, + vaddr addr, unsigned size, + MMUAccessType access_type, + int mmu_idx, MemTxAttrs attrs, + MemTxResult response, uintptr_t retad= dr) +{ + CPUHPPAState *env =3D cpu_env(cs); + + qemu_log_mask(LOG_GUEST_ERROR, "HPMC at " TARGET_FMT_lx ":" TARGET_FMT= _lx + " while accessing I/O at %#08" HWADDR_PRIx "\n", + env->iasq_f, env->iaoq_f, physaddr); + + /* FIXME: Enable HPMC exceptions when firmware has clean device probin= g */ + if (0) { + raise_exception_with_ior(env, EXCP_HPMC, retaddr, addr, + MMU_IDX_MMU_DISABLED(mmu_idx)); + } +} + bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, MMUAccessType type, int mmu_idx, bool probe, uintptr_t retaddr) --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330148; cv=none; d=zohomail.com; s=zohoarc; b=IY+nDDeVIeaZTmcKMrLM6ppZMk5KTqamCkQQl24XUK8CCFEYyoTiW3A45dHbVNCaSTpFuZXiYQWdjPSH9Yvibwgz4eLUYCFTgmhSmX97DTa24ihESe3HYOx1T/akrYTuknQnhXm53NhOBPDj+tqAxrQIJFxlxEz5eW8/h5Xxh9Q= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1707330148; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Wed, 07 Feb 2024 13:20:40 -0500 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXG-0008AI-IJ for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:39 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id A793761999; Wed, 7 Feb 2024 18:20:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 87727C433C7; Wed, 7 Feb 2024 18:20:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330037; bh=vqjS4Tn8JsTETJjKAhscWBmZAWUWeDAIiHK9Uvc1mpY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IL+jR9Qq+myOvvZsQ/8Ie4IfEkzVD8SUY90tNqIFBRM2CKeVD1L7hxDl7soKlQBzd LDMY1Mgd79jrWIkmzMgOsHEn45E0lrQGEdZX3kCBrMbcnsJTFT5SRNMoGqn3Tb0zpi bbex5SiAnuJk0qfHu2iT8y5IywAo1Hzzuk26+yK8r3z7SgQ+5zh3xNTHkznnzETPyR 4/7Npbb+dvBARGEQR07CTulXysSvT/0jQ53wlldMgsNBOPB6OqwUGJqOs5acy2uxwp 9IqomqZHxKkcUVY4Lcv2IQjfcQu1FvBshN7YHIsrgt62xtTXfS+x6kA+g22V1VLkz6 hK7ABblut0ydg== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 08/13] lasi: Add reset I/O ports for LASI audio and FDC Date: Wed, 7 Feb 2024 19:20:18 +0100 Message-ID: <20240207182023.36316-9-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330150867100003 Content-Type: text/plain; charset="utf-8" From: Helge Deller Linux writes zeroes at bootup into the default ports for LASI audio and LASI floppy controller to reset those devices. Allow writing to those registers to avoid HPMCs. Signed-off-by: Helge Deller --- hw/misc/lasi.c | 11 +++++++++++ include/hw/misc/lasi.h | 2 ++ 2 files changed, 13 insertions(+) diff --git a/hw/misc/lasi.c b/hw/misc/lasi.c index 9cfa5bb316..970fc98b5c 100644 --- a/hw/misc/lasi.c +++ b/hw/misc/lasi.c @@ -36,10 +36,13 @@ static bool lasi_chip_mem_valid(void *opaque, hwaddr ad= dr, case LASI_IAR: =20 case LASI_LPT: + case LASI_AUDIO: + case LASI_AUDIO + 4: case LASI_UART: case LASI_LAN: case LASI_LAN + 12: /* LASI LAN MAC */ case LASI_RTC: + case LASI_FDC: =20 case LASI_PCR ... LASI_AMR: ret =3D true; @@ -80,6 +83,7 @@ static MemTxResult lasi_chip_read_with_attrs(void *opaque= , hwaddr addr, case LASI_UART: case LASI_LAN: case LASI_LAN + 12: + case LASI_FDC: val =3D 0; break; case LASI_RTC: @@ -145,12 +149,19 @@ static MemTxResult lasi_chip_write_with_attrs(void *o= paque, hwaddr addr, case LASI_LPT: /* XXX: reset parallel port */ break; + case LASI_AUDIO: + case LASI_AUDIO + 4: + /* XXX: reset audio port */ + break; case LASI_UART: /* XXX: reset serial port */ break; case LASI_LAN: /* XXX: reset LAN card */ break; + case LASI_FDC: + /* XXX: reset Floppy controller */ + break; case LASI_RTC: s->rtc_ref =3D val - time(NULL); break; diff --git a/include/hw/misc/lasi.h b/include/hw/misc/lasi.h index 0a8c7352be..f01c0f680a 100644 --- a/include/hw/misc/lasi.h +++ b/include/hw/misc/lasi.h @@ -26,9 +26,11 @@ OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP) #define LASI_IAR 0x10 =20 #define LASI_LPT 0x02000 +#define LASI_AUDIO 0x04000 #define LASI_UART 0x05000 #define LASI_LAN 0x07000 #define LASI_RTC 0x09000 +#define LASI_FDC 0x0A000 =20 #define LASI_PCR 0x0C000 /* LASI Power Control register */ #define LASI_ERRLOG 0x0C004 /* LASI Error Logging register */ --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=kernel.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1707330108649326.3066201025466; Wed, 7 Feb 2024 10:21:48 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rXmXL-0004ku-W3; Wed, 07 Feb 2024 13:20:44 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXJ-0004jW-Ci for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:41 -0500 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXH-0008BV-Ts for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:41 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 05F6B61A14; Wed, 7 Feb 2024 18:20:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DA70FC433F1; Wed, 7 Feb 2024 18:20:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330038; bh=KoFYV1cuiAvIfsT/+E/M7QzFRHRdtCx8I9CYomiWxOQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dhFnrxvI0FODuvGp03xWec7LxBlbciVZNt4O4Codv3Di2CCXiSU+4N4D8+vsr4BeB IZJGcLfZIRPuODDtVcVs9vjyddagdYNRzr7fQfmX9MB5a3WyPXpfvY6U9gZauG/Vzh OIg3Zq3EW3Tx6lv0blXDYYxYAcPi6yfa7gvWtqtdxHVDTazz0DNTP8nlTEP96E7p3Y UHMBbbcUk0YKwMj5FBH3HBS0IDGCmHrBzI0DKnzdfS+4SMcJcoLzLO4fVr7Sd6/AKP XSZc0D+goeGIXH9BExZCZJD6yqQsXL19Vtjfsu40nzC+RQXwfYHpOhEtrlzuQjHfej NPidzhQZw3Lqw== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 09/13] target/hppa: Allow read-access to PSW with rsm 0, reg instruction Date: Wed, 7 Feb 2024 19:20:19 +0100 Message-ID: <20240207182023.36316-10-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1707330110963100005 Content-Type: text/plain; charset="utf-8" From: Helge Deller HP-UX 11 and HP ODE tools use the "rsm 0,%reg" instruction in not priviledg= ed code paths to get the current PSW flags. The constant 0 means that no bits = of the PSW shall be reset, so this is effectively a read-only access to the PS= W. Allow this read-only access even for not privileged code. Signed-off-by: Helge Deller Acked-by: Richard Henderson --- target/hppa/translate.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 10fdc0813d..7e58775bbf 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2156,10 +2156,16 @@ static bool trans_ldsid(DisasContext *ctx, arg_ldsi= d *a) =20 static bool trans_rsm(DisasContext *ctx, arg_rsm *a) { +#ifdef CONFIG_USER_ONLY CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); -#ifndef CONFIG_USER_ONLY +#else TCGv_i64 tmp; =20 + /* HP-UX 11i and HP ODE use rsm for read-access to PSW */ + if (a->i) { + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + } + nullify_over(ctx); =20 tmp =3D tcg_temp_new_i64(); --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 7 Feb 2024 18:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330040; bh=vLEiE8lhlyiRwJ4cJo1am9Zz8JhSgVENwn64GYYsBD0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ucl7fOfxxecmxSmjqqKU3SBIT/G+EY87oPkwY6UtyMLsnhiQdxN+HpAiKPvLiqxdh tDtdqOd34UjKDBqU1Pyc8pRo8c+Q/5OWF+T8v3eOx2bErtxI8j26K0w2UOOmYvW4TX nljNqKtiaHz/Rjoditl4h/fr5jqebI4fUxf5aX2t4eN929mdBjtvQjOS/HohVnL9hH F05bNn88goGc4FkpWM76MhRb7p4DXZPXJBHnVwJimMlkOjpyPFrXcd+Y5i7KjgejEB JnzcXRPKBMWJGz9gJOgbCkcUKMqxeFkke/g1g07VHA1yOjzb9EBneXzOKxU5ScEMeg 8f2d76RgcTnJA== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 10/13] target/hppa: Check privilege only when PSW.P is set Date: Wed, 7 Feb 2024 19:20:20 +0100 Message-ID: <20240207182023.36316-11-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330227198100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller CHECK_MOST_PRIVILEGED() should check the privilege level only when the PSW.P bit is set. Signed-off-by: Helge Deller --- target/hppa/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 7e58775bbf..21c2734a1f 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -604,7 +604,7 @@ static bool gen_illegal(DisasContext *ctx) #else #define CHECK_MOST_PRIVILEGED(EXCP) \ do { \ - if (ctx->privilege !=3D 0) { \ + if (ctx->privilege !=3D 0 && (ctx->tb_flags & PSW_P)) { \ return gen_excp_iir(ctx, EXCP); \ } \ } while (0) --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=kernel.org ARC-Seal: i=1; a=rsa-sha256; t=1707330087; cv=none; d=zohomail.com; s=zohoarc; b=LzQJWUxGRsHHqT7o3xtCbEKbQzoW5/s+IoaKwYOfu41ZDcKtF77/dJddbaQTfeMz535HM/xkBJg0GLAloSSiDXYQYybWeFEIvYC7fkHAGv1Fu7bVJhSDDLKR5s5msDZr3UOPNV8MMq/2Iawq4E4i+hF1z0U3HTuHuy8wy78sDrE= ARC-Message-Signature: i=1; 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Wed, 07 Feb 2024 13:20:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXL-0004kv-LY for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:43 -0500 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rXmXK-0008BV-9Z for qemu-devel@nongnu.org; Wed, 07 Feb 2024 13:20:43 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id B78AA61999; Wed, 7 Feb 2024 18:20:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95BC7C433C7; Wed, 7 Feb 2024 18:20:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330041; bh=jX62TxfEqLvc+tH4WJBgE1waEPWqXlZDPP4oMNujLmU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nS0hN+O2mWzzm/VWB6tLudvzRUdTxgNHEqIEij5nl+/lo1gnsC0mFb8LO41xmHj+P J0OXHWI0PjYGPSQ37szI3Zq8cJwqrpm/j/0pX96C7FOpJPSWg48ZgHCqiLuEiBQDgk CGVnNBveGGy1+D5BSjcUqOI3JEWA2sXSb8HIoUh3SkQ/5krYvrrUVGN93ItwaqvdD3 /Selhb64KdFRaDt0lxon9fT26+Vjjqle06QyToExvIsTz0iU6bZix0haaBKlBhkFup nr+WgMQQ0i0IgCMyG2wzrarh2jTlB45qEvd252fOPNJq17MBEzr/CnJoYtpcYYq9CV DL5/XFlaLNM2g== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 11/13] target/hppa: PDC_BTLB_INFO uses 32-bit ints Date: Wed, 7 Feb 2024 19:20:21 +0100 Message-ID: <20240207182023.36316-12-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:4641:c500::1; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330088876100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller The BTLB helper function stores the BTLB info (four 32-bit ints) into the memory of the guest. They are only available when emulating a 32-bit CPU in the guest, so use "uint32_t" instead of "target_ulong" here. Signed-off-by: Helge Deller Reviewed-by: Richard Henderson --- target/hppa/mem_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 676c0b3003..66b8fa7d72 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -684,7 +684,7 @@ void HELPER(diag_btlb)(CPUHPPAState *env) case 0: /* return BTLB parameters */ qemu_log_mask(CPU_LOG_MMU, "PDC_BLOCK_TLB: PDC_BTLB_INFO\n"); - vaddr =3D probe_access(env, env->gr[24], 4 * sizeof(target_ulong), + vaddr =3D probe_access(env, env->gr[24], 4 * sizeof(uint32_t), MMU_DATA_STORE, mmu_idx, ra); if (vaddr =3D=3D NULL) { env->gr[28] =3D -10; /* invalid argument */ --=20 2.43.0 From nobody Tue Nov 26 12:19:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 38154CE1A10; Wed, 7 Feb 2024 18:20:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F19C9C433C7; Wed, 7 Feb 2024 18:20:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1707330043; bh=L9FbRnd5iCvb4cEjT9p91Ba6xCuXeKlxDAfLsb2U7NI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=X7b7queXT5Pc3e2yNJLN/Q+HfMAD43s/jewfSMIDIqRw8SkIyzppuGMiwFbMcJMT6 aYKK7xQw8ot86mgrXInOQ9jfZDNLWZqIcwEMpN3a1PBGEIS9CD3XAXtcNeu9pDWhY0 wB+yk5V/DUE33R5QlGNYTNygzNGj/pU8oW1vUq282vekdzhEDUBTAiyufPRkldHR0K b8S/EQdFcYCr8nhLowEc6bFyCGBPFSMWsdl/5W9qgS7KfPi/9fRvTNse1z7jsAaIqJ RLXxZwlHSETrn29rAu8P+/roCiTSIUxNyfVXlkefmG+UQvgJMh7Zc0xJISGxMr1495 xHsYyN0RllXEg== From: deller@kernel.org To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller Subject: [PATCH 12/13] target/hppa: Update SeaBIOS-hppa to version 16 Date: Wed, 7 Feb 2024 19:20:22 +0100 Message-ID: <20240207182023.36316-13-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2604:1380:40e1:4800::1; envelope-from=deller@kernel.org; helo=sin.source.kernel.org X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, LOTS_OF_MONEY=0.001, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330111106100007 Content-Type: text/plain; charset="utf-8" From: Helge Deller SeaBIOS-hppa version 16 news & enhancements: - Initial 64-bit firmware release - Added fault handler to catch and report firmware bugs - Use Qemu's builtin_console_out() via diag 0x101 - parisc-qemu-install Makefile target to install firmware in qemu - Added -fw_cfg opt/OS64,string=3D3 option Fixes: - Avoid crash when booting without SCSI controller - Avoid possible crashes while detecting LASI LAN & graphics - Don't check layers in PDC_MEM_MAP_HPA, fixes NetBSD - Ensure cache definition does not trigger endless loops - Mark B160L as 32-bit machine in inventory Signed-off-by: Helge Deller Acked-by: Richard Henderson --- pc-bios/hppa-firmware.img | Bin 163324 -> 167836 bytes pc-bios/hppa-firmware64.img | Bin 0 -> 205944 bytes roms/seabios-hppa | 2 +- 3 files changed, 1 insertion(+), 1 deletion(-) mode change 100644 =3D> 100755 pc-bios/hppa-firmware.img create mode 100755 pc-bios/hppa-firmware64.img diff --git a/pc-bios/hppa-firmware.img b/pc-bios/hppa-firmware.img old mode 100644 new mode 100755 index 1b3a8418250db977e0c0c4ae7194ba7e0199c30d..3cd2e2e68e06823a9a57ac582c1= 9b025f4cd32de GIT binary patch delta 39217 zcma&P3sh9sy+3}=3DVSqDFhLOiG49uAsMSPc`24H@uagK2Edy|LBW+-k15B@Yv9k{07T7gKFx?@5il*d#aDX#9P?XU4?3?tiVn zYmqr;Kfn9CzwiCsCpW*=3D_Pn5La|zqWw~utiZMAbTvzN3#;BoF!IPS0I({XY)#olTbDk=3DW^T%*fC{R3!9peic^GvAM zg=3D8-mazCBPdw!GGs(o~id?^uOFq#o6<s#5D`v4;GZ@L7_g&W1)x!J*a-mpJp*Jm3-?6Ir~G5K%e-F!G)TS+_tcL?eG~v2 z0WkKS`thg-0HA-xVIu&>-_u}XvrrHPAdLW+cu#!}>Z1Up5db;&)K5Wu6o51WV9Gu9 zGU|-Sy0@wMw3kiZ|R54iY4wTmtEmJrR;9zDwXt0XC#fnxXjm zgh-*#CuNh!H25O#vH8*8kd#HD(qN9h_eXx?@vgRK3EH%zf11pP@)EtDCJ-?JWDI7T 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Date: Wed, 7 Feb 2024 19:20:23 +0100 Message-ID: <20240207182023.36316-14-deller@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240207182023.36316-1-deller@kernel.org> References: <20240207182023.36316-1-deller@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=139.178.84.217; envelope-from=deller@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -71 X-Spam_score: -7.2 X-Spam_bar: ------- X-Spam_report: (-7.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.106, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @kernel.org) X-ZM-MESSAGEID: 1707330178993100001 Content-Type: text/plain; charset="utf-8" From: Helge Deller Load the 64-bit SeaBIOS-hppa firmware by default when running on a 64-bit machine. This will enable us to later support more than 4GB of RAM and is required that the OS (or PALO bootloader) will start or install a 64-bit ke= rnel instead of a 32-bit kernel. Note that SeaBIOS-hppa v16 provides the "-fw_cfg opt/OS64,string=3D3" optio= n with which the user can control what the firmware shall report back to the OS: Support of 32-bit OS, support of a 64-bit OS, or support for both (default). Signed-off-by: Helge Deller Acked-by: Richard Henderson --- hw/hppa/machine.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index eb78c46ff1..a47baa572d 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -333,6 +333,7 @@ static void machine_HP_common_init_tail(MachineState *m= achine, PCIBus *pci_bus, const char *kernel_filename =3D machine->kernel_filename; const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; + const char *firmware =3D machine->firmware; MachineClass *mc =3D MACHINE_GET_CLASS(machine); DeviceState *dev; PCIDevice *pci_dev; @@ -408,9 +409,13 @@ static void machine_HP_common_init_tail(MachineState *= machine, PCIBus *pci_bus, =20 /* Load firmware. Given that this is not "real" firmware, but one explicitly written for the emulation, we might as - well load it directly from an ELF image. */ - firmware_filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, - machine->firmware ?: "hppa-firmware= .img"); + well load it directly from an ELF image. Load the 64-bit + firmware on 64-bit machines by default if not specified + on command line. */ + if (!firmware) { + firmware =3D lasi_dev ? "hppa-firmware.img" : "hppa-firmware64.img= "; + } + firmware_filename =3D qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware); if (firmware_filename =3D=3D NULL) { error_report("no firmware provided"); exit(1); --=20 2.43.0