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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id w25-20020a05620a095900b0078445f63dc4sm994875qkw.60.2024.02.06.07.40.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Feb 2024 07:40:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1707234047; x=1707838847; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=hLbg+SEBXldc/aM928IlX5UZSpp0lFtjrNh1hEw18hw=; b=XATGJ2Q5au0IZjtKL1YBb6d9P8fOIDgvRodeFBbzCQSuLT4hukienprLNuJZxam/TR N7/DlOgU4C7yXWzJPEvcHwX8Iqf8obMziFGFD9foYots/uGbn+rPQJdjTf/elVzKz+8U nFRWFp+SbBuU9WHw7hVKrqC4SKI233CIBZMgknI9aocJYUPbvXDtjKRorSyN0NkfcuFg OsV3uBsp78GsmPur2qRXWJdzPZ62/WFfmfnrCrvnZ1ysg4qnj5g2WIDrRD1iVkBBo0zC t+dYao2r+ZQF+0E1Petp0ItzqjwWrmYX/lvL0Rap2omueWuF92MKxFiepekmlFce3u66 aYxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707234047; x=1707838847; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=hLbg+SEBXldc/aM928IlX5UZSpp0lFtjrNh1hEw18hw=; b=Swmeb/ohYCpvEKKbdnZrggm9+SIVyNEt9pJSBgAXFbibJl+nBAZ5iIbT+lVvzhzc6Z Aq6coxpd8GRXt7uZIqMKwEyIWaVogI4ObbdUAGgLsPTISTgFRLAyqyXThLVaZLV6DnVP f9NUBiax6dGDYyBqbrEDdZthjS03neD+JvhBfCbz0KM1RMoqP67G8Rik5k9YVdn0PJmt 6KWUQjoOBztjzGrdYeNc4O1BcPF3SmG34V68RMvWl1f77vxnmbsrQDvm74VP5YJYlyZ1 tBTT7WGWQ80Af9UCI/SFywyP6HfRoF7E3SWX1lWM3ljaw7E3ka4mIPCr8Cf+zlRTpu66 a25Q== X-Gm-Message-State: AOJu0YzUqq72JH4QnHINKvABvU4VzXdI08N3quR8YgijvWmtT0d2+UQ1 LL34NUSsamWMZ4r2FapWk2N5Kr8gYze8wxr7YxhzMGm5mom2Q2PdxYUVg/SD8r8= X-Google-Smtp-Source: AGHT+IGI+EFmfb9CyK33aqTkOXtXjLRcG8Zutmqjv9tQ3kvgCqBcPphV04XvPCN2DxRNNQ+QyNDjWg== X-Received: by 2002:a05:620a:4550:b0:783:d83b:f588 with SMTP id u16-20020a05620a455000b00783d83bf588mr4023642qkp.17.1707234046953; Tue, 06 Feb 2024 07:40:46 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCUjcqmQvqXFp/Ti14xA9qhvhu/iwP4t90OjzoCcR92GLqBjMl2zHYsbozbvvELtRNhpb5D9h91XtvahO55ZIVB9fCS31YZCp6qUoorJZFW7pwHYnHl8XoQjpCCRFZ18WinNmzLIoOo1C2Ymaby9dlRCSG6lGNx1VXHkd+O5B4zVDBA9CRh82HiFQ0qklKym/0ZDftClRO6FH3difuw79fchjKg/rvhHGeUMQSB03O4VHtvpHdgh+1iWi9wcDPSTquuQDmYDdZ7w3YcSLdtSWN+2y5g4/g66nJcmMRtw From: Alexandre Ghiti To: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: Alexandre Ghiti Subject: [PATCH v2] hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM Date: Tue, 6 Feb 2024 16:40:42 +0100 Message-Id: <20240206154042.514698-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::732; envelope-from=alexghiti@rivosinc.com; helo=mail-qk1-x732.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @rivosinc-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1707234115791100001 Content-Type: text/plain; charset="utf-8" Currently, the initrd is placed at 128MB, which overlaps with the kernel when it is large (for example syzbot kernels are). From the kernel side, there is no reason we could not push the initrd further away in memory to accommodate large kernels, so move the initrd at 512MB when possible. The ideal solution would have been to place the initrd based on the kernel size but we actually can't since the bss size is not known when the image is loaded by load_image_targphys_as() and the initrd would then overlap with this section. Signed-off-by: Alexandre Ghiti Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza --- Changes in v2: - Fix typos in commit log (Daniel) and title - Added to the commit log why using the kernel size does not work (Daniel) hw/riscv/boot.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 0ffca05189..9a367af2fa 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -188,13 +188,13 @@ static void riscv_load_initrd(MachineState *machine, = uint64_t kernel_entry) * kernel is uncompressed it will not clobber the initrd. However * on boards without much RAM we must ensure that we still leave * enough room for a decent sized initrd, and on boards with large - * amounts of RAM we must avoid the initrd being so far up in RAM - * that it is outside lowmem and inaccessible to the kernel. - * So for boards with less than 256MB of RAM we put the initrd - * halfway into RAM, and for boards with 256MB of RAM or more we put - * the initrd at 128MB. + * amounts of RAM, we put the initrd at 512MB to allow large kernels + * to boot. + * So for boards with less than 1GB of RAM we put the initrd + * halfway into RAM, and for boards with 1GB of RAM or more we put + * the initrd at 512MB. */ - start =3D kernel_entry + MIN(mem_size / 2, 128 * MiB); + start =3D kernel_entry + MIN(mem_size / 2, 512 * MiB); =20 size =3D load_ramdisk(filename, start, mem_size - start); if (size =3D=3D -1) { --=20 2.39.2