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bh=lui+zfEHwTa84G7gBv3rrXHn+tSC14NgRm7xXAbQH2A=; b=dlGSfRGXfE9cD+q4dSsWK4PnlBw1+OG6pwtPf7vo0YCX68qQfjGujrP5m9hu0jfuX8EqOt VLLtRF2hFiSADHhiIz4X484JOCIOBh7sAl7HUNW4yBM/fLUOAgxwTMrZqocdm2CCQsE+BP H7wXPUzDjtDSVzsoTmJcnx4gpy2cxd4= X-MC-Unique: msHKBc3cPTGQcRCRodFFPA-1 From: Thomas Huth To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Harsh Prateek Bora Subject: [PULL 02/12] target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules Date: Tue, 6 Feb 2024 11:43:37 +0100 Message-ID: <20240206104347.238825-3-thuth@redhat.com> In-Reply-To: <20240206104347.238825-1-thuth@redhat.com> References: <20240206104347.238825-1-thuth@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.10 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -23 X-Spam_score: -2.4 X-Spam_bar: -- X-Spam_report: (-2.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.285, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1707216341142100001 The character "+" is now forbidden in QOM device names (see commit b447378e1217 - "Limit type names to alphanumerical and some few special characters"). For the "power5+" and "power7+" CPU names, there is currently a hack in type_name_is_valid() to still allow them for compatibility reasons. However, there is a much nicer solution for this: Simply use aliases! This way we can still support the old names without the need for the ugly hack in type_name_is_valid(). Message-ID: <20240117141054.73841-2-thuth@redhat.com> Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Harsh Prateek Bora Signed-off-by: Thomas Huth --- hw/ppc/spapr_cpu_core.c | 4 ++-- qom/object.c | 4 ---- target/ppc/cpu-models.c | 10 ++++++---- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 5aa1ed474a..0c0fb3f1b0 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -389,9 +389,9 @@ static const TypeInfo spapr_cpu_core_type_infos[] =3D { DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"), DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"), DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"), - DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power5p_v2.1"), DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), - DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7p_v2.1"), DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), diff --git a/qom/object.c b/qom/object.c index 654e1afaf2..2c4c64d2b6 100644 --- a/qom/object.c +++ b/qom/object.c @@ -160,10 +160,6 @@ static bool type_name_is_valid(const char *name) =20 /* Allow some legacy names with '+' in it for compatibility reasons */ if (name[plen] =3D=3D '+') { - if (plen =3D=3D 6 && g_str_has_prefix(name, "power")) { - /* Allow "power5+" and "power7+" CPU names*/ - return true; - } if (plen >=3D 17 && g_str_has_prefix(name, "Sun-UltraSparc-I")) { /* Allow "Sun-UltraSparc-IV+" and "Sun-UltraSparc-IIIi+" */ return true; diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 7dbb47de64..36e465b390 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -716,11 +716,11 @@ "PowerPC 970MP v1.0") POWERPC_DEF("970mp_v1.1", CPU_POWERPC_970MP_v11, 970, "PowerPC 970MP v1.1") - POWERPC_DEF("power5+_v2.1", CPU_POWERPC_POWER5P_v21, POWER= 5P, + POWERPC_DEF("power5p_v2.1", CPU_POWERPC_POWER5P_v21, POWER= 5P, "POWER5+ v2.1") POWERPC_DEF("power7_v2.3", CPU_POWERPC_POWER7_v23, POWER= 7, "POWER7 v2.3") - POWERPC_DEF("power7+_v2.1", CPU_POWERPC_POWER7P_v21, POWER= 7, + POWERPC_DEF("power7p_v2.1", CPU_POWERPC_POWER7P_v21, POWER= 7, "POWER7+ v2.1") POWERPC_DEF("power8e_v2.1", CPU_POWERPC_POWER8E_v21, POWER= 8, "POWER8E v2.1") @@ -902,10 +902,12 @@ PowerPCCPUAlias ppc_cpu_aliases[] =3D { { "970", "970_v2.2" }, { "970fx", "970fx_v3.1" }, { "970mp", "970mp_v1.1" }, - { "power5+", "power5+_v2.1" }, + { "power5+", "power5p_v2.1" }, + { "power5+_v2.1", "power5p_v2.1" }, { "power5gs", "power5+_v2.1" }, { "power7", "power7_v2.3" }, - { "power7+", "power7+_v2.1" }, + { "power7+", "power7p_v2.1" }, + { "power7+_v2.1", "power7p_v2.1" }, { "power8e", "power8e_v2.1" }, { "power8", "power8_v2.0" }, { "power8nvl", "power8nvl_v1.0" }, --=20 2.43.0