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Tsirkin" , Ira Weiny , Peter Maydell , Fan Ni , Marcel Apfelbaum Subject: [RFC PATCH 01/11] hw/pci: Add pcie_find_dvsec() utility. Date: Mon, 5 Feb 2024 14:19:30 +0000 Message-ID: <20240205141940.31111-2-Jonathan.Cameron@huawei.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240205141940.31111-1-Jonathan.Cameron@huawei.com> References: <20240205141940.31111-1-Jonathan.Cameron@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.122.247.231] X-ClientProxiedBy: lhrpeml500004.china.huawei.com (7.191.163.9) To lhrpeml500005.china.huawei.com (7.191.163.240) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=jonathan.cameron@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Jonathan Cameron From: Jonathan Cameron via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1707142848008100001 Content-Type: text/plain; charset="utf-8" Simple search code used to find first instance of a PCIe Designated Vendor-Specific Extended Capability. Signed-off-by: Jonathan Cameron --- include/hw/pci/pcie.h | 1 + hw/pci/pcie.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 11f5a91bbb..ff559a6653 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -127,6 +127,7 @@ bool pcie_cap_is_arifwd_enabled(const PCIDevice *dev); =20 /* PCI express extended capability helper functions */ uint16_t pcie_find_capability(PCIDevice *dev, uint16_t cap_id); +uint16_t pcie_find_dvsec(PCIDevice *dev, uint16_t vid, uint16_t id); void pcie_add_capability(PCIDevice *dev, uint16_t cap_id, uint8_t cap_ver, uint16_t offset, uint16_t size); diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 6db0cf69cd..9f1ca718b5 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -944,6 +944,30 @@ uint16_t pcie_find_capability(PCIDevice *dev, uint16_t= cap_id) return pcie_find_capability_list(dev, cap_id, NULL); } =20 +uint16_t pcie_find_dvsec(PCIDevice *dev, uint16_t vid, uint16_t id) +{ + uint16_t prev =3D 0; + uint16_t next; + + while (1) { + uint32_t head1; + + next =3D pcie_find_capability_list(dev, 0x23, &prev); + if (!next) { + break; + } + head1 =3D pci_get_long(dev->config + next + 4); + if ((head1 & 0xFFFF) =3D=3D vid) { + uint16_t head2 =3D pci_get_word(dev->config + next + 8); + if (head2 =3D=3D id) { + return next; + } + } + prev =3D next; + } + return 0; +} + static void pcie_ext_cap_set_next(PCIDevice *dev, uint16_t pos, uint16_t n= ext) { uint32_t header =3D pci_get_long(dev->config + pos); --=20 2.39.2