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([43.252.112.156]) by smtp.gmail.com with ESMTPSA id d20-20020a170903209400b001d98942d290sm3292130plc.124.2024.02.04.18.39.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Feb 2024 18:39:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1707100795; x=1707705595; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tm00fo32ukKBaFGSugm65eVz3+HZdTUwSvO4kdDzRYM=; b=dnjlwGAuCw6MFHlj7bBBzLz/3Ckclc7YQ1G/tImwDA+jQboB8h1Jz4mfc/AdalvsYu oXXNGDnbPUjUccFpYSGsGTQA777kFgB8K8JOhYoQnNpMeMy+qNtOdkLipadtCLoDfyhX I7KCVZdePTTcaAtFEQARFqo1CMMHFm9EPLe859OD21dKMgjmBdrfoHNej5gEqQdZOQNE FU1zH+4VCrfJ31G9SeqOld/MajdWxgaxMPDsoVyJxKqiYdH7f54GTpUbE1DHJDlkU1kt 2gOQF+g0Pg7tv/fIqbelLqSSBxQj/eiAuwIzQp/a9wrM0wnyr31wgz7xf5Z65KiJ2Q+H OfcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1707100795; x=1707705595; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tm00fo32ukKBaFGSugm65eVz3+HZdTUwSvO4kdDzRYM=; b=DWYyAtq/O9zmAuhPSwWzLrHng+XHKSU7IXXsr7RotQlIIr/zO/ytKXfBLwNXaAGSZB MODCQtkHHphha+Q+C1bQCbfnP6sFB8zB8PlvqEZwhANBXFne4RHLly3YvUoIjMpcF19F 4/7DlpBdTZtUbphEEXYQeopfMISAVGpovHfmoSnLl/4zYYWRSTclQ/YOdwL8ESpTqJQ1 go5QfIQ0tZfjCKIWdwS86jNRWLvn+iZLOHFy1MHNxS4IS42DmDCwCbao5QTp9KANaBJl eP+ZY00DniPKTL5hmMXoAba1sOaawfYtesCWQ2evXqJ2g6yytfudzYo1m+hkGx2WtFSZ Ge2w== X-Gm-Message-State: AOJu0YxECvK5lZhBNCsPV6uoG0IVqVf8MfuR073cXPn4dAKMkfZyH+ij njFk5X61BjuTdrOtXFyYPoLlKJtp6KnPkFFmYPNLWOiQccIzWjqu6jWUSxh35hXKJNK6j6iOcLd HWU0= X-Google-Smtp-Source: AGHT+IHV4J5QUtEZnJhOp8AMM1VP+ExoQsj8PK+Vshih00vTL8rX3XKYRudZqOqkyaiUuddxwrgFYg== X-Received: by 2002:a17:902:db02:b0:1d9:bba8:16f1 with SMTP id m2-20020a170902db0200b001d9bba816f1mr1216216plx.50.1707100795156; Sun, 04 Feb 2024 18:39:55 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: gustavo.romero@linaro.org Subject: [PATCH 1/3] target/arm: Fix SVE/SME gross MTE suppression checks Date: Mon, 5 Feb 2024 12:39:46 +1000 Message-Id: <20240205023948.25476-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240205023948.25476-1-richard.henderson@linaro.org> References: <20240205023948.25476-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1707100853395100005 Content-Type: text/plain; charset="utf-8" The TBI and TCMA bits are located within mtedesc, not desc. Signed-off-by: Richard Henderson --- target/arm/tcg/sme_helper.c | 8 ++++---- target/arm/tcg/sve_helper.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index 1ee2690ceb..904bfdac43 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -573,8 +573,8 @@ void sme_ld1_mte(CPUARMState *env, void *za, uint64_t *= vg, desc =3D extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); =20 /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc =3D 0; } =20 @@ -750,8 +750,8 @@ void sme_st1_mte(CPUARMState *env, void *za, uint64_t *= vg, target_ulong addr, desc =3D extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); =20 /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc =3D 0; } =20 diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index bce4295d28..6853f58c19 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -5800,8 +5800,8 @@ void sve_ldN_r_mte(CPUARMState *env, uint64_t *vg, ta= rget_ulong addr, desc =3D extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); =20 /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc =3D 0; } =20 @@ -6156,8 +6156,8 @@ void sve_ldnfff1_r_mte(CPUARMState *env, void *vg, ta= rget_ulong addr, desc =3D extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); =20 /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc =3D 0; } =20 @@ -6410,8 +6410,8 @@ void sve_stN_r_mte(CPUARMState *env, uint64_t *vg, ta= rget_ulong addr, desc =3D extract32(desc, 0, SIMD_DATA_SHIFT + SVE_MTEDESC_SHIFT); =20 /* Perform gross MTE suppression early. */ - if (!tbi_check(desc, bit55) || - tcma_check(desc, bit55, allocation_tag_from_addr(addr))) { + if (!tbi_check(mtedesc, bit55) || + tcma_check(mtedesc, bit55, allocation_tag_from_addr(addr))) { mtedesc =3D 0; } =20 --=20 2.34.1