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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id k2-20020a05600c1c8200b0040fafd84095sm214735wms.41.2024.02.02.07.36.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Feb 2024 07:36:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706888207; x=1707493007; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=EKrB2domJrpD/QjC1zd65Q0KKvruCC/azVIk/m6fgxM=; b=mJCr46VP4EZmKK7aeFN3DBN/ptheCsAv3c1dP6OGUw6ZOUbfZKauUYcq0W8XkjUtEz FJUH7zRV4UhS+OJvOtY8k8AXJOhptnREcKWtfuHcOmEJtm2HOvHeOuPEgu1RBpe/sxmR /pgeBfv2wM/vWikawAusjR0KwLPzZEbe8wpUp/C0vhRxVPMXrnzbwrXwcUUIzDjRkQSZ IupqhE0Bo9RhfUE6yRbNFXbqrNZmkSFTnj6COXutzY9be84NBkGBwmyUVqBJGH/4c2Hi XlfAaeLNhB7Vb0AIz3xSAbU16Wz+xaPR97w02UvDfrTwD61sfPVBwLmfI1vcDMX/F0TL 4Wuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706888207; x=1707493007; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EKrB2domJrpD/QjC1zd65Q0KKvruCC/azVIk/m6fgxM=; b=o1i4r7geRqNGwCsBIpXjsImbP3hVNikWRP/JySW3ZfFXuqGiQkBgi0eRPZjHM+QHuo M0jZsbfFvTetYdj6SFc/Rh0DXt3QNH8mF1JNmgInFuONGRsLgJE0amC7XrjZFDLUOv8p Vs4vQbW1mrar/BnV80FdPMU0m4QFKzhLob4r8/ypDIlFc+Yunh81xnDNvK8s/8b/Bi5O 9J0r+ts2vdG889AAUF8i9AGG5vN71lMsaXsHtRbQCFImfKjEsgrtPHvuCA9c7zRIMFlO oFdKYwANZNRmU8RnvdFZTqimvSozYKpl8z/sEknC4HDWFOuLZ/v5iM9ydVU2bC8FW10b GMGg== X-Gm-Message-State: AOJu0YwQlsxz1/+sTDn30YH4+fnlD6EZUtjTzvQZ4Ksm3W17m98UJLHb NCF0n22Ee8eKisMSbxn284Swi5T9bikDbyL5QD08VVRX9JKXkRVky/GxwAN0eayON0WXUtfCn40 Q X-Google-Smtp-Source: AGHT+IFP8/fGVpLiDR55y8J7sNKtTKDy+3CAaMD7nEbFOnrwAkwfuMTYH0A7yRG0SmxuwZe4FKXcfQ== X-Received: by 2002:a05:600c:1c99:b0:40f:afb9:ca10 with SMTP id k25-20020a05600c1c9900b0040fafb9ca10mr4114894wms.1.1706888207623; Fri, 02 Feb 2024 07:36:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/36] hw/arm/npcm7xx_boards: Simplify setting MachineClass::valid_cpu_types[] Date: Fri, 2 Feb 2024 15:36:20 +0000 Message-Id: <20240202153637.3710444-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240202153637.3710444-1-peter.maydell@linaro.org> References: <20240202153637.3710444-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706888245489100001 From: Philippe Mathieu-Daud=C3=A9 The npcm7xx Soc is created with a Cortex-A9 core, see in hw/arm/npcm7xx.c: static void npcm7xx_init(Object *obj) { NPCM7xxState *s =3D NPCM7XX(obj); for (int i =3D 0; i < NPCM7XX_MAX_NUM_CPUS; i++) { object_initialize_child(obj, "cpu[*]", &s->cpu[i], ARM_CPU_TYPE_NAME("cortex-a9")); } The MachineClass::default_cpu_type field is ignored: delete it. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240129151828.59544-8-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/npcm7xx_boards.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index 2999b8b96d0..e229efb4472 100644 --- a/hw/arm/npcm7xx_boards.c +++ b/hw/arm/npcm7xx_boards.c @@ -465,7 +465,6 @@ static void npcm7xx_machine_class_init(ObjectClass *oc,= void *data) mc->no_cdrom =3D 1; mc->no_parallel =3D 1; mc->default_ram_id =3D "ram"; - mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-a9"); mc->valid_cpu_types =3D valid_cpu_types; } =20 --=20 2.34.1