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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id k2-20020a05600c1c8200b0040fafd84095sm214735wms.41.2024.02.02.07.36.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Feb 2024 07:36:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706888207; x=1707493007; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ZWs5NQ83i9qIQWdiDsw7uY28XWqWXL7f3H4Vv5HjyFk=; b=oWy1M/0+YRXxnBTR9lTl5NwH3CaBOQO/Xo8d138qwTz6fx7QxX3Hw6t2zZaDL1fuEt k5ZCX3xfumf1hvNWqBEC+nPuqE1t08/odr5JmtzyqeVgjhDPCTapZojiqNpMQJNbxbHq PRr495DWl1Ue8gQxYTnGkMeyNb9wsqK183qg6VOj1G1YmdO9Nyq8v2Ke+p2Zx5pWN/Cl 1rcQu1Y88JzvpeF9KfQjGn9Y29j3YjhqVxuECetDH9kuF/fk/RMg/u8j4BF8Qf7jU9NJ 2mBvSb20z6yprHbWOuLfafPaoldrPYZh2AOswYa/6LU8xZ80SkbyTNw1J6Grs06I2BwT Oxeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706888207; x=1707493007; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZWs5NQ83i9qIQWdiDsw7uY28XWqWXL7f3H4Vv5HjyFk=; b=k1OfqBbpAzmFFyg4K3SFjesbjC/mHQL2ta078S0EHWL/5On+PEgnhgSoIrw6r88JRw xYTa+SYaJT6NhtiuTxx3RvNJ16sTuBsunuxEJfx+BZCFWaXP0YwqgegFao18wlg/zWsh rg5gNZmLMGFuxnGZrN78pLfOD3mze5+Q9zPptwvuFJz8rCdY8B1Ag9p3rICcXrxUuLR2 eDzCk6VWVYqfW0zBLhZ8gYTdjyqofKXC/ui+m3R4fupwj/3e+xYd+vuceM++RwtQBdrB fuBIbNQnNKOUvuCsbGnwrpG9RRwgsptWi0Gka9oBkXnVtV2ihKy9bCPI4WyeB1C9lccz lbMA== X-Gm-Message-State: AOJu0YzQoF6vjccjIgDEU2p8cNqdxdKyomFyR1xAz4I8TmHJk2jeLvhO KySkdZbzvcDD8w2ky31Khb+sXKY1stcUg3ZL1jhD4X+b5dW10mNBhx/9q9GZct+ldhuPL5mPWjv V X-Google-Smtp-Source: AGHT+IHYqN0mgP1AKwNRqrle4dSLA2BlefKdWaul/a4T3jBkJGdElOV+nuNrbS+ES44Jr+iPySCIqg== X-Received: by 2002:a05:600c:4f0f:b0:40f:bde5:763e with SMTP id l15-20020a05600c4f0f00b0040fbde5763emr3450154wmq.32.1706888207230; Fri, 02 Feb 2024 07:36:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/36] hw/arm/musca: Simplify setting MachineClass::valid_cpu_types[] Date: Fri, 2 Feb 2024 15:36:19 +0000 Message-Id: <20240202153637.3710444-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240202153637.3710444-1-peter.maydell@linaro.org> References: <20240202153637.3710444-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706888323953100035 From: Philippe Mathieu-Daud=C3=A9 Musca boards use the embedded subsystems (SSE) tied to a specific Cortex core. Our models only use the Cortex-M33. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Remove the now unused MachineClass::default_cpu_type field. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240129151828.59544-7-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/musca.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 770ec1a15ca..e2c9d49af58 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -605,7 +605,6 @@ static void musca_class_init(ObjectClass *oc, void *dat= a) mc->default_cpus =3D 2; mc->min_cpus =3D mc->default_cpus; mc->max_cpus =3D mc->default_cpus; - mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-m33"); mc->valid_cpu_types =3D valid_cpu_types; mc->init =3D musca_init; } --=20 2.34.1