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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id h2-20020aa79f42000000b006dab0d72cd0sm715111pfr.214.2024.02.01.21.51.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Feb 2024 21:51:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706853089; x=1707457889; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sWFZsOSqQ4Z7s/RrBOUjbekx6H9vQkuMkzZGGFe3Im0=; b=W7YdEQnVTZm1E+XRNk242GMHeNWOH1qFod6Kmi88nZ/KBAE9M2q7eLcFqNdgMT3gR2 opKvTg5ZO51oVx+/rugUpNpvWpmNae5kVC21Ypto5+qvjQLHmnGUszEHyQlSPjcPTijh yFM4heYRMVWhED/DQf7rDrBR6CzRx4eYslbzanEPOZzyWzBDg1Znk1/RY1a+G7Qc7/rq uiIIi5i/ARuiO41z+e3C6Pnm2AqSGm31Xv0COECmCSX/cUNquAK4YDuBduz737vS+WeH cCObHpZzjxfR8BB0rPx8Ct3vxfCDUo3hUydbHafzfr/4eCvA6Yz0sFm8GCkqkIUrh0Hc tYdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706853089; x=1707457889; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sWFZsOSqQ4Z7s/RrBOUjbekx6H9vQkuMkzZGGFe3Im0=; b=Rr3ZPWzv9ckVgivMwNbBdAW6LFyM2RPigieXNBcEHkdjD3ir5u+cnw+x539vkgOVek xtKpxrnAqGGUX8yCysI4tbsS5pgc2K6Yqq7iuQWq/3BvwVsEhVkJIMv2KmhxusRzSjDv CfrB+e7dwW3r6A1FCsP4tB8X4X+yxM8+TE/dBKb8swO/A+2e1/zKM1XEXKBturzbSFGl ii8900aql8OGeZSQnLi7GUbLYNf3KkVj3sa7Qy711uSe5DQeXw5t34QK45AQ/Q3ZZEqp DlMbBKxkrZQaiEXYRzCxRJUitYg6yi4i6pKPDhAps3bT4Kk1S1SbEAfXconUYsNXoMf0 LcoA== X-Gm-Message-State: AOJu0YxLm85ln99k9Qk9LVkZUgRm6cEfDKVkD8YCUFNOh+w32k/3dw74 XGpq9T3/qlF4QTsXtQHnKEAutSD445mMJW3X8IiCQVRQH+XBkGHqJCTFXemiWYLTkl1OPtG/fl2 MbZ0= X-Google-Smtp-Source: AGHT+IFJwoe2kooifa0wLSBMTpsA4TVctULJ+1tUkgok+1PYGkj+jLrCrulGK+uimCKSZYvRCrVGkA== X-Received: by 2002:a05:6808:1509:b0:3be:1e78:22ed with SMTP id u9-20020a056808150900b003be1e7822edmr5632468oiw.21.1706853089099; Thu, 01 Feb 2024 21:51:29 -0800 (PST) X-Forwarded-Encrypted: i=0; AJvYcCUu6JinBY+v8G7V6njozTEJik9Y4q+ycaEF6l+46X2yJyexpTENwS1AIDncXHxt2jm4c2NENh2wZSVKNu9ssYklSA== From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 22/57] target/riscv: Rename riscv_cpu_mmu_index to riscv_env_mmu_index Date: Fri, 2 Feb 2024 15:50:01 +1000 Message-Id: <20240202055036.684176-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240202055036.684176-1-richard.henderson@linaro.org> References: <20240202055036.684176-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32b; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706853188527100001 Free up the riscv_cpu_mmu_index name for other usage; emphasize that the argument is 'env'. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/riscv/cpu.h | 4 ++-- target/riscv/cpu_helper.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 5f3955c38d..9c825c7b51 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -498,7 +498,7 @@ target_ulong riscv_cpu_get_geilen(CPURISCVState *env); void riscv_cpu_set_geilen(CPURISCVState *env, target_ulong geilen); bool riscv_cpu_vector_enabled(CPURISCVState *env); void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable); -int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch); +int riscv_env_mmu_index(CPURISCVState *env, bool ifetch); G_NORETURN void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr, MMUAccessType access_type, int mmu_idx, uintptr_t reta= ddr); @@ -507,7 +507,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, bool probe, uintptr_t retaddr); char *riscv_isa_string(RISCVCPU *cpu); =20 -#define cpu_mmu_index riscv_cpu_mmu_index +#define cpu_mmu_index riscv_env_mmu_index =20 #ifndef CONFIG_USER_ONLY void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index c7cc7eb423..15f87ecdb0 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -33,7 +33,7 @@ #include "debug.h" #include "tcg/oversized-guest.h" =20 -int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) +int riscv_env_mmu_index(CPURISCVState *env, bool ifetch) { #ifdef CONFIG_USER_ONLY return 0; --=20 2.34.1