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bh=yR9gpUI9j7JmuCOH74Zh0p03m13fPVsW5VntZmtW9HU=; b=grcZb0xbQ3Um7Pc2LeSUTzEGqebNZUdi4O7bVRTUK8RPldeR4oHwPyvmT0Dd6UgptFDUlX 6iabUIt9he9aMtka8VL1MdH75QWzakbiysSDepFDGqEAjV4Hx3AuS9v2UYlVDsMIRfagsb QgtEGB1Fx9GQPotBy6Yawp0g1ZsQpYM= X-MC-Unique: 7T5rOhsQMNuZ557nSNFi9g-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, alex.williamson@redhat.com, peter.maydell@linaro.org, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: mst@redhat.com, clg@redhat.com, jasowang@redhat.com Subject: [PATCH v2 1/3] virtio-iommu: Add an option to define the input range width Date: Thu, 1 Feb 2024 17:32:22 +0100 Message-ID: <20240201163324.564525-2-eric.auger@redhat.com> In-Reply-To: <20240201163324.564525-1-eric.auger@redhat.com> References: <20240201163324.564525-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.292, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1706805255671100005 Content-Type: text/plain; charset="utf-8" aw-bits is a new option that allows to set the bit width of the input address range. This value will be used as a default for the device config input_range.end. By default it is set to 64 bits which is the current value. Signed-off-by: Eric Auger Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Zhenzhong Duan Tested-by: Yanghang Liu --- v1 -> v2: - Check the aw-bits value is within [32,64] --- include/hw/virtio/virtio-iommu.h | 1 + hw/virtio/virtio-iommu.c | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-io= mmu.h index 781ebaea8f..5fbe4677c2 100644 --- a/include/hw/virtio/virtio-iommu.h +++ b/include/hw/virtio/virtio-iommu.h @@ -66,6 +66,7 @@ struct VirtIOIOMMU { bool boot_bypass; Notifier machine_done; bool granule_frozen; + uint8_t aw_bits; }; =20 #endif diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index ec2ba11d1d..7870bdbeee 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1314,7 +1314,11 @@ static void virtio_iommu_device_realize(DeviceState = *dev, Error **errp) */ s->config.bypass =3D s->boot_bypass; s->config.page_size_mask =3D qemu_real_host_page_mask(); - s->config.input_range.end =3D UINT64_MAX; + if (s->aw_bits < 32 || s->aw_bits > 64) { + error_setg(errp, "aw-bits must be within [32,64]"); + } + s->config.input_range.end =3D + s->aw_bits =3D=3D 64 ? UINT64_MAX : BIT_ULL(s->aw_bits) - 1; s->config.domain_range.end =3D UINT32_MAX; s->config.probe_size =3D VIOMMU_PROBE_SIZE; =20 @@ -1525,6 +1529,7 @@ static Property virtio_iommu_properties[] =3D { DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, TYPE_PCI_BUS, PCIBus *), DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), + DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 2.41.0 From nobody Tue Nov 26 13:24:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1706805278; cv=none; d=zohomail.com; s=zohoarc; b=YgwPteZDEqziwMsQm4yIN1aMs45f3HDts3/usW2ETHaTPbT+chJrrI/Xi8bIdQLZsZfeA0XkwJ7D6baTm+sLqBoTdDNSC+rvoc9HLLKSF64pOQiqBfA0l4q9H9CFGfPxFfayQdYja3oXQ1EEhjP14QNIjEWdNnqXmrtBEiBW2Yk= ARC-Message-Signature: i=1; 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charset="utf-8" Use %u format to trace domain_range limits. Signed-off-by: Eric Auger Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Zhenzhong Duan Tested-by: Yanghang Liu --- hw/virtio/trace-events | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 77905d1994..2350849fbd 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -111,7 +111,7 @@ virtio_iommu_device_reset(void) "reset!" virtio_iommu_system_reset(void) "system reset!" virtio_iommu_get_features(uint64_t features) "device supports features=3D0= x%"PRIx64 virtio_iommu_device_status(uint8_t status) "driver status =3D %d" -virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t = end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8= _t bypass) "page_size_mask=3D0x%"PRIx64" input range start=3D0x%"PRIx64" in= put range end=3D0x%"PRIx64" domain range start=3D%d domain range end=3D%d p= robe_size=3D0x%x bypass=3D0x%x" +virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t = end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8= _t bypass) "page_size_mask=3D0x%"PRIx64" input range start=3D0x%"PRIx64" in= put range end=3D0x%"PRIx64" domain range start=3D%u domain range end=3D%u p= robe_size=3D0x%x bypass=3D0x%x" virtio_iommu_set_config(uint8_t bypass) "bypass=3D0x%x" virtio_iommu_attach(uint32_t domain_id, uint32_t ep_id) "domain=3D%d endpo= int=3D%d" virtio_iommu_detach(uint32_t domain_id, uint32_t ep_id) "domain=3D%d endpo= int=3D%d" --=20 2.41.0 From nobody Tue Nov 26 13:24:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=v7DZE+s2i2KbZeYEYOMdIz2ytMOea1x+BGZ16J/V5Qs=; b=Cre9w6Ld5A0VpN3Pr0fQbRRVdu1dvFCFzu1lmZmsVoR3jWAcna7mJbbjmOlxXrrhLEqZYN XEVNSVDHOnQgjKjkth2O5j71EA1/IvClphMlg9fAF60ud8ntnZvYCJg93jEMdYJq2l4xH1 IrjQUdtfycunPbLj9od5oegKXYzBAlA= X-MC-Unique: cosXeOKANn-wrVv28Ut2cQ-1 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, jean-philippe@linaro.org, alex.williamson@redhat.com, peter.maydell@linaro.org, zhenzhong.duan@intel.com, yanghliu@redhat.com Cc: mst@redhat.com, clg@redhat.com, jasowang@redhat.com Subject: [PATCH v2 3/3] hw: Set virtio-iommu aw-bits default value on pc_q35_9.0 and arm virt Date: Thu, 1 Feb 2024 17:32:24 +0100 Message-ID: <20240201163324.564525-4-eric.auger@redhat.com> In-Reply-To: <20240201163324.564525-1-eric.auger@redhat.com> References: <20240201163324.564525-1-eric.auger@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.9 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -33 X-Spam_score: -3.4 X-Spam_bar: --- X-Spam_report: (-3.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.292, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1706805323894100003 Content-Type: text/plain; charset="utf-8" Currently the default input range can extend to 64 bits. On x86, when the virtio-iommu protects vfio devices, the physical iommu may support only 39 bits. Let's set the default to 39, as done for the intel-iommu. On ARM we set 48b as a default (matching SMMUv3 SMMU_IDR5.VAX =3D=3D 0). We use hw_compat_8_2 to handle the compatibility for machines before 9.0 which used to have a virtio-iommu default input range of 64 bits. Of course if aw-bits is set from the command line, the default is overriden. Signed-off-by: Eric Auger Reviewed-by: Zhenzhong Duan Tested-by: Yanghang Liu --- v1 -> v2: - set aw-bits to 48b on ARM - use hw_compat_8_2 to handle the compat for older machines which used 64b as a default --- hw/arm/virt.c | 6 ++++++ hw/core/machine.c | 5 ++++- hw/i386/pc.c | 6 ++++++ hw/virtio/virtio-iommu.c | 2 +- 4 files changed, 17 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index e6ead2c5c8..56539f2fc5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2718,10 +2718,16 @@ static void virt_machine_device_pre_plug_cb(Hotplug= Handler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_pre_plug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + uint8_t aw_bits =3D object_property_get_uint(OBJECT(dev), + "aw-bits", NULL); hwaddr db_start =3D 0, db_end =3D 0; QList *reserved_regions; char *resv_prop_str; =20 + if (!aw_bits) { + qdev_prop_set_uint8(dev, "aw-bits", 48); + } + if (vms->iommu !=3D VIRT_IOMMU_NONE) { error_setg(errp, "virt machine does not support multiple IOMMU= s"); return; diff --git a/hw/core/machine.c b/hw/core/machine.c index fb5afdcae4..70ac96954c 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -30,9 +30,12 @@ #include "exec/confidential-guest-support.h" #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-net.h" +#include "hw/virtio/virtio-iommu.h" #include "audio/audio.h" =20 -GlobalProperty hw_compat_8_2[] =3D {}; +GlobalProperty hw_compat_8_2[] =3D { + { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, +}; const size_t hw_compat_8_2_len =3D G_N_ELEMENTS(hw_compat_8_2); =20 GlobalProperty hw_compat_8_1[] =3D { diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 803244e5cc..0e2bcb4840 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1458,6 +1458,8 @@ static void pc_machine_device_pre_plug_cb(HotplugHand= ler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) { virtio_md_pci_pre_plug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), e= rrp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + uint8_t aw_bits =3D object_property_get_uint(OBJECT(dev), + "aw-bits", NULL); /* Declare the APIC range as the reserved MSI region */ char *resv_prop_str =3D g_strdup_printf("0xfee00000:0xfeefffff:%d", VIRTIO_IOMMU_RESV_MEM_T_MSI); @@ -1466,6 +1468,10 @@ static void pc_machine_device_pre_plug_cb(HotplugHan= dler *hotplug_dev, qlist_append_str(reserved_regions, resv_prop_str); qdev_prop_set_array(dev, "reserved-regions", reserved_regions); =20 + if (!aw_bits) { + qdev_prop_set_uint8(dev, "aw-bits", 39); + } + g_free(resv_prop_str); } =20 diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 7870bdbeee..c468e9b13b 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -1529,7 +1529,7 @@ static Property virtio_iommu_properties[] =3D { DEFINE_PROP_LINK("primary-bus", VirtIOIOMMU, primary_bus, TYPE_PCI_BUS, PCIBus *), DEFINE_PROP_BOOL("boot-bypass", VirtIOIOMMU, boot_bypass, true), - DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64), + DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 0), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 2.41.0