From nobody Tue Nov 26 16:43:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1706695583; cv=none; d=zohomail.com; s=zohoarc; b=GSr59zAyzeP+RjAcreazB5P3k4rOVXJSoC84nUL2YnfDsU3J8PpTWHFy/Owe8a7QkDrvUj3dPyccdd2pJEatUZwrc3BkhAw0qe1tcJiseOTg1G4rk0RJYNx+GVPw+/tEcH8q7+AiFdQsfbY7Obw0gtnnZeOeO5w/7ESh27CIRP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706695583; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=1FFNVo1N9IUJAJSEfrOE71IKREqotH1/L3Ql2BK9EPc=; b=R81zOTwUuYa1X8flJL6L1Jcj5bCLaCm9i39mTQOvAClm4KsASVUXrNfnXWsjzO/qeEOHN6gut0GszYADSB4YJyAxYw90EJaMSkY6eYlxjDlwXArFkS4iMWSpWlew68pHZdmJYGkBeF5TQPBScF88/NtmDfQjUuokWdSxaMw3pWI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=@intel.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706695583940145.59762517850265; Wed, 31 Jan 2024 02:06:23 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rV7RU-00071X-Dn; Wed, 31 Jan 2024 05:03:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rV7Q8-0005HL-Cb for qemu-devel@nongnu.org; Wed, 31 Jan 2024 05:02:19 -0500 Received: from mgamail.intel.com ([192.198.163.7]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rV7Q5-0008UC-BO for qemu-devel@nongnu.org; Wed, 31 Jan 2024 05:02:15 -0500 Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jan 2024 02:02:02 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa003.fm.intel.com with ESMTP; 31 Jan 2024 02:01:56 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1706695333; x=1738231333; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0cGhWcQgHVEDvEFjhonbcPS7fz/KlBqAE4ym2nVprMw=; b=hBXANaEIlBiWXptKLAMxu8j33Ij/NHMC0Z4m6mXV/H+y6fmRyYw9FUEM eH2oKBzx6IG53845M7KH5ZjjioRc5puV4HOKdjKpzhDeWx4UEU94hSbY7 m4xnhCft3NzctF0pU9BxBUv7dRSjawRSpSzugm9yrjL3ElQLc7t4i1NJk HGKWo1iGol9tSXhNrMJIaxxFIPN2NZG3DE9EbmfZs668Hw+U7daVBAhJU KJ/PcU+Nej03yFXfjJd4xp0gnvJP4liwXxdNdkSUKt76F8XETD5M4MS6B 66GuFr5xqoq7M8wWBvjlqtHKARUb63uZg2V+kZWnbJbHSp+QXVh1mv8J4 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10969"; a="25033038" X-IronPort-AV: E=Sophos;i="6.05,231,1701158400"; d="scan'208";a="25033038" X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.05,231,1701158400"; d="scan'208";a="4036306" From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Paolo Bonzini , Richard Henderson , Eric Blake , Markus Armbruster , Marcelo Tosatti Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Babu Moger , Xiaoyao Li , Zhenyu Wang , Zhuocheng Ding , Yongwei Ma , Zhao Liu Subject: [PATCH v8 18/21] hw/i386/pc: Support smp.modules for x86 PC machine Date: Wed, 31 Jan 2024 18:13:47 +0800 Message-Id: <20240131101350.109512-19-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240131101350.109512-1-zhao1.liu@linux.intel.com> References: <20240131101350.109512-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: none client-ip=192.198.163.7; envelope-from=zhao1.liu@linux.intel.com; helo=mgamail.intel.com X-Spam_score_int: -32 X-Spam_score: -3.3 X-Spam_bar: --- X-Spam_report: (-3.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.292, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1706695584351100005 Content-Type: text/plain; charset="utf-8" From: Zhao Liu As module-level topology support is added to X86CPU, now we can enable the support for the modules parameter on PC machines. With this support, we can define a 5-level x86 CPU topology with "-smp": -smp cpus=3D*,maxcpus=3D*,sockets=3D*,dies=3D*,modules=3D*,cores=3D*,thread= s=3D*. Additionally, add the 5-level topology example in description of "-smp". Tested-by: Yongwei Ma Co-developed-by: Zhuocheng Ding Signed-off-by: Zhuocheng Ding Signed-off-by: Zhao Liu --- Changes since v7: * Supported modules instead of clusters for PC. * Dropped Michael/Babu/Yanan's ACKed/Tested/Reviewed tags since the code change. * Re-added Yongwei's Tested tag For his re-testing. --- hw/i386/pc.c | 1 + qemu-options.hx | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 803244e5ccba..22923f26c0e6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1849,6 +1849,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->default_cpu_type =3D TARGET_DEFAULT_CPU_TYPE; mc->nvdimm_supported =3D true; mc->smp_props.dies_supported =3D true; + mc->smp_props.modules_supported =3D true; mc->default_ram_id =3D "pc.ram"; pcmc->default_smbios_ep_type =3D SMBIOS_ENTRY_POINT_TYPE_64; =20 diff --git a/qemu-options.hx b/qemu-options.hx index ced828486376..e164ecb60367 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -345,14 +345,14 @@ SRST -smp 8,sockets=3D2,cores=3D2,threads=3D2,maxcpus=3D8 =20 The following sub-option defines a CPU topology hierarchy (2 sockets - totally on the machine, 2 dies per socket, 2 cores per die, 2 threads - per core) for PC machines which support sockets/dies/cores/threads. - Some members of the option can be omitted but their values will be - automatically computed: + totally on the machine, 2 dies per socket, 2 modules per die, 2 cores = per + module, 2 threads per core) for PC machines which support sockets/dies + /modules/cores/threads. Some members of the option can be omitted but + their values will be automatically computed: =20 :: =20 - -smp 16,sockets=3D2,dies=3D2,cores=3D2,threads=3D2,maxcpus=3D16 + -smp 32,sockets=3D2,dies=3D2,modules=3D2,cores=3D2,threads=3D2,max= cpus=3D32 =20 The following sub-option defines a CPU topology hierarchy (2 sockets totally on the machine, 2 clusters per socket, 2 cores per cluster, --=20 2.34.1