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([103.210.27.218]) by smtp.gmail.com with ESMTPSA id l6-20020a170902eb0600b001d8dbb867b1sm2710591plb.179.2024.01.29.15.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 15:31:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706571114; x=1707175914; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OUpbcCo1Gwdi5RtgiHT0o/+TLFpXSWoQp1ADmvaIAeE=; b=eRr3aR97g1P5+ySHFEy/kK+B9hqTXLOA/Ia1x7v10uVy04UdifUX+40RaboUvdMonw L+SyEs1rvMKZk+FE1FXk8MWa7C5hQXzd80FOPVIbY183RfAav4XHCeY+eWSEr8iHefG/ NtydjIIAPacTMDxrR28ue9RAS2XuZodLJsdESMEvvPFqzDqyvruJAJmFdVsfQa3sbJLW gSNCGDe63ZzIgqv9sNABf7H8YHSgrGJuyLCTozARgnTIlJcZzpC5i5lsX3bKBmgP/IZ5 02Dzw+JjVCOXY9zzniXm81oVCSd2Y3V2gk8ZgYsCAvXLFVhj6nVx07HHmEy7kJkGUfAC B09Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706571114; x=1707175914; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OUpbcCo1Gwdi5RtgiHT0o/+TLFpXSWoQp1ADmvaIAeE=; b=bqqggRF89UpetZkM6/+xrfbabqWEU3at+araHKSih1JulZuA8GbL0LwyN+VuFQEeIx zUCh8BGDDFx2Afd47bD1YCs5LgLhhlGFT5Z3ZPucMcQvVdBkJYYDTvLcshWvKU8z2gs/ JyEBETZ4uNMI2VbmapDPpDD7pmjqPsKLAlsW4yxZUmJrSfpH/xmA1T/67EhzLbPIFJ6i 7JY/bBqlpZuGk18VlBaV+HoyvUTcaILCXGErTdfeSozXPcM6fk3BnkM/Jz/7R9aSTGwS CUzfEvGb68qTi0y0Sauv4//RGJsW93CgfSduWN7mZnZaqQoNQ4BwM/kL7SMAJHnqCzUR seMw== X-Gm-Message-State: AOJu0YztWzoYiO/hm93vkgLV/f1/Z80Etos9KQZFbLciaXyH0/S7u0zK TskuclxY0YmJxolhUtXD6uocx9FK/cyza5T8Xlklat3odCqmWtrbypbhAmyY1hpVvh6uAnfbZHS hLsY= X-Google-Smtp-Source: AGHT+IFW+/JiwHFFTRiKhroGzPNS5wC66nCN9prVjIt2Dm20vB3Nsj5WmAszJv8ufKbie9yyMSDA4A== X-Received: by 2002:a17:90a:f0d7:b0:290:c94b:6667 with SMTP id fa23-20020a17090af0d700b00290c94b6667mr49378pjb.48.1706571114361; Mon, 29 Jan 2024 15:31:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: philmd@linaro.org, anjo@rev.ng Subject: [PATCH 29/33] target/sparc: Populate CPUClass.mmu_index Date: Tue, 30 Jan 2024 09:30:39 +1000 Message-Id: <20240129233043.34558-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129233043.34558-1-richard.henderson@linaro.org> References: <20240129233043.34558-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706571205831100007 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/sparc/cpu.h | 34 ++++++---------------------------- target/sparc/cpu.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 28 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 12a11ecb26..92c58c92c1 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -708,34 +708,6 @@ static inline int cpu_supervisor_mode(CPUSPARCState *e= nv1) } #endif =20 -static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch) -{ -#if defined(CONFIG_USER_ONLY) - return MMU_USER_IDX; -#elif !defined(TARGET_SPARC64) - if ((env->mmuregs[0] & MMU_E) =3D=3D 0) { /* MMU disabled */ - return MMU_PHYS_IDX; - } else { - return env->psrs; - } -#else - /* IMMU or DMMU disabled. */ - if (ifetch - ? (env->lsu & IMMU_E) =3D=3D 0 || (env->pstate & PS_RED) !=3D 0 - : (env->lsu & DMMU_E) =3D=3D 0) { - return MMU_PHYS_IDX; - } else if (cpu_hypervisor_mode(env)) { - return MMU_PHYS_IDX; - } else if (env->tl > 0) { - return MMU_NUCLEUS_IDX; - } else if (cpu_supervisor_mode(env)) { - return MMU_KERNEL_IDX; - } else { - return MMU_USER_IDX; - } -#endif -} - static inline int cpu_interrupts_enabled(CPUSPARCState *env1) { #if !defined (TARGET_SPARC64) @@ -777,6 +749,12 @@ trap_state* cpu_tsptr(CPUSPARCState* env); #define TB_FLAG_HYPER (1 << 7) #define TB_FLAG_ASI_SHIFT 24 =20 +int sparc_cpu_mmu_index(CPUState *cs, bool ifetch); +static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch) +{ + return sparc_cpu_mmu_index(env_cpu(env), ifetch); +} + static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, vaddr *pc, uint64_t *cs_base, uint32_t *pflag= s) { diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 7d0d629a3d..7a3b815737 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -718,6 +718,34 @@ static bool sparc_cpu_has_work(CPUState *cs) cpu_interrupts_enabled(env); } =20 +int sparc_cpu_mmu_index(CPUState *cs, bool ifetch) +{ + CPUSPARCState *env =3D cpu_env(cs); + +#ifndef TARGET_SPARC64 + if ((env->mmuregs[0] & MMU_E) =3D=3D 0) { /* MMU disabled */ + return MMU_PHYS_IDX; + } else { + return env->psrs; + } +#else + /* IMMU or DMMU disabled. */ + if (ifetch + ? (env->lsu & IMMU_E) =3D=3D 0 || (env->pstate & PS_RED) !=3D 0 + : (env->lsu & DMMU_E) =3D=3D 0) { + return MMU_PHYS_IDX; + } else if (cpu_hypervisor_mode(env)) { + return MMU_PHYS_IDX; + } else if (env->tl > 0) { + return MMU_NUCLEUS_IDX; + } else if (cpu_supervisor_mode(env)) { + return MMU_KERNEL_IDX; + } else { + return MMU_USER_IDX; + } +#endif +} + static char *sparc_cpu_type_name(const char *cpu_model) { char *name =3D g_strdup_printf(SPARC_CPU_TYPE_NAME("%s"), cpu_model); @@ -906,6 +934,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) cc->class_by_name =3D sparc_cpu_class_by_name; cc->parse_features =3D sparc_cpu_parse_features; cc->has_work =3D sparc_cpu_has_work; + cc->mmu_index =3D sparc_cpu_mmu_index; cc->dump_state =3D sparc_cpu_dump_state; #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) cc->memory_rw_debug =3D sparc_cpu_memory_rw_debug; --=20 2.34.1