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Mon, 29 Jan 2024 08:46:52 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , kvm@vger.kernel.org, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Song Gao Subject: [PATCH v3 15/29] target/loongarch: Prefer fast cpu_env() over slower CPU QOM cast macro Date: Mon, 29 Jan 2024 17:44:57 +0100 Message-ID: <20240129164514.73104-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240129164514.73104-1-philmd@linaro.org> References: <20240129164514.73104-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706546971047100001 Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/loongarch/cpu.c | 39 ++++++++--------------------- target/loongarch/gdbstub.c | 6 ++--- target/loongarch/kvm/kvm.c | 41 +++++++++---------------------- target/loongarch/tcg/tlb_helper.c | 6 ++--- 4 files changed, 26 insertions(+), 66 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 3094bbc0d9..d1c907b2a7 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -91,18 +91,12 @@ void G_NORETURN do_raise_exception(CPULoongArchState *e= nv, =20 static void loongarch_cpu_set_pc(CPUState *cs, vaddr value) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; - - set_pc(env, value); + set_pc(cpu_env(cs), value); } =20 static vaddr loongarch_cpu_get_pc(CPUState *cs) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; - - return env->pc; + return cpu_env(cs)->pc; } =20 #ifndef CONFIG_USER_ONLY @@ -157,8 +151,7 @@ static inline bool cpu_loongarch_hw_interrupts_pending(= CPULoongArchState *env) #ifndef CONFIG_USER_ONLY static void loongarch_cpu_do_interrupt(CPUState *cs) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); bool update_badinstr =3D 1; int cause =3D -1; const char *name; @@ -308,8 +301,7 @@ static void loongarch_cpu_do_transaction_failed(CPUStat= e *cs, hwaddr physaddr, MemTxResult response, uintptr_t retaddr) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 if (access_type =3D=3D MMU_INST_FETCH) { do_raise_exception(env, EXCCODE_ADEF, retaddr); @@ -321,8 +313,7 @@ static void loongarch_cpu_do_transaction_failed(CPUStat= e *cs, hwaddr physaddr, static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_reque= st) { if (interrupt_request & CPU_INTERRUPT_HARD) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 if (cpu_loongarch_hw_interrupts_enabled(env) && cpu_loongarch_hw_interrupts_pending(env)) { @@ -339,21 +330,15 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs= , int interrupt_request) static void loongarch_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); - set_pc(env, tb->pc); + set_pc(cpu_env(cs), tb->pc); } =20 static void loongarch_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; - - set_pc(env, data[0]); + set_pc(cpu_env(cs), data[0]); } #endif /* CONFIG_TCG */ =20 @@ -362,12 +347,10 @@ static bool loongarch_cpu_has_work(CPUState *cs) #ifdef CONFIG_USER_ONLY return true; #else - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; bool has_work =3D false; =20 if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && - cpu_loongarch_hw_interrupts_pending(env)) { + cpu_loongarch_hw_interrupts_pending(cpu_env(cs))) { has_work =3D true; } =20 @@ -499,9 +482,8 @@ static void loongarch_max_initfn(Object *obj) static void loongarch_cpu_reset_hold(Object *obj) { CPUState *cs =3D CPU(obj); - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); LoongArchCPUClass *lacc =3D LOONGARCH_CPU_GET_CLASS(obj); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 if (lacc->parent_phases.hold) { lacc->parent_phases.hold(obj); @@ -684,8 +666,7 @@ static ObjectClass *loongarch_cpu_class_by_name(const c= har *cpu_model) =20 void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); int i; =20 qemu_fprintf(f, " PC=3D%016" PRIx64 " ", env->pc); diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 5fc2f19e96..91a16183b0 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -33,8 +33,7 @@ void write_fcc(CPULoongArchState *env, uint64_t val) =20 int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int= n) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); uint64_t val; =20 if (0 <=3D n && n < 32) { @@ -60,8 +59,7 @@ int loongarch_cpu_gdb_read_register(CPUState *cs, GByteAr= ray *mem_buf, int n) =20 int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); target_ulong tmp; int read_length; int length =3D 0; diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c index c19978a970..df5e199860 100644 --- a/target/loongarch/kvm/kvm.c +++ b/target/loongarch/kvm/kvm.c @@ -38,8 +38,7 @@ static int kvm_loongarch_get_regs_core(CPUState *cs) int ret =3D 0; int i; struct kvm_regs regs; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 /* Get the current register set as KVM seems it */ ret =3D kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); @@ -62,8 +61,7 @@ static int kvm_loongarch_put_regs_core(CPUState *cs) int ret =3D 0; int i; struct kvm_regs regs; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 /* Set the registers based on QEMU's view of things */ for (i =3D 0; i < 32; i++) { @@ -82,8 +80,7 @@ static int kvm_loongarch_put_regs_core(CPUState *cs) static int kvm_loongarch_get_csr(CPUState *cs) { int ret =3D 0; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 ret |=3D kvm_get_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), &env->CSR_CRMD); @@ -253,8 +250,7 @@ static int kvm_loongarch_get_csr(CPUState *cs) static int kvm_loongarch_put_csr(CPUState *cs, int level) { int ret =3D 0; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 ret |=3D kvm_set_one_reg(cs, KVM_IOC_CSRID(LOONGARCH_CSR_CRMD), &env->CSR_CRMD); @@ -430,9 +426,7 @@ static int kvm_loongarch_get_regs_fp(CPUState *cs) { int ret, i; struct kvm_fpu fpu; - - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 ret =3D kvm_vcpu_ioctl(cs, KVM_GET_FPU, &fpu); if (ret < 0) { @@ -456,9 +450,7 @@ static int kvm_loongarch_put_regs_fp(CPUState *cs) { int ret, i; struct kvm_fpu fpu; - - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 fpu.fcsr =3D env->fcsr0; fpu.fcc =3D 0; @@ -487,8 +479,7 @@ static int kvm_loongarch_get_mpstate(CPUState *cs) { int ret =3D 0; struct kvm_mp_state mp_state; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 if (cap_has_mp_state) { ret =3D kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state); @@ -505,12 +496,8 @@ static int kvm_loongarch_get_mpstate(CPUState *cs) static int kvm_loongarch_put_mpstate(CPUState *cs) { int ret =3D 0; - - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; - struct kvm_mp_state mp_state =3D { - .mp_state =3D env->mp_state + .mp_state =3D cpu_env(cs)->mp_state }; =20 if (cap_has_mp_state) { @@ -527,8 +514,7 @@ static int kvm_loongarch_get_cpucfg(CPUState *cs) { int i, ret =3D 0; uint64_t val; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 for (i =3D 0; i < 21; i++) { ret =3D kvm_get_one_reg(cs, KVM_IOC_CPUCFG(i), &val); @@ -549,8 +535,7 @@ static int kvm_check_cpucfg2(CPUState *cs) .attr =3D 2, .addr =3D (uint64_t)&val, }; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); =20 ret =3D kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr); =20 @@ -575,8 +560,7 @@ static int kvm_check_cpucfg2(CPUState *cs) static int kvm_loongarch_put_cpucfg(CPUState *cs) { int i, ret =3D 0; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); uint64_t val; =20 for (i =3D 0; i < 21; i++) { @@ -758,8 +742,7 @@ bool kvm_arch_cpu_check_are_resettable(void) int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { int ret =3D 0; - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); MemTxAttrs attrs =3D {}; =20 attrs.requester_id =3D env_cpu(env)->cpu_index; diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_h= elper.c index 449043c68b..2df0bced4c 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -235,8 +235,7 @@ static int get_physical_address(CPULoongArchState *env,= hwaddr *physical, =20 hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); hwaddr phys_addr; int prot; =20 @@ -679,8 +678,7 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address= , int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) { - LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); - CPULoongArchState *env =3D &cpu->env; + CPULoongArchState *env =3D cpu_env(cs); hwaddr physical; int prot; int ret; --=20 2.41.0