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Mon, 29 Jan 2024 08:46:27 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , kvm@vger.kernel.org, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Brian Cain Subject: [PATCH v3 11/29] target/hexagon: Prefer fast cpu_env() over slower CPU QOM cast macro Date: Mon, 29 Jan 2024 17:44:53 +0100 Message-ID: <20240129164514.73104-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240129164514.73104-1-philmd@linaro.org> References: <20240129164514.73104-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706546891122100004 Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Brian Cain Reviewed-by: Richard Henderson --- target/hexagon/cpu.c | 25 ++++++------------------- target/hexagon/gdbstub.c | 6 ++---- 2 files changed, 8 insertions(+), 23 deletions(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 085d6c0115..17a22aa7a5 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -236,10 +236,7 @@ static void hexagon_dump(CPUHexagonState *env, FILE *f= , int flags) =20 static void hexagon_dump_state(CPUState *cs, FILE *f, int flags) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; - - hexagon_dump(env, f, flags); + hexagon_dump(cpu_env(cs), f, flags); } =20 void hexagon_debug(CPUHexagonState *env) @@ -249,25 +246,19 @@ void hexagon_debug(CPUHexagonState *env) =20 static void hexagon_cpu_set_pc(CPUState *cs, vaddr value) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; - env->gpr[HEX_REG_PC] =3D value; + cpu_env(cs)->gpr[HEX_REG_PC] =3D value; } =20 static vaddr hexagon_cpu_get_pc(CPUState *cs) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; - return env->gpr[HEX_REG_PC]; + return cpu_env(cs)->gpr[HEX_REG_PC]; } =20 static void hexagon_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); - env->gpr[HEX_REG_PC] =3D tb->pc; + cpu_env(cs)->gpr[HEX_REG_PC] =3D tb->pc; } =20 static bool hexagon_cpu_has_work(CPUState *cs) @@ -279,18 +270,14 @@ static void hexagon_restore_state_to_opc(CPUState *cs, const TranslationBlock *tb, const uint64_t *data) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; - - env->gpr[HEX_REG_PC] =3D data[0]; + cpu_env(cs)->gpr[HEX_REG_PC] =3D data[0]; } =20 static void hexagon_cpu_reset_hold(Object *obj) { CPUState *cs =3D CPU(obj); - HexagonCPU *cpu =3D HEXAGON_CPU(cs); HexagonCPUClass *mcc =3D HEXAGON_CPU_GET_CLASS(obj); - CPUHexagonState *env =3D &cpu->env; + CPUHexagonState *env =3D cpu_env(cs); =20 if (mcc->parent_phases.hold) { mcc->parent_phases.hold(obj); diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c index 54d37e006e..f773f8ea4f 100644 --- a/target/hexagon/gdbstub.c +++ b/target/hexagon/gdbstub.c @@ -22,8 +22,7 @@ =20 int hexagon_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; + CPUHexagonState *env =3D cpu_env(cs); =20 if (n =3D=3D HEX_REG_P3_0_ALIASED) { uint32_t p3_0 =3D 0; @@ -42,8 +41,7 @@ int hexagon_gdb_read_register(CPUState *cs, GByteArray *m= em_buf, int n) =20 int hexagon_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - HexagonCPU *cpu =3D HEXAGON_CPU(cs); - CPUHexagonState *env =3D &cpu->env; + CPUHexagonState *env =3D cpu_env(cs); =20 if (n =3D=3D HEX_REG_P3_0_ALIASED) { uint32_t p3_0 =3D ldtul_p(mem_buf); --=20 2.41.0