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[121.45.131.89]) by smtp.gmail.com with ESMTPSA id w24-20020a17090aaf9800b002906e09e1d1sm5631873pjq.18.2024.01.27.20.42.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Jan 2024 20:42:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706416951; x=1707021751; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8stgI+xO0LshRlV+dbOXjfDk9OWAAP8Iuj6nGWfVSvI=; b=ZMeBH8qsYJ009dEw2e/IrqW9Za95sgIFtwbsh7LKXgAsEnP3RPIuNIzAM9TU1Csp2m YsxAW8hxtbRTGr5VxiaXIPii/wb1eHa2Lb4f4zhbE5ahh5H7O9qXfHAnVSWU2n5xNYHE tp+xb4+m9GOUC5EKQsjlCgR7zucKcO/rg4lIOHAV/4YYaCVu81J9WRvByY6a7eeYv0qW ELRKRaW9CoCZnmxggguOx6HVGvEKmt7kj016ziKUW4UYYl42EDNql6fqrXp7Ve4Y17F8 KkeNj89h2Z6MdC/MiVQuMKGQp+IqlBSxKVj/z/oHbXEipl7JtiKtosRXh7K/oSfGs6TZ BTbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706416951; x=1707021751; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8stgI+xO0LshRlV+dbOXjfDk9OWAAP8Iuj6nGWfVSvI=; b=FBXwDtAJAwx0UxQNY9W5n3IGR8MuSCHA5riR2b67DuZm4QHfxGrEQF+wU7L6pOcolt h0zEP24LSRGJKGKIr3II6K5lVJz2Qtv2Vj871iAyy6rljMtXXT64/g9KHTkGkxzUQ2Yp E3Fv/yjEtCkvlhttWtv3pyfFX8dw30vjPunlP4eiZQhMlR3CIqbNLpfsyhQEod7LNlz3 4ic5fWQPPM7N5Tzjxf91NhyIFbTGsIFNad2QimsKJ6JCkfrTXxXsMu4ckwWEuqv7vaC4 /38s00izH51pUD6vo7KKAZfytPKyv9TnnViiH2rxYaZmKKlqsT/uhjDhcu/IQ2TQucTT ASuA== X-Gm-Message-State: AOJu0YyY7SucVBHOwnD6nM7rEWmorJ+WP87fYzZHjUYRtQlyz/IHB3go DLtOPjY3S7znTeDLtUl//V+6mGrRU3sHJCkDsqDCz6aOvJ3BYUTSZKW7Y9102jcbV+FgAam2rGO mKSY+Og== X-Google-Smtp-Source: AGHT+IHoQHbXyGCIWkheEG2gDNNMGuSHWgbKewCc7D7o5WZRtSE7QjNYLJQkbTL2TBAU8cTbastYpg== X-Received: by 2002:a17:90a:6e4a:b0:290:58a7:1d65 with SMTP id s10-20020a17090a6e4a00b0029058a71d65mr2371173pjm.49.1706416951073; Sat, 27 Jan 2024 20:42:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Anton Johansson Subject: [PATCH 05/33] include/exec: Use vaddr in DisasContextBase for virtual addresses Date: Sun, 28 Jan 2024 14:41:45 +1000 Message-Id: <20240128044213.316480-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240128044213.316480-1-richard.henderson@linaro.org> References: <20240128044213.316480-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706417024750100003 Content-Type: text/plain; charset="utf-8" From: Anton Johansson Updates target/ QEMU_LOG macros to use VADDR_PRIx for printing updated DisasContextBase fields. Signed-off-by: Anton Johansson Message-Id: <20240119144024.14289-10-anjo@rev.ng> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- include/exec/translator.h | 6 +++--- target/mips/tcg/translate.h | 3 ++- target/hexagon/translate.c | 3 ++- target/m68k/translate.c | 2 +- target/mips/tcg/translate.c | 12 ++++++------ 5 files changed, 14 insertions(+), 12 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index b0412ea6b6..51624feb10 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -79,8 +79,8 @@ typedef enum DisasJumpType { */ typedef struct DisasContextBase { TranslationBlock *tb; - target_ulong pc_first; - target_ulong pc_next; + vaddr pc_first; + vaddr pc_next; DisasJumpType is_jmp; int num_insns; int max_insns; @@ -235,7 +235,7 @@ void translator_fake_ldb(uint8_t insn8, abi_ptr pc); * Translators can use this to enforce the rule that only single-insn * translation blocks are allowed to cross page boundaries. */ -static inline bool is_same_page(const DisasContextBase *db, target_ulong a= ddr) +static inline bool is_same_page(const DisasContextBase *db, vaddr addr) { return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) =3D=3D 0; } diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index cffcfeab8c..93a78b8121 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -202,7 +202,8 @@ extern TCGv bcond; do { = \ if (MIPS_DEBUG_DISAS) { = \ qemu_log_mask(CPU_LOG_TB_IN_ASM, = \ - TARGET_FMT_lx ": %08x Invalid %s %03x %03x %03x\= n", \ + "%016" VADDR_PRIx = \ + ": %08x Invalid %s %03x %03x %03x\n", = \ ctx->base.pc_next, ctx->opcode, op, = \ ctx->opcode >> 26, ctx->opcode & 0x3F, = \ ((ctx->opcode >> 16) & 0x1F)); = \ diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index a14211cf68..f163eefe97 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -234,7 +234,8 @@ static int read_packet_words(CPUHexagonState *env, Disa= sContext *ctx, g_assert(ctx->base.num_insns =3D=3D 1); } =20 - HEX_DEBUG_LOG("decode_packet: pc =3D 0x%x\n", ctx->base.pc_next); + HEX_DEBUG_LOG("decode_packet: pc =3D 0x%" VADDR_PRIx "\n", + ctx->base.pc_next); HEX_DEBUG_LOG(" words =3D { "); for (int i =3D 0; i < nwords; i++) { HEX_DEBUG_LOG("0x%x, ", words[i]); diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5ec88c5f0d..f886190f88 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -1457,7 +1457,7 @@ DISAS_INSN(undef) * for the 680x0 series, as well as those that are implemented * but actually illegal for CPU32 or pre-68020. */ - qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %08x\n", + qemu_log_mask(LOG_UNIMP, "Illegal instruction: %04x @ %" VADDR_PRIx "\= n", insn, s->base.pc_next); gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); } diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index e10232738c..12094cc1e7 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -4585,8 +4585,8 @@ static void gen_compute_branch(DisasContext *ctx, uin= t32_t opc, =20 if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" - TARGET_FMT_lx "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); goto out; @@ -9061,8 +9061,8 @@ static void gen_compute_branch1_r6(DisasContext *ctx,= uint32_t op, =20 if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; @@ -11274,8 +11274,8 @@ static void gen_compute_compact_branch(DisasContext= *ctx, uint32_t opc, =20 if (ctx->hflags & MIPS_HFLAG_BMASK) { #ifdef MIPS_DEBUG_DISAS - LOG_DISAS("Branch in delay / forbidden slot at PC 0x" TARGET_FMT_lx - "\n", ctx->base.pc_next); + LOG_DISAS("Branch in delay / forbidden slot at PC 0x%016" + VADDR_PRIx "\n", ctx->base.pc_next); #endif gen_reserved_instruction(ctx); return; --=20 2.34.1