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Fri, 26 Jan 2024 14:06:01 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Thomas Huth , qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, Eduardo Habkost , kvm@vger.kernel.org, qemu-ppc@nongnu.org, Richard Henderson , Vladimir Sementsov-Ogievskiy , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yoshinori Sato Subject: [PATCH v2 18/23] target/rx: Prefer fast cpu_env() over slower CPU QOM cast macro Date: Fri, 26 Jan 2024 23:04:00 +0100 Message-ID: <20240126220407.95022-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240126220407.95022-1-philmd@linaro.org> References: <20240126220407.95022-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706307045162100001 Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/rx/gdbstub.c | 6 ++---- target/rx/helper.c | 6 ++---- target/rx/translate.c | 3 +-- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/target/rx/gdbstub.c b/target/rx/gdbstub.c index d7e0e6689b..f222bf003b 100644 --- a/target/rx/gdbstub.c +++ b/target/rx/gdbstub.c @@ -21,8 +21,7 @@ =20 int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { - RXCPU *cpu =3D RX_CPU(cs); - CPURXState *env =3D &cpu->env; + CPURXState *env =3D cpu_env(cs); =20 switch (n) { case 0 ... 15: @@ -53,8 +52,7 @@ int rx_cpu_gdb_read_register(CPUState *cs, GByteArray *me= m_buf, int n) =20 int rx_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { - RXCPU *cpu =3D RX_CPU(cs); - CPURXState *env =3D &cpu->env; + CPURXState *env =3D cpu_env(cs); uint32_t psw; switch (n) { case 0 ... 15: diff --git a/target/rx/helper.c b/target/rx/helper.c index dad5fb4976..80912e8dcb 100644 --- a/target/rx/helper.c +++ b/target/rx/helper.c @@ -45,8 +45,7 @@ void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int= rte) #define INT_FLAGS (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR) void rx_cpu_do_interrupt(CPUState *cs) { - RXCPU *cpu =3D RX_CPU(cs); - CPURXState *env =3D &cpu->env; + CPURXState *env =3D cpu_env(cs); int do_irq =3D cs->interrupt_request & INT_FLAGS; uint32_t save_psw; =20 @@ -122,8 +121,7 @@ void rx_cpu_do_interrupt(CPUState *cs) =20 bool rx_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { - RXCPU *cpu =3D RX_CPU(cs); - CPURXState *env =3D &cpu->env; + CPURXState *env =3D cpu_env(cs); int accept =3D 0; /* hardware interrupt (Normal) */ if ((interrupt_request & CPU_INTERRUPT_HARD) && diff --git a/target/rx/translate.c b/target/rx/translate.c index 1829a0b1cd..26aaf7a6b5 100644 --- a/target/rx/translate.c +++ b/target/rx/translate.c @@ -131,8 +131,7 @@ static int bdsp_s(DisasContext *ctx, int d) =20 void rx_cpu_dump_state(CPUState *cs, FILE *f, int flags) { - RXCPU *cpu =3D RX_CPU(cs); - CPURXState *env =3D &cpu->env; + CPURXState *env =3D cpu_env(cs); int i; uint32_t psw; =20 --=20 2.41.0