From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279659; cv=none; d=zohomail.com; s=zohoarc; b=n6ake+b7NHWPdfsvqg32qL+WTmwIiECWW2XfkpjIPPyGbWfp5dqkNgnuzoLIW9LOwLgezFortJYmB4fJoqtrkR90r/PonCNsN8pQDZ3p3ENO4LxvAtLQCDRkU99xfLRHcri14ZtrVHw6TDi2BBR8upfA8IZ22BwNQr3J+bpjSi8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279659; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=zP/lYKNH4Nfu30L6dAxijOyJutxvSbBpVMIqdo7k2Lk=; b=nab+vAx+/Kjuk3fKXNtrNaTCrA9IkGkkkyfpga5uxqvcLqa6Bpo84H2NEuWeCg16/52dzwsMOS5xpPnY7LM3OTwoDLBdZdXAEcBx+19qJRANt8UcklRxl9/Dn3E/Gcgv9+29G8Dxh/46pRYJqFpfnWx+N6UGRVydrQGc5iXF1Ik= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279659229563.0231321656116; Fri, 26 Jan 2024 06:34:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNH9-0002BO-2I; Fri, 26 Jan 2024 09:33:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNH8-0002B5-4B for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:46 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNH6-0007rK-Bf for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:45 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-336c8ab0b20so462348f8f.1 for ; Fri, 26 Jan 2024 06:33:43 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279623; x=1706884423; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=zP/lYKNH4Nfu30L6dAxijOyJutxvSbBpVMIqdo7k2Lk=; b=MtSdYjv0YRMbg/lqAnQ0kgiyHcQG1633SNqoMzaxxNbqfbO0bRVB694tZ2GmlDB3Za JsYjgAmdpr/CoYTX/wGVei6JG4M9GxDkW/1EyT2K6POKT5+xjSh5vbRA0txDYHcW2I64 asH24uO/bCw95eG4dx2noITXt8eNDunk0HBxxw+qj6Dib5rzyLE7/0yhVfERGIMxogxI w2e8JIpdxo534AofEGYkb2GbXwMVJzDqQ85Ze5YlG9BkZKVYL10mZg93IHeGS6pOTUlF Vcso7l/+nO0suBYroeN4lu3k4+SqxHm+9IomCEf2MB1kFLa+sf11c7EnUbnMH8on2VS/ I/PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279623; x=1706884423; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zP/lYKNH4Nfu30L6dAxijOyJutxvSbBpVMIqdo7k2Lk=; b=sVzrBdrMWURDgd1ay9R7SWCiAgL5Qwl+DquFfpVCCBMERG1qbgUGk1ls4p+0nqSpMN JfPtHhvQxnhM/MVF932x3Q97ORZ5SFupVf6ZAitu9a8mnWwYNnR640ym1UdFOozkVMJA 5wF0QeoNjIJiuy2Y8JDFEWVwGwYvkVbZlMXCwMzOQclsSIOviEfQOGKOePwVO5W8OHWV o1ZSYv5CrOSyj7VlaQ60GEJE/3UaCmmxo1XVA/fTjopkfVP8GXy3s8A6xWSNqoutxqcU 7zsYpIRiRRbiJI6U3Z0/RorbewtH8bphlsmRHygn9SPne31Ot3yDBEr4xaaQAg/m2mAN +kJA== X-Gm-Message-State: AOJu0YxPmlfxw35ceFqnFqbcGl4t890PEjr8eLo/nOZoI7PoJpzMlqNH TZSNPfGZq7ztiUwdM4C1MHhzl06PKwKtgtU5kiOO5wnu45/fQD/fJfAlc2LB36W3H/Jyw5v4dkx 2 X-Google-Smtp-Source: AGHT+IFTxB9KxuSb/3KhnTp6lA0Kc+/qfeKdIS95NSRlIDuRfp5nUksU6beol6ljAHM11MONk7EpUg== X-Received: by 2002:adf:fd07:0:b0:339:431b:90f4 with SMTP id e7-20020adffd07000000b00339431b90f4mr1125247wrr.100.1706279622995; Fri, 26 Jan 2024 06:33:42 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/36] target/xtensa: fix OOB TLB entry access Date: Fri, 26 Jan 2024 14:33:06 +0000 Message-Id: <20240126143341.2101237-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279660725100003 Content-Type: text/plain; charset="utf-8" From: Max Filippov r[id]tlb[01], [iw][id]tlb opcodes use TLB way index passed in a register by the guest. The host uses 3 bits of the index for ITLB indexing and 4 bits for DTLB, but there's only 7 entries in the ITLB array and 10 in the DTLB array, so a malicious guest may trigger out-of-bound access to these arrays. Change split_tlb_entry_spec return type to bool to indicate whether TLB way passed to it is valid. Change get_tlb_entry to return NULL in case invalid TLB way is requested. Add assertion to xtensa_tlb_get_entry that requested TLB way and entry indices are valid. Add checks to the [rwi]tlb helpers that requested TLB way is valid and return 0 or do nothing when it's not. Cc: qemu-stable@nongnu.org Fixes: b67ea0cd7441 ("target-xtensa: implement memory protection options") Signed-off-by: Max Filippov Reviewed-by: Peter Maydell Message-id: 20231215120307.545381-1-jcmvbkbc@gmail.com Signed-off-by: Peter Maydell --- target/xtensa/mmu_helper.c | 47 ++++++++++++++++++++++++++++---------- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 12552a33470..2fda4e887cc 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -224,22 +224,31 @@ static void split_tlb_entry_spec_way(const CPUXtensaS= tate *env, uint32_t v, * Split TLB address into TLB way, entry index and VPN (with index). * See ISA, 4.6.5.5 - 4.6.5.8 for the TLB addressing format */ -static void split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtl= b, - uint32_t *vpn, uint32_t *wi, uint32_t *ei) +static bool split_tlb_entry_spec(CPUXtensaState *env, uint32_t v, bool dtl= b, + uint32_t *vpn, uint32_t *wi, uint32_t *ei) { if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { *wi =3D v & (dtlb ? 0xf : 0x7); - split_tlb_entry_spec_way(env, v, dtlb, vpn, *wi, ei); + if (*wi < (dtlb ? env->config->dtlb.nways : env->config->itlb.nway= s)) { + split_tlb_entry_spec_way(env, v, dtlb, vpn, *wi, ei); + return true; + } else { + return false; + } } else { *vpn =3D v & REGION_PAGE_MASK; *wi =3D 0; *ei =3D (v >> 29) & 0x7; + return true; } } =20 static xtensa_tlb_entry *xtensa_tlb_get_entry(CPUXtensaState *env, bool dt= lb, unsigned wi, unsigned ei) { + const xtensa_tlb *tlb =3D dtlb ? &env->config->dtlb : &env->config->it= lb; + + assert(wi < tlb->nways && ei < tlb->way_size[wi]); return dtlb ? env->dtlb[wi] + ei : env->itlb[wi] + ei; @@ -252,11 +261,14 @@ static xtensa_tlb_entry *get_tlb_entry(CPUXtensaState= *env, uint32_t wi; uint32_t ei; =20 - split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei); - if (pwi) { - *pwi =3D wi; + if (split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei)) { + if (pwi) { + *pwi =3D wi; + } + return xtensa_tlb_get_entry(env, dtlb, wi, ei); + } else { + return NULL; } - return xtensa_tlb_get_entry(env, dtlb, wi, ei); } =20 static void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env, @@ -482,7 +494,12 @@ uint32_t HELPER(rtlb0)(CPUXtensaState *env, uint32_t v= , uint32_t dtlb) if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { uint32_t wi; const xtensa_tlb_entry *entry =3D get_tlb_entry(env, v, dtlb, &wi); - return (entry->vaddr & get_vpn_mask(env, dtlb, wi)) | entry->asid; + + if (entry) { + return (entry->vaddr & get_vpn_mask(env, dtlb, wi)) | entry->a= sid; + } else { + return 0; + } } else { return v & REGION_PAGE_MASK; } @@ -491,7 +508,12 @@ uint32_t HELPER(rtlb0)(CPUXtensaState *env, uint32_t v= , uint32_t dtlb) uint32_t HELPER(rtlb1)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) { const xtensa_tlb_entry *entry =3D get_tlb_entry(env, v, dtlb, NULL); - return entry->paddr | entry->attr; + + if (entry) { + return entry->paddr | entry->attr; + } else { + return 0; + } } =20 void HELPER(itlb)(CPUXtensaState *env, uint32_t v, uint32_t dtlb) @@ -499,7 +521,7 @@ void HELPER(itlb)(CPUXtensaState *env, uint32_t v, uint= 32_t dtlb) if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { uint32_t wi; xtensa_tlb_entry *entry =3D get_tlb_entry(env, v, dtlb, &wi); - if (entry->variable && entry->asid) { + if (entry && entry->variable && entry->asid) { tlb_flush_page(env_cpu(env), entry->vaddr); entry->asid =3D 0; } @@ -537,8 +559,9 @@ void HELPER(wtlb)(CPUXtensaState *env, uint32_t p, uint= 32_t v, uint32_t dtlb) uint32_t vpn; uint32_t wi; uint32_t ei; - split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei); - xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p); + if (split_tlb_entry_spec(env, v, dtlb, &vpn, &wi, &ei)) { + xtensa_tlb_set_entry(env, dtlb, wi, ei, vpn, p); + } } =20 /*! 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279623; x=1706884423; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=AlL0ncqDDbK49LmHwxJsXF89nfVWU3/6tLGTdA35huY=; b=uLvhLgjo8xo021bgFZqoiHKDmsw6eGjuJ0GHe13ZGY4qTaeCjFh7KNX6zDDMBow+SR 4ra1Bsvam1M2+Dn53Ez9tirct6tSaGElRmkJ5hHhZpVC+JKT4aFCj9XY5XMGLbbjh6Cy BZ/lwaDyBIOOx7/oswqdojFfBfqW/kQQ/aTbOnICqvbsnmDzZCOxQCY5LyOVMskkL39K lLzggREGZNQFNZ0+DJO7MM7/UrzlP6XpbJfzf93G67q4GQxj9riPEH/O0JdrHdvoWwP5 PkefJgZ83uKG/LCh9RDGFawX6+MbO9Lt1NQ5BWWBop3ELnkxjegBESjbTbg88bpH4prz RRBA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279623; x=1706884423; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AlL0ncqDDbK49LmHwxJsXF89nfVWU3/6tLGTdA35huY=; b=h04f893vF0FiPN90TbhQUbr8hkMBm05Zlp0kS6PO1Qs3AkaG4oCkpBtDnbbl0MziIs OypKN8wWlUBu3yxfD2GQT/xHSe/2teKbrolgBlU3HJjRspM0PhUwYoKUbpgc3pf6Rj3j qhSrtnIoOyHIgFLTwDpEb/MzydoGQMlVFImraUoEYlYdZjpkzcH4IVslaFu6LwC36fBh /z8dxTXhtAJfC8FD0KzFy4vAN8uo7TNjnxpjWAn4DML7uXtbMOsuM5yz1xMZmQUBARWW wcmxFG0kSAEoh38oGPMQctUjcsK/CrxShY6avMQ4guRyGPVDOXv+ugUMwXoD5So7vEK1 180A== X-Gm-Message-State: AOJu0YykkkdA/0mTJMQuWFiW3AuyikGXmMI3/oHowDExn1VGO85D+EQW CxjvZoXa4p3z32i8Y8vXt+GqwD/bx1cPkZME3mn4n8JZKoWSfKmVvpZug4mwqQo3n+6mhbIGYuO T X-Google-Smtp-Source: AGHT+IGFrx9n39TrRKNsYW8V5g8lxlOcwyMbMeeB5nsHmMs/lrmLwwRAGlbRr280DRflIR2RLMBGDA== X-Received: by 2002:adf:a44e:0:b0:337:abf9:52a6 with SMTP id e14-20020adfa44e000000b00337abf952a6mr1003213wra.77.1706279623434; Fri, 26 Jan 2024 06:33:43 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/36] target/arm: Fix VNCR fault detection logic Date: Fri, 26 Jan 2024 14:33:07 +0000 Message-Id: <20240126143341.2101237-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279702581100003 Content-Type: text/plain; charset="utf-8" In arm_deliver_fault() we check for whether the fault is caused by a data abort due to an access to a FEAT_NV2 sysreg in the memory pointed to by the VNCR. Unfortunately part of the condition checks the wrong argument to the function, meaning that it would spuriously trigger, resulting in some instruction aborts being taken to the wrong EL and reported incorrectly. Use the right variable in the condition. Fixes: 674e5345275d425 ("target/arm: Report VNCR_EL2 based faults correctly= ") Reported-by: Jonathan Cameron Signed-off-by: Peter Maydell Tested-by: Jonathan Cameron Reviewed-by: Jonathan Cameron Message-id: 20240116165605.2523055-1-peter.maydell@linaro.org --- target/arm/tcg/tlb_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tcg/tlb_helper.c b/target/arm/tcg/tlb_helper.c index dd5de74ffb7..5477c7fb7dc 100644 --- a/target/arm/tcg/tlb_helper.c +++ b/target/arm/tcg/tlb_helper.c @@ -184,7 +184,7 @@ void arm_deliver_fault(ARMCPU *cpu, vaddr addr, * (and indeed syndrome does not have the EC field in it, * because we masked that out in disas_set_insn_syndrome()) */ - bool is_vncr =3D (mmu_idx !=3D MMU_INST_FETCH) && + bool is_vncr =3D (access_type !=3D MMU_INST_FETCH) && (env->exception.syndrome & ARM_EL_VNCR); =20 if (is_vncr) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279694; cv=none; d=zohomail.com; s=zohoarc; b=X9XtbpdusJ7+AVGD2AAWCb2F1nEFpP301PMvrHNMQ/mJ4y5N5yKMX3lCw5LFkndeFUBj7GqjqMlXP/5fmQBusj99tLUD/NToyRLu08HKAbCv7UmhCM6Id/4PjwouS1juqz5k6kq1y+keYTvVz5WMuyzyWXkp+9lMDP8ney6cE34= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279694; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=M6SHCWbrZ+mqpOFqOLQgsC9xtK67Vc6rtoI9yN+xnY0=; b=XPilsTCHXxdG03zERuLgCZBgYjw36BFQAp+PSYB6EtoKRV8fKRLqW98HGq0q1+FcbQOb0LaEjziCeyrsQLuUjoORz5naDv4tcvYhqU3ARDDTeJ2/ZjCFWUig/ZRmUHTP3hqxRIYePvIpnLE0ePceRdDxuohg+2WRORQi3/FM2Sk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279694462893.7683061994762; Fri, 26 Jan 2024 06:34:54 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHB-0002EM-N4; Fri, 26 Jan 2024 09:33:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNH9-0002CF-Jc for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:47 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNH7-0007rY-ET for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:47 -0500 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-337d99f9cdfso590952f8f.0 for ; Fri, 26 Jan 2024 06:33:45 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279624; x=1706884424; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=M6SHCWbrZ+mqpOFqOLQgsC9xtK67Vc6rtoI9yN+xnY0=; b=HRR83KHaiqPLmY9SCDjp0Jzs/DRAuoWS9eD/c286vUxHyB8ggw09K4diaQHzrml1sv ljdiiVk7jdt4EwsC4spiUNAl4kLmUJ+BE6j0WN/zMA31fPsgfzwKVkgVepai6rXdU56c mMQUoIIq89Mxu+jzelGiQSduzEEZ9M4o1ImoP0ozXUT8gVTkwA/bjZWJkOcO+nwl5ne1 6V739ZmC0zPhKo6Aq17BXFZww+CfpM3FBGuXZkANy1bxqMBMqGr2Wwar4zSRKZeCEOmv IfiBQtTCHPdxbEDcQ/W13luyOyUjI14A2IQR/HUkg9u6EDaFXJzjrkJL7VEXniZ17HmO zKGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279624; x=1706884424; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=M6SHCWbrZ+mqpOFqOLQgsC9xtK67Vc6rtoI9yN+xnY0=; b=TOg2+5NvHOSXcnAc4vQNtChRBFQ3Uu9rylsg89kKiI56xj4Ch3E01NW6g/43gZHD/D SBWo3D3jj4SOAP8ufH4muxAu8rJXmt+3kwvVLnBK1LaFMOAZPWVVRVWUi//Ab4Dh5XPi qdGl6pxFPFRh2EHo8a+9JYaYrYMe4YJP56spNYDBr5FX258bRUKfJJ0nBrnWKRHsea1p gI95RD6T2g+/w6ZAVwjmqg89m5V3YlhI1yJsG2AX/+xg5kRgsjOVepbIdPPLpeyHutJI u1//1MJQjxbmY19GocRpOC0bxmJDQ3XyghslpzwlY9PQb9j0eIyER7H0++0JmwfJShLJ t3Hw== X-Gm-Message-State: AOJu0Yz6rcpPZZIg6qdOEX7kAl0m8xTOGyg2Jm1PI02x2u9Kig4yKQBc igRrKJ2mqTYn9AmKko9FwMGFlE61ubXZ0O00GzO/Pr6Bu7CtwWIj2N6d5+bAoaY2D0v/hVJvEQE N X-Google-Smtp-Source: AGHT+IHBbDEW1chsp+D0uUU+vvS8XHmUcBJs51Npr1d3TYFCbGgXRI+yf2ngYth1vBO8y7Q/++7VUA== X-Received: by 2002:a5d:518e:0:b0:336:6ed3:2ead with SMTP id k14-20020a5d518e000000b003366ed32eadmr505348wrv.17.1706279623777; Fri, 26 Jan 2024 06:33:43 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/36] hw/arm/virt.c: Remove newline from error_report() string Date: Fri, 26 Jan 2024 14:33:08 +0000 Message-Id: <20240126143341.2101237-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279696520100003 error_report() strings should not include trailing newlines; remove the newline from the error we print when devices won't fit into the address space of the CPU. This commit also fixes the accidental hardcoded tabs that were in this line, since we have to touch the line anyway. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240118131649.2726375-1-peter.maydell@linaro.org --- hw/arm/virt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5cbc69dff83..ed4ed9f4142 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1771,8 +1771,8 @@ static void virt_set_memmap(VirtMachineState *vms, in= t pa_bits) /* Base address of the high IO region */ memtop =3D base =3D device_memory_base + ROUND_UP(device_memory_size, = GiB); if (memtop > BIT_ULL(pa_bits)) { - error_report("Addressing limited to %d bits, but memory exceeds it by= %llu bytes\n", - pa_bits, memtop - BIT_ULL(pa_bits)); + error_report("Addressing limited to %d bits, but memory exceeds it= by %llu bytes", + pa_bits, memtop - BIT_ULL(pa_bits)); exit(EXIT_FAILURE); } if (base < device_memory_base) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279896; cv=none; d=zohomail.com; s=zohoarc; b=in7sgI+jYDAkItIt5NS1PFIzyunoCgpxqvztEhtO75vEP8Eekp9RRaC9pJht64Tch+5JlwTnTfoj8tINFYjazAujsglmdKZy9hvVevxaVgsZWoFZTdDQkYwM+6m5Soq7X2gcMnhUdBRo3Uv7XFnmsqa51KvkmxduhFuyoeoMGoI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279896; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=FgvQRpsiH5zpwPcK6Oo54VoqD9iaIo5i9dZssiG51CE=; b=V3lF0ESpx4LCbU2lRIzlPc5DIeziKlN+w0lFzYrE6DXLAztjnxl4tEdYLSm9/9v5MQRBEnJddGDXEu/ALje3Nyyrbn4eSADviO5cNwzjvZE6lGLBAR23d+JeUmU27FUgS5m8Rhi19waA0vkiysEAzTZL9z+eKGG4bAxiKxkGj+Q= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170627989663893.91613949574901; Fri, 26 Jan 2024 06:38:16 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHG-0002IP-4O; Fri, 26 Jan 2024 09:33:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHB-0002EB-5z for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:49 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNH7-0007rd-Tq for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:48 -0500 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-337d58942c9so555691f8f.0 for ; Fri, 26 Jan 2024 06:33:45 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279624; x=1706884424; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=FgvQRpsiH5zpwPcK6Oo54VoqD9iaIo5i9dZssiG51CE=; b=SBT0neLZXMm6RIAHCneBrK+3iSFKpED/GNJ6I53FKKgvcVSNmQjbmfFzdW9YfDn1ig vVo/UYYBJrTmcl6QOO7vmYmaXipN2mKOPWnl3Sbt8Qh3yf7JxrjL+Fe1Iv9TeRiUXOZt Kw00J2HTJ/BllhdTz9DfswhEKPWQnYefSD7Yy7hRXNPBq1lEZQoYatSsMULHVYVeTzjR C3+XhNeeOSnKjd9508SAzNLXkeCK+lHVLBeM43/aZBsdb2muIv3BfZLoJHIalpxbUGQM pIfeUeUQgY8vCtYNUGAV18Ia0xxvBwHtgUZpRtyzng3Zc8OvDSjOAIbJgPa9xdE7+VDt eE0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279624; x=1706884424; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FgvQRpsiH5zpwPcK6Oo54VoqD9iaIo5i9dZssiG51CE=; b=F1muW7fU+fgXWbG1SN+yKIfJGWNbNKoYOXEnb1d/yiwvEE7Lho+U8Td1t1ecLf/5w1 RUlCQceMciPolKUPfFQ/EZ4slm+efzgOt1UgpNlOB1DTjsxF8Hlthl3Ylk3wDGuqSPVl EYgthv5z1hCd0tUTT6KD3XbRP522embUKSK50roJuvtAn9oYYvlb41zPpGrwo0kF7Clc 2BruudnlERm1O+DtV0NQRYE7RJesXTceTlR+AnJNkI9o4jOdN9/UEPsXUhayMMdQotnb Tq1r00eUry1YiRds5HcytnO39J223ROWZKMvHjUVg7Qhga6mv1dNW4x+TLMUuXRUJWro u0Ww== X-Gm-Message-State: AOJu0YzpDu64b6yszwfC/JnRtAsyfcXrd6qzPKWdMctX5ie5AqjM0ChH loIFfZXbG+lJnVTwHVVvi4D8Mqf5H7FUWwKnbGer4oCYOsmsiQ9EwiHrLk2OXKiR1Zn+2PL7sP2 5 X-Google-Smtp-Source: AGHT+IFuCtCIzduHGzT+leX+t2nOW3aINUptU1puokYYACpjBbX/lgvHiQpLqBo0DkjT9iVgWo+bwA== X-Received: by 2002:a5d:6687:0:b0:332:eaa7:56b0 with SMTP id l7-20020a5d6687000000b00332eaa756b0mr1031839wru.14.1706279624343; Fri, 26 Jan 2024 06:33:44 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/36] hw/arm/musicpal: Convert to qemu_add_kbd_event_handler() Date: Fri, 26 Jan 2024 14:33:09 +0000 Message-Id: <20240126143341.2101237-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279897055100001 Convert the musicpal key input device to use qemu_add_kbd_event_handler(). This lets us simplify it because we no longer need to track whether we're in the middle of a PS/2 multibyte key sequence. In the conversion we move the keyboard handler registration from init to realize, because devices shouldn't disturb the state of the simulation by doing things like registering input handlers until they're realized, so that device objects can be introspected safely. The behaviour where key-repeat is permitted for the arrow-keys only is intentional (added in commit 7c6ce4baedfcd0c), so we retain it, and add a comment to that effect. This is a migration compatibility break for musicpal. Signed-off-by: Peter Maydell Tested-by: Alex Benn=C3=A9e Reviewed-by: Alex Benn=C3=A9e Message-id: 20231103182750.855577-1-peter.maydell@linaro.org --- hw/arm/musicpal.c | 131 +++++++++++++++++++++------------------------- 1 file changed, 61 insertions(+), 70 deletions(-) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 3200c9f68ac..6987472871e 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1043,20 +1043,6 @@ static const TypeInfo musicpal_gpio_info =3D { }; =20 /* Keyboard codes & masks */ -#define KEY_RELEASED 0x80 -#define KEY_CODE 0x7f - -#define KEYCODE_TAB 0x0f -#define KEYCODE_ENTER 0x1c -#define KEYCODE_F 0x21 -#define KEYCODE_M 0x32 - -#define KEYCODE_EXTENDED 0xe0 -#define KEYCODE_UP 0x48 -#define KEYCODE_DOWN 0x50 -#define KEYCODE_LEFT 0x4b -#define KEYCODE_RIGHT 0x4d - #define MP_KEY_WHEEL_VOL (1 << 0) #define MP_KEY_WHEEL_VOL_INV (1 << 1) #define MP_KEY_WHEEL_NAV (1 << 2) @@ -1074,67 +1060,66 @@ struct musicpal_key_state { SysBusDevice parent_obj; /*< public >*/ =20 - uint32_t kbd_extended; uint32_t pressed_keys; qemu_irq out[8]; }; =20 -static void musicpal_key_event(void *opaque, int keycode) +static void musicpal_key_event(DeviceState *dev, QemuConsole *src, + InputEvent *evt) { - musicpal_key_state *s =3D opaque; + musicpal_key_state *s =3D MUSICPAL_KEY(dev); + InputKeyEvent *key =3D evt->u.key.data; + int qcode =3D qemu_input_key_value_to_qcode(key->key); uint32_t event =3D 0; int i; =20 - if (keycode =3D=3D KEYCODE_EXTENDED) { - s->kbd_extended =3D 1; - return; + switch (qcode) { + case Q_KEY_CODE_UP: + event =3D MP_KEY_WHEEL_NAV | MP_KEY_WHEEL_NAV_INV; + break; + + case Q_KEY_CODE_DOWN: + event =3D MP_KEY_WHEEL_NAV; + break; + + case Q_KEY_CODE_LEFT: + event =3D MP_KEY_WHEEL_VOL | MP_KEY_WHEEL_VOL_INV; + break; + + case Q_KEY_CODE_RIGHT: + event =3D MP_KEY_WHEEL_VOL; + break; + + case Q_KEY_CODE_F: + event =3D MP_KEY_BTN_FAVORITS; + break; + + case Q_KEY_CODE_TAB: + event =3D MP_KEY_BTN_VOLUME; + break; + + case Q_KEY_CODE_RET: + event =3D MP_KEY_BTN_NAVIGATION; + break; + + case Q_KEY_CODE_M: + event =3D MP_KEY_BTN_MENU; + break; } =20 - if (s->kbd_extended) { - switch (keycode & KEY_CODE) { - case KEYCODE_UP: - event =3D MP_KEY_WHEEL_NAV | MP_KEY_WHEEL_NAV_INV; - break; - - case KEYCODE_DOWN: - event =3D MP_KEY_WHEEL_NAV; - break; - - case KEYCODE_LEFT: - event =3D MP_KEY_WHEEL_VOL | MP_KEY_WHEEL_VOL_INV; - break; - - case KEYCODE_RIGHT: - event =3D MP_KEY_WHEEL_VOL; - break; - } - } else { - switch (keycode & KEY_CODE) { - case KEYCODE_F: - event =3D MP_KEY_BTN_FAVORITS; - break; - - case KEYCODE_TAB: - event =3D MP_KEY_BTN_VOLUME; - break; - - case KEYCODE_ENTER: - event =3D MP_KEY_BTN_NAVIGATION; - break; - - case KEYCODE_M: - event =3D MP_KEY_BTN_MENU; - break; - } - /* Do not repeat already pressed buttons */ - if (!(keycode & KEY_RELEASED) && (s->pressed_keys & event)) { + /* + * We allow repeated wheel-events when the arrow keys are held down, + * but do not repeat already-pressed buttons for the other key inputs. + */ + if (!(event & (MP_KEY_WHEEL_NAV | MP_KEY_WHEEL_VOL))) { + if (key->down && (s->pressed_keys & event)) { event =3D 0; } } =20 if (event) { /* Raise GPIO pin first if repeating a key */ - if (!(keycode & KEY_RELEASED) && (s->pressed_keys & event)) { + if (key->down && (s->pressed_keys & event)) { for (i =3D 0; i <=3D 7; i++) { if (event & (1 << i)) { qemu_set_irq(s->out[i], 1); @@ -1143,17 +1128,15 @@ static void musicpal_key_event(void *opaque, int ke= ycode) } for (i =3D 0; i <=3D 7; i++) { if (event & (1 << i)) { - qemu_set_irq(s->out[i], !!(keycode & KEY_RELEASED)); + qemu_set_irq(s->out[i], !key->down); } } - if (keycode & KEY_RELEASED) { - s->pressed_keys &=3D ~event; - } else { + if (key->down) { s->pressed_keys |=3D event; + } else { + s->pressed_keys &=3D ~event; } } - - s->kbd_extended =3D 0; } =20 static void musicpal_key_init(Object *obj) @@ -1162,20 +1145,27 @@ static void musicpal_key_init(Object *obj) DeviceState *dev =3D DEVICE(sbd); musicpal_key_state *s =3D MUSICPAL_KEY(dev); =20 - s->kbd_extended =3D 0; s->pressed_keys =3D 0; =20 qdev_init_gpio_out(dev, s->out, ARRAY_SIZE(s->out)); +} =20 - qemu_add_kbd_event_handler(musicpal_key_event, s); +static const QemuInputHandler musicpal_key_handler =3D { + .name =3D "musicpal_key", + .mask =3D INPUT_EVENT_MASK_KEY, + .event =3D musicpal_key_event, +}; + +static void musicpal_key_realize(DeviceState *dev, Error **errp) +{ + qemu_input_handler_register(dev, &musicpal_key_handler); } =20 static const VMStateDescription musicpal_key_vmsd =3D { .name =3D "musicpal_key", - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (const VMStateField[]) { - VMSTATE_UINT32(kbd_extended, musicpal_key_state), VMSTATE_UINT32(pressed_keys, musicpal_key_state), VMSTATE_END_OF_LIST() } @@ -1186,6 +1176,7 @@ static void musicpal_key_class_init(ObjectClass *klas= s, void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->vmsd =3D &musicpal_key_vmsd; + dc->realize =3D musicpal_key_realize; } =20 static const TypeInfo musicpal_key_info =3D { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279624; x=1706884424; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ul4GmzC0vbtgvuz9Q5o0fiW1gb75AZUpep615Cah9j8=; b=dik3LNKts1pbzovz2Jfmig3A3qg6U6X28L49TGqAr6A81o0TTfWwiH0SqD/EZsCZv4 ANksVjGsQLsQP2egxSsX5O9QNcQCKoK8LmlgXy9m8L+6y26WPIUujqIyXiBeNuSIwGMo cgpGyC6yiC/HgboV9lnnF6CObp/sWlYSD3HfGZWSruluP+6YLTirVM48PHdggYsvv13u 8Glz0FlqnLuSvY0icQdWiGtMqo2xJkPNMcRNuPNWl1fLWZ6e0rNWzXBN+mkZe7Rlg1d7 SYse1ndym0pOXtTrzMDUGbKOyr1AbbsbwTCVcin9giwoZxeeXfQ0xrVrAPKVhPSRVHOw Y9ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279624; x=1706884424; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ul4GmzC0vbtgvuz9Q5o0fiW1gb75AZUpep615Cah9j8=; b=Py39lWFc1oReNzvHNdRXUA6zE6Mgv6rsxuPH47tqK043/utPYY8YSae5W1qenTBOeJ Q4CXRJsKspgRaY2GOtwruBWDufwttOWNG117Bj9J7737WqOe1vtp1qAENC8kfznVURbK Ao8kFzO9cWPyHt8q3RDop5hpfvO8WpQlZOC099mhBoQyW7oZkxuwIEMvuXs6pjcb64AG hnuWPCef86eKzyFfyypl0iBDy6Cj7SlM2sGgSoS2+N1XYb1Tp+YrgIzKB6LeyXZP4hmO eWlQ9UrslGubJggPmg2w6CmFF+378QJLYxrr8j/loDHY64PS05dJwkLwECv/JgQVZZOK eJcQ== X-Gm-Message-State: AOJu0YzM0ETP21O2/yExfGZVrZgFwDEHm9wz9Bok9PEGl+cSkMYSXXxc cjRB8JP6Spyz3OIIH0QDIEgpPnhw6II7AhSLrJKpE55ztAjGFbjf2StFkcW6KIVOVCMNlF8OQDq a X-Google-Smtp-Source: AGHT+IHGS6q0AE2aKgPC9AuhhQ1kq31o1d5Y7N1/ZPkDDigp8xpiNzkzyJ00v8kfp/ZdMPpNsmJ1Sw== X-Received: by 2002:adf:e889:0:b0:337:c829:9838 with SMTP id d9-20020adfe889000000b00337c8299838mr744340wrm.69.1706279624730; Fri, 26 Jan 2024 06:33:44 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/36] hw/arm/allwinner-a10: Unconditionally map the USB Host controllers Date: Fri, 26 Jan 2024 14:33:10 +0000 Message-Id: <20240126143341.2101237-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279716650100004 From: Philippe Mathieu-Daud=C3=A9 The USB Controllers are part of the chipset, thus are always present and mapped in memory. This is a migration compatibility break for the cubieboard machine started with the '-usb none' option. Reported-by: Guenter Roeck Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Guenter Roeck Tested-by: Guenter Roeck Message-id: 20240119215106.45776-2-philmd@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/allwinner-a10.c | 49 +++++++++++++++++------------------------- 1 file changed, 20 insertions(+), 29 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index b0ea3f7f662..0135632996c 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -79,15 +79,10 @@ static void aw_a10_init(Object *obj) =20 object_initialize_child(obj, "i2c0", &s->i2c0, TYPE_AW_I2C); =20 - if (machine_usb(current_machine)) { - int i; - - for (i =3D 0; i < AW_A10_NUM_USB; i++) { - object_initialize_child(obj, "ehci[*]", &s->ehci[i], - TYPE_PLATFORM_EHCI); - object_initialize_child(obj, "ohci[*]", &s->ohci[i], - TYPE_SYSBUS_OHCI); - } + for (size_t i =3D 0; i < AW_A10_NUM_USB; i++) { + object_initialize_child(obj, "ehci[*]", &s->ehci[i], + TYPE_PLATFORM_EHCI); + object_initialize_child(obj, "ohci[*]", &s->ohci[i], TYPE_SYSBUS_O= HCI); } =20 object_initialize_child(obj, "mmc0", &s->mmc0, TYPE_AW_SDHOST_SUN4I); @@ -165,28 +160,24 @@ static void aw_a10_realize(DeviceState *dev, Error **= errp) qdev_get_gpio_in(dev, 1), 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN); =20 - if (machine_usb(current_machine)) { - int i; + for (size_t i =3D 0; i < AW_A10_NUM_USB; i++) { + g_autofree char *bus =3D g_strdup_printf("usb-bus.%zu", i); =20 - for (i =3D 0; i < AW_A10_NUM_USB; i++) { - g_autofree char *bus =3D g_strdup_printf("usb-bus.%d", i); + object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable", + true, &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, + AW_A10_EHCI_BASE + i * 0x8000); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, + qdev_get_gpio_in(dev, 39 + i)); =20 - object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enabl= e", - true, &error_fatal); - sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, - AW_A10_EHCI_BASE + i * 0x8000); - sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, - qdev_get_gpio_in(dev, 39 + i)); - - object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus, - &error_fatal); - sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, - AW_A10_OHCI_BASE + i * 0x8000); - sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, - qdev_get_gpio_in(dev, 64 + i)); - } + object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus, + &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, + AW_A10_OHCI_BASE + i * 0x8000); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, + qdev_get_gpio_in(dev, 64 + i)); } =20 /* SD/MMC */ --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279625; x=1706884425; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Vu5+mTBX8rW6qLHNzt1OhoCL6zzW3Ic3LDbMk8svH4c=; b=xLV76L0ZlCnlIIn2vYMAbdPAU2eF3kQEIxSVQtrT4MImawa8urMkhxLDQiZZ0X2J5J F62xto0ZJBEKeKIrjVz/FjwrgjQozSc2J6Fn2cQbcGR3pG4B5xu11GVFLVORrt2vANo9 mxu2IoMXs3QPRt02DxlYMaJkXJ/q7nnojjNSWK1xoQ7LVNYkpWs1gXVL/SjALhK9rKnR qyHGqpMZ6hfLQdvS3FDgJGI84CI1M7A68h5QhEUYPh/LdGWzRqY8pzM9nnqI4q/Y4hqE j8pIl6JTahfhewSfj2xcRc16kYRMSp/eDyTwhKzFYmOFfqE+2XYQRr2VuKWompzfZ3st nzbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279625; x=1706884425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Vu5+mTBX8rW6qLHNzt1OhoCL6zzW3Ic3LDbMk8svH4c=; b=ianeDiFhm19f06b9GlP0CEItMEpGLCS/PHSyQlG8AdnKjZ0X+s5SNMj6ux9kOCQzCB mH19R0LlOd/bt5mpT49ppdCVzStqUQ1wcYTYGWi0yx1u3oFnE5PzYE7D5sdfonfMghmt A0Q86DsNQK34ctFNX/GGa+eB62mgdzgC+3ok6vXuIAJ4YP71l/EMck1aDCNpTJuJdMSO LiYeLROSF8Zl9XHMrcaIGW0RsQ0bqWD6BFAaM7X03VBnjG4E1xpiKk5mJnZFlDuoa6zQ 4OTLbNXopEOOv/Ui2mkK8r8MPs5M2mlE37/HUm8Dl3hzWouuBGSn2sPlOxCadQLRXQ4y zlvw== X-Gm-Message-State: AOJu0YywbZJDg9h5dHhJXb7TqSgb7V8TdFGjsmtXI74AOxy/MRKlilnU jKf/vFFikQu3SME+cJPMV5+E0y4GcFCv4ADhoHl6QLVHLqhIVygTyangx6tT6/gOvBT504TltAS F X-Google-Smtp-Source: AGHT+IGSpBAopCijh62thggyhIvqVDqZbQVke8A9WRn+bhR7trijqZ1bHS7S8gHtUgnlfG/v83w62Q== X-Received: by 2002:a5d:5748:0:b0:337:b74b:6f1f with SMTP id q8-20020a5d5748000000b00337b74b6f1fmr582892wrw.22.1706279625123; Fri, 26 Jan 2024 06:33:45 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/36] hw/arm/nseries: Unconditionally map the TUSB6010 USB Host controller Date: Fri, 26 Jan 2024 14:33:11 +0000 Message-Id: <20240126143341.2101237-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279838940100003 From: Philippe Mathieu-Daud=C3=A9 The TUSB6010 USB controller is soldered on the N800 and N810 tablets, thus is always present. This is a migration compatibility break for the n800/n810 machines started with the '-usb none' option. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240119215106.45776-3-philmd@linaro.org [PMM: fixed commit message typo] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/nseries.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 35aff46b4b4..35deb74f655 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -1353,9 +1353,7 @@ static void n8x0_init(MachineState *machine, n8x0_spi_setup(s); n8x0_dss_setup(s); n8x0_cbus_setup(s); - if (machine_usb(machine)) { - n8x0_usb_setup(s); - } + n8x0_usb_setup(s); =20 if (machine->kernel_filename) { /* Or at the linux loader. */ --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279769; cv=none; d=zohomail.com; s=zohoarc; b=FUBe2EQ0smt0HmJ4TF0sGnmwjFF7m2wsxEbJtSJobBkyzqwP14SuGvwhUuXojPRtAnjzLN2bXWLa5oiEARoePsAQIEUNLR6+K32dDHr9JlQLNG78Ym9dOdYuikFAv/SWwnoHstGeKolkqEh1HLH9uFeydPHheMTdGy/AxS6txFk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279769; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=lK9uzbOPuqI5nBpCiVJSQd+IeQXNzZSi8eQru0HuK+4=; b=V1S036QBVbffyxk1e03R0wgH6U8Q6g2/0pYUsRiNfsrfZnqL/NjD3/Aj5hWqo/FEQmDEi3J9UjNES+AOMPSkSmWb2wWEI1oH/0wna1EEkI+jI2D/mYz8C/jarxPWbWbhXef/QVGkFwcx+Bp9ZhV/Pw1AyqDssJJe5KXb1s7u4Nk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279769562659.4214983923683; Fri, 26 Jan 2024 06:36:09 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHD-0002FN-Ge; Fri, 26 Jan 2024 09:33:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHB-0002EJ-Fd for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:49 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNH9-0007ry-0a for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:49 -0500 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-337cf4eabc9so530721f8f.3 for ; Fri, 26 Jan 2024 06:33:46 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279625; x=1706884425; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=lK9uzbOPuqI5nBpCiVJSQd+IeQXNzZSi8eQru0HuK+4=; b=jF+FcIz1Gz2B5y71zEJflTI8mDS4EjfYlTh+aO7bZVRABP4zVYPvqDFjjBUirNxuV4 rv/1tvMtbiivRnizApXAVP7MEeILnWeBCr3yCkPV8f9YutWq33MUompHJpqXPYoRHKWi uzjMo6ZRO83vq8uaxh5ddu5IGLvRsVNAMHx3NBgUoTqeDqCnmmga48UaAraVkbXZXshR n1ji8PECchF1fgaTdasg5QVmnUDjKZ2YKvHbzSSNf8wIDrHdBxCaf9xiSzl11mIfGYXQ B16LlVLycc0cHxAOKX2FZBCj8dbdcFu8QRekiDSz1rDzOudG3h/NCDtTno1KbCKRdzAS QhKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279625; x=1706884425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lK9uzbOPuqI5nBpCiVJSQd+IeQXNzZSi8eQru0HuK+4=; b=jwRuhg+jivqTqcB8vsO0TGAiznClcUNCp6/NHq9T467r9Uol2I/PxWBtl5rpep6abu r6eICVagW7Exu3hfPmVZyYV5+hYOGhB0gTFVGGwHVxmG0t1TI/5TSbyqCn4uI3AIwP3J nHo6AKfDkMgbxYFi/lswzU28FZo44bPdndlGJAc8UxDvOQJxda0mzXKg/iYGbti4LW1b qYiaDq7NcNq2VtxdCSG0dU8NMw3yXEjbf7Iz/UJ19s/9pS58g44fGt8TLyjQ9fiP3IfJ I1MovbrJ7L/De4ib/EkUevZ/3KSo5wymNPp4x6G8JSik7IEEhtpPqSKAXfAVn1eNwljU Xi2A== X-Gm-Message-State: AOJu0YyEyu4d2u3baZTdsgJeopDJbjKjwWqY8MTSgQ0j3iH3guPip3zE CefZlBFL/tsYPkmUhiC3io0nQCGvQBSI43jOrRjq7rTCj3QZunjveut78TbqJ8K8GtWAFs72e0a j X-Google-Smtp-Source: AGHT+IF3Xn0cb19Vjmk7Hd/V45B+ezYyoq3EPMw7NWB73nbST3ClyfyzUdBdo8SJF4B2yCKt/nlyqQ== X-Received: by 2002:adf:a44e:0:b0:336:e161:8d with SMTP id e14-20020adfa44e000000b00336e161008dmr1000199wra.78.1706279625575; Fri, 26 Jan 2024 06:33:45 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/36] hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board Date: Fri, 26 Jan 2024 14:33:12 +0000 Message-Id: <20240126143341.2101237-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, WEIRD_QUOTING=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279770883100007 From: Guenter Roeck Allwinner R40 supports two USB host ports shared between a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. Add support for both of them. If machine USB support is not enabled, create unimplemented devices for the USB memory ranges to avoid crashes when booting Linux. Signed-off-by: Guenter Roeck Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240115182757.1095012-2-linux@roeck-us.net Signed-off-by: Peter Maydell --- docs/system/arm/bananapi_m2u.rst | 2 +- include/hw/arm/allwinner-r40.h | 9 ++++++ hw/arm/allwinner-r40.c | 47 ++++++++++++++++++++++++++++++-- hw/arm/Kconfig | 2 ++ 4 files changed, 57 insertions(+), 3 deletions(-) diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2= u.rst index b09ba5c5486..e77c425e2cb 100644 --- a/docs/system/arm/bananapi_m2u.rst +++ b/docs/system/arm/bananapi_m2u.rst @@ -23,6 +23,7 @@ The Banana Pi M2U machine supports the following devices: * GMAC ethernet * Clock Control Unit * TWI (I2C) + * USB 2.0 =20 Limitations """"""""""" @@ -33,7 +34,6 @@ Currently, Banana Pi M2U does *not* support the following= features: - Audio output - Hardware Watchdog - Real Time Clock -- USB 2.0 interfaces =20 Also see the 'unimplemented' array in the Allwinner R40 SoC module for a complete list of unimplemented I/O devices: ``./hw/arm/allwinner-r40= .c`` diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index 6e1ac9d4c13..ae82822d424 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -30,6 +30,8 @@ #include "hw/i2c/allwinner-i2c.h" #include "hw/net/allwinner_emac.h" #include "hw/net/allwinner-sun8i-emac.h" +#include "hw/usb/hcd-ohci.h" +#include "hw/usb/hcd-ehci.h" #include "target/arm/cpu.h" #include "sysemu/block-backend.h" =20 @@ -44,6 +46,10 @@ enum { AW_R40_DEV_MMC1, AW_R40_DEV_MMC2, AW_R40_DEV_MMC3, + AW_R40_DEV_EHCI1, + AW_R40_DEV_OHCI1, + AW_R40_DEV_EHCI2, + AW_R40_DEV_OHCI2, AW_R40_DEV_CCU, AW_R40_DEV_PIT, AW_R40_DEV_UART0, @@ -88,6 +94,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40) * which are currently emulated by the R40 SoC code. */ #define AW_R40_NUM_MMCS 4 +#define AW_R40_NUM_USB 2 #define AW_R40_NUM_UARTS 8 =20 struct AwR40State { @@ -106,6 +113,8 @@ struct AwR40State { AwSRAMCState sramc; AwA10PITState timer; AwSdHostState mmc[AW_R40_NUM_MMCS]; + EHCISysBusState ehci[AW_R40_NUM_USB]; + OHCISysBusState ohci[AW_R40_NUM_USB]; AwR40ClockCtlState ccu; AwR40DramCtlState dramc; AWI2CState i2c0; diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index a0d367c60d1..2e8943eff74 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -23,6 +23,7 @@ #include "qemu/bswap.h" #include "qemu/module.h" #include "qemu/units.h" +#include "hw/boards.h" #include "hw/qdev-core.h" #include "hw/sysbus.h" #include "hw/char/serial.h" @@ -45,6 +46,10 @@ const hwaddr allwinner_r40_memmap[] =3D { [AW_R40_DEV_MMC1] =3D 0x01c10000, [AW_R40_DEV_MMC2] =3D 0x01c11000, [AW_R40_DEV_MMC3] =3D 0x01c12000, + [AW_R40_DEV_EHCI1] =3D 0x01c19000, + [AW_R40_DEV_OHCI1] =3D 0x01c19400, + [AW_R40_DEV_EHCI2] =3D 0x01c1c000, + [AW_R40_DEV_OHCI2] =3D 0x01c1c400, [AW_R40_DEV_CCU] =3D 0x01c20000, [AW_R40_DEV_PIT] =3D 0x01c20c00, [AW_R40_DEV_UART0] =3D 0x01c28000, @@ -89,9 +94,9 @@ static struct AwR40Unimplemented r40_unimplemented[] =3D { { "crypto", 0x01c15000, 4 * KiB }, { "spi2", 0x01c17000, 4 * KiB }, { "sata", 0x01c18000, 4 * KiB }, - { "usb1-host", 0x01c19000, 4 * KiB }, + { "usb1-phy", 0x01c19800, 2 * KiB }, { "sid", 0x01c1b000, 4 * KiB }, - { "usb2-host", 0x01c1c000, 4 * KiB }, + { "usb2-phy", 0x01c1c800, 2 * KiB }, { "cs1", 0x01c1d000, 4 * KiB }, { "spi3", 0x01c1f000, 4 * KiB }, { "rtc", 0x01c20400, 1 * KiB }, @@ -181,6 +186,10 @@ enum { AW_R40_GIC_SPI_MMC2 =3D 34, AW_R40_GIC_SPI_MMC3 =3D 35, AW_R40_GIC_SPI_EMAC =3D 55, + AW_R40_GIC_SPI_OHCI1 =3D 64, + AW_R40_GIC_SPI_OHCI2 =3D 65, + AW_R40_GIC_SPI_EHCI1 =3D 76, + AW_R40_GIC_SPI_EHCI2 =3D 78, AW_R40_GIC_SPI_GMAC =3D 85, }; =20 @@ -276,6 +285,13 @@ static void allwinner_r40_init(Object *obj) TYPE_AW_SDHOST_SUN50I_A64); } =20 + for (size_t i =3D 0; i < AW_R40_NUM_USB; i++) { + object_initialize_child(obj, "ehci[*]", &s->ehci[i], + TYPE_PLATFORM_EHCI); + object_initialize_child(obj, "ohci[*]", &s->ohci[i], + TYPE_SYSBUS_OHCI); + } + object_initialize_child(obj, "twi0", &s->i2c0, TYPE_AW_I2C_SUN6I); =20 object_initialize_child(obj, "emac", &s->emac, TYPE_AW_EMAC); @@ -407,6 +423,33 @@ static void allwinner_r40_realize(DeviceState *dev, Er= ror **errp) sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_R40_DEV_CCU]); =20 + /* USB */ + for (size_t i =3D 0; i < AW_R40_NUM_USB; i++) { + g_autofree char *bus =3D g_strdup_printf("usb-bus.%zu", i); + + object_property_set_bool(OBJECT(&s->ehci[i]), "companion-enable", = true, + &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, + allwinner_r40_memmap[i ? AW_R40_DEV_EHCI2 + : AW_R40_DEV_EHCI1]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, + qdev_get_gpio_in(DEVICE(&s->gic), + i ? AW_R40_GIC_SPI_EHCI2 + : AW_R40_GIC_SPI_EHCI1)); + + object_property_set_str(OBJECT(&s->ohci[i]), "masterbus", bus, + &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(&s->ohci[i]), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, + allwinner_r40_memmap[i ? AW_R40_DEV_OHCI2 + : AW_R40_DEV_OHCI1]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, + qdev_get_gpio_in(DEVICE(&s->gic), + i ? AW_R40_GIC_SPI_OHCI2 + : AW_R40_GIC_SPI_OHCI1)); + } + /* SD/MMC */ for (int i =3D 0; i < AW_R40_NUM_MMCS; i++) { qemu_irq irq =3D qdev_get_gpio_in(DEVICE(&s->gic), diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 218b454e97f..4a2a5fca974 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -415,6 +415,8 @@ config ALLWINNER_R40 select ARM_TIMER select ARM_GIC select UNIMP + select USB_OHCI + select USB_EHCI_SYSBUS select SD =20 config RASPI --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279737; cv=none; d=zohomail.com; s=zohoarc; b=ZjleC0s9ji/CWMXhhdy0hgXeaXqBpXkYkTXZ0BBAKkmioui3xHeUqnkKWaylazU6m/MJ5gWO28sIa1bJRZcEj0UlmVii/f1iZCZSRAOuviOvCgYyScxWi/LLpORkOqQfhwRmPm41ldcD7xJHNLMUrl8ptvl14G3LToLFbFEQbY8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279737; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=HEc7i4Xgpnf10j5Y5ryc8bAt0O15wFZx7gUBthUTBOc=; b=Zs1hBmY54cuzqZDSB580jTPCiW5O7/owixJHb/zFDuEFfsDYRk7eprKYHmvcl2TJbP9/XTMC2mU3cs2WSRPozy5or3WPRTCVT9qSn+JjgWlw1bXxdxA68G1169c2b2ZFzz0hfQ30uVKFLErRiN40/vPMwg0za4eTcfL/DnD2P4Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 170627973741641.41846848450018; Fri, 26 Jan 2024 06:35:37 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHH-0002Kq-Tr; Fri, 26 Jan 2024 09:33:55 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHB-0002EK-Ic for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:49 -0500 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNH9-0007s9-EQ for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:49 -0500 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-33adec41b55so143127f8f.0 for ; Fri, 26 Jan 2024 06:33:46 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279626; x=1706884426; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=HEc7i4Xgpnf10j5Y5ryc8bAt0O15wFZx7gUBthUTBOc=; b=LXA1JhHa3XiDCcf2Ag33XakAXiFH3/5L77zXh9XF6B9y2TnfvLKruwOo7PbAxy4+cS DOSS7/WvIG8AVnHPZkkeDlOQd7o4+AclbjTvEmz+cR1SJ01V0LtOJK1o8b/1yiS3uS86 G4ncAFKWxj/InLsZf6JwCl3HGXLgtmcxK351Xp+6ERknTOfDxQE7U5Lx/BpyuRw5BWRV j3Gi637W0KL/aOKLkEZapokxHaru5TXRjuL5Tom35S3H3eUXUvG3QNnQBZjoWfDDYRJf 6JbtvATgGVUbOt8PCw6T9EAEwtB4bd40GzBWcq7X66k2DZKHdp3kR/px1gYo2p4a1ftU xEJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279626; x=1706884426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HEc7i4Xgpnf10j5Y5ryc8bAt0O15wFZx7gUBthUTBOc=; b=T9jwgG1RKoi+kq+svpELbW3VNVDTx4BetfCMeOwmwHjZMwWYFedhjE6P4bHBGyKKT/ W7WmIJVjI5o5NyowGFKW9WX5Dmmn4nl/8DRZ9QoIFsKws9qS2F9SidB2PEzqcPNv7QA/ cbiECSnJWzYW25FHvzUvNb7FDoGBlbjOYgUdNQm1eAsqivt7pjwjA7EHMdhPCSPJ0o4U fiMhWHPq7xSZxTjhZUyIl+OXD8YREu9uCbc7EnAeAOTVj7ZrJ5kZgZWmBzzf2dCLFa5d GVD902/jERynqPWrt7u+Q6xiEHe5T1hw1Dug1SVclTwbNoHbPO74JeKnTrxcCoSYwCOb Gcxg== X-Gm-Message-State: AOJu0YyLGdD5PFMfjcNRIUAJMJgK7AIOgLUFxdFoRAMXng19Xy6ZGQ+i DuNvqisTkhtVZrxxavbndtActctTKVfI38VL1Ueo8GVJnnfq4YQ5lIvTyCes0HkHc2YDgUX+qEq M X-Google-Smtp-Source: AGHT+IEBJsVcIccN1l8L3fD3K33Rqts/LmE+VB4VNCA563ESrfAyEp/c3IMlV7XWuGRjZdhk6LG3MQ== X-Received: by 2002:adf:ca8d:0:b0:337:aa92:7835 with SMTP id r13-20020adfca8d000000b00337aa927835mr701798wrh.43.1706279626005; Fri, 26 Jan 2024 06:33:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/36] hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board Date: Fri, 26 Jan 2024 14:33:13 +0000 Message-Id: <20240126143341.2101237-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279738735100003 From: Guenter Roeck Allwinner R40 supports an AHCI compliant SATA controller. Add support for it. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Guenter Roeck Message-id: 20240115182757.1095012-3-linux@roeck-us.net Signed-off-by: Peter Maydell --- docs/system/arm/bananapi_m2u.rst | 1 + include/hw/arm/allwinner-r40.h | 3 +++ hw/arm/allwinner-r40.c | 12 +++++++++++- hw/arm/Kconfig | 1 + 4 files changed, 16 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2= u.rst index e77c425e2cb..542310591d6 100644 --- a/docs/system/arm/bananapi_m2u.rst +++ b/docs/system/arm/bananapi_m2u.rst @@ -22,6 +22,7 @@ The Banana Pi M2U machine supports the following devices: * EMAC ethernet * GMAC ethernet * Clock Control Unit + * SATA * TWI (I2C) * USB 2.0 =20 diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index ae82822d424..c589fcc1c15 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -22,6 +22,7 @@ =20 #include "qom/object.h" #include "hw/timer/allwinner-a10-pit.h" +#include "hw/ide/ahci.h" #include "hw/intc/arm_gic.h" #include "hw/sd/allwinner-sdhost.h" #include "hw/misc/allwinner-r40-ccu.h" @@ -46,6 +47,7 @@ enum { AW_R40_DEV_MMC1, AW_R40_DEV_MMC2, AW_R40_DEV_MMC3, + AW_R40_DEV_AHCI, AW_R40_DEV_EHCI1, AW_R40_DEV_OHCI1, AW_R40_DEV_EHCI2, @@ -112,6 +114,7 @@ struct AwR40State { const hwaddr *memmap; AwSRAMCState sramc; AwA10PITState timer; + AllwinnerAHCIState sata; AwSdHostState mmc[AW_R40_NUM_MMCS]; EHCISysBusState ehci[AW_R40_NUM_USB]; OHCISysBusState ohci[AW_R40_NUM_USB]; diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index 2e8943eff74..534be4a735d 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -46,6 +46,7 @@ const hwaddr allwinner_r40_memmap[] =3D { [AW_R40_DEV_MMC1] =3D 0x01c10000, [AW_R40_DEV_MMC2] =3D 0x01c11000, [AW_R40_DEV_MMC3] =3D 0x01c12000, + [AW_R40_DEV_AHCI] =3D 0x01c18000, [AW_R40_DEV_EHCI1] =3D 0x01c19000, [AW_R40_DEV_OHCI1] =3D 0x01c19400, [AW_R40_DEV_EHCI2] =3D 0x01c1c000, @@ -93,7 +94,6 @@ static struct AwR40Unimplemented r40_unimplemented[] =3D { { "usb0-host", 0x01c14000, 4 * KiB }, { "crypto", 0x01c15000, 4 * KiB }, { "spi2", 0x01c17000, 4 * KiB }, - { "sata", 0x01c18000, 4 * KiB }, { "usb1-phy", 0x01c19800, 2 * KiB }, { "sid", 0x01c1b000, 4 * KiB }, { "usb2-phy", 0x01c1c800, 2 * KiB }, @@ -186,6 +186,7 @@ enum { AW_R40_GIC_SPI_MMC2 =3D 34, AW_R40_GIC_SPI_MMC3 =3D 35, AW_R40_GIC_SPI_EMAC =3D 55, + AW_R40_GIC_SPI_AHCI =3D 56, AW_R40_GIC_SPI_OHCI1 =3D 64, AW_R40_GIC_SPI_OHCI2 =3D 65, AW_R40_GIC_SPI_EHCI1 =3D 76, @@ -285,6 +286,8 @@ static void allwinner_r40_init(Object *obj) TYPE_AW_SDHOST_SUN50I_A64); } =20 + object_initialize_child(obj, "sata", &s->sata, TYPE_ALLWINNER_AHCI); + for (size_t i =3D 0; i < AW_R40_NUM_USB; i++) { object_initialize_child(obj, "ehci[*]", &s->ehci[i], TYPE_PLATFORM_EHCI); @@ -423,6 +426,13 @@ static void allwinner_r40_realize(DeviceState *dev, Er= ror **errp) sysbus_realize(SYS_BUS_DEVICE(&s->ccu), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_R40_DEV_CCU]); =20 + /* SATA / AHCI */ + sysbus_realize(SYS_BUS_DEVICE(&s->sata), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, + allwinner_r40_memmap[AW_R40_DEV_AHCI]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, + qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_AH= CI)); + /* USB */ for (size_t i =3D 0; i < AW_R40_NUM_USB; i++) { g_autofree char *bus =3D g_strdup_printf("usb-bus.%zu", i); diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 4a2a5fca974..704517edd4f 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -408,6 +408,7 @@ config ALLWINNER_H3 config ALLWINNER_R40 bool default y if TCG && ARM + select AHCI select ALLWINNER_SRAMC select ALLWINNER_A10_PIT select AXP2XX_PMU --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279626; x=1706884426; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=Udpnn055t0nLxzR8Pti1GosKKa+Y1FeGstBsF+O1OxU=; b=ydvtwDbDaaCGkIjSQwpDYN2+5T9grVPZB0PoTH7XxMaMEVdsAqQuTFE5aV70X94kb1 dcsJfWjyqE7fPchVAVHEYL4It6MvGT0ASNuP4y5tcCrheUdDYI5zzEYHawQVZ2AjBbom bA8SDDu7WD4fusfUPA130Aa0m9ZsGJQalT01U96K4qfm45doblR1WFDv16ElDqIOn0Z2 8kf9gsl2gzXE2XU+KBwhbNZYYhK9Mg9/o4Zp0QM2NiDVBQjvIZzzCnfineK3vqX2zEk7 hf5eoVuDTDvGrrE18Tqbl9Au26QBxfPvXFFlJWDW9JZErKlxZmW3v33jqD5DmZaj05Jo 2nPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279626; x=1706884426; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Udpnn055t0nLxzR8Pti1GosKKa+Y1FeGstBsF+O1OxU=; b=fMhPkDo3tiYZisUnrOUBtzQGiD+Hfg6Oig9HCp4QJ+esvI5JkXaQNYwN5D4zY1nPis sSs3DdJAmX5LdILA3cMm5OzQssk/uCYy6JgH0Zy+qyoMbLYT7swrqIbrlntGKO8XJz96 Nv42AqJaEI32ehUCDKCL/oxdevnR1OEbAw+Y5fPOz+Lnu+EBE/pkmsf2p1b+6xshIw6v ws8UJxlqimvSzuZsFmmp6Jihidz9e4x5bIanbqxgoDsguO/7+5vw2mKCXWZFIfa2yeIa CpW8d9I86Jsr0v2PhTUc9BO5zTkxo5Fhb2EwzFGSkE3FlAiFQQojJhkygDgQzPOjd4vm XARQ== X-Gm-Message-State: AOJu0YxgJoYx/q6eAvth5ec79zJ6thJEA3SQgIClsQBFVEOc69m+/YtV HTrA6U2nM2rY6nJTufluGKjGbCxvH4d/uQwd0hj3HJjpAiFXD96syrkY9pH6fEAykPBad0N68/O R X-Google-Smtp-Source: AGHT+IHd8H7A+VKO0VcP2llvADpxZw7CkJSdtwA8kyZ0GyZSwSc2uNnHeMfInQY6i1KFQlYwTzFb7g== X-Received: by 2002:a5d:5302:0:b0:339:3edd:1435 with SMTP id e2-20020a5d5302000000b003393edd1435mr1085643wrv.56.1706279626461; Fri, 26 Jan 2024 06:33:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/36] hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board Date: Fri, 26 Jan 2024 14:33:14 +0000 Message-Id: <20240126143341.2101237-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01, WEIRD_QUOTING=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279925115100001 Content-Type: text/plain; charset="utf-8" From: Guenter Roeck Add watchdog timer support to Allwinner-H40 and Bananapi. The watchdog timer is added as an overlay to the Timer module memory map. Signed-off-by: Guenter Roeck Reviewed-by: Strahinja Jankovic Message-id: 20240115182757.1095012-4-linux@roeck-us.net Signed-off-by: Peter Maydell --- docs/system/arm/bananapi_m2u.rst | 2 +- include/hw/arm/allwinner-r40.h | 3 +++ hw/arm/allwinner-r40.c | 8 ++++++++ hw/arm/Kconfig | 1 + 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/bananapi_m2u.rst b/docs/system/arm/bananapi_m2= u.rst index 542310591d6..587b4886553 100644 --- a/docs/system/arm/bananapi_m2u.rst +++ b/docs/system/arm/bananapi_m2u.rst @@ -25,6 +25,7 @@ The Banana Pi M2U machine supports the following devices: * SATA * TWI (I2C) * USB 2.0 + * Hardware Watchdog =20 Limitations """"""""""" @@ -33,7 +34,6 @@ Currently, Banana Pi M2U does *not* support the following= features: =20 - Graphical output via HDMI, GPU and/or the Display Engine - Audio output -- Hardware Watchdog - Real Time Clock =20 Also see the 'unimplemented' array in the Allwinner R40 SoC module diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index c589fcc1c15..66c38e7d907 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -33,6 +33,7 @@ #include "hw/net/allwinner-sun8i-emac.h" #include "hw/usb/hcd-ohci.h" #include "hw/usb/hcd-ehci.h" +#include "hw/watchdog/allwinner-wdt.h" #include "target/arm/cpu.h" #include "sysemu/block-backend.h" =20 @@ -54,6 +55,7 @@ enum { AW_R40_DEV_OHCI2, AW_R40_DEV_CCU, AW_R40_DEV_PIT, + AW_R40_DEV_WDT, AW_R40_DEV_UART0, AW_R40_DEV_UART1, AW_R40_DEV_UART2, @@ -114,6 +116,7 @@ struct AwR40State { const hwaddr *memmap; AwSRAMCState sramc; AwA10PITState timer; + AwWdtState wdt; AllwinnerAHCIState sata; AwSdHostState mmc[AW_R40_NUM_MMCS]; EHCISysBusState ehci[AW_R40_NUM_USB]; diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index 534be4a735d..a28e5b3886a 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -53,6 +53,7 @@ const hwaddr allwinner_r40_memmap[] =3D { [AW_R40_DEV_OHCI2] =3D 0x01c1c400, [AW_R40_DEV_CCU] =3D 0x01c20000, [AW_R40_DEV_PIT] =3D 0x01c20c00, + [AW_R40_DEV_WDT] =3D 0x01c20c90, [AW_R40_DEV_UART0] =3D 0x01c28000, [AW_R40_DEV_UART1] =3D 0x01c28400, [AW_R40_DEV_UART2] =3D 0x01c28800, @@ -279,6 +280,8 @@ static void allwinner_r40_init(Object *obj) object_property_add_alias(obj, "clk1-freq", OBJECT(&s->timer), "clk1-freq"); =20 + object_initialize_child(obj, "wdt", &s->wdt, TYPE_AW_WDT_SUN4I); + object_initialize_child(obj, "ccu", &s->ccu, TYPE_AW_R40_CCU); =20 for (int i =3D 0; i < AW_R40_NUM_MMCS; i++) { @@ -545,6 +548,11 @@ static void allwinner_r40_realize(DeviceState *dev, Er= ror **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->emac), 0, qdev_get_gpio_in(DEVICE(&s->gic), AW_R40_GIC_SPI_EM= AC)); =20 + /* WDT */ + sysbus_realize(SYS_BUS_DEVICE(&s->wdt), &error_fatal); + sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->wdt), 0, + allwinner_r40_memmap[AW_R40_DEV_WDT], 1); + /* Unimplemented devices */ for (unsigned i =3D 0; i < ARRAY_SIZE(r40_unimplemented); i++) { create_unimplemented_device(r40_unimplemented[i].device_name, diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 704517edd4f..2bc3ea3425e 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -411,6 +411,7 @@ config ALLWINNER_R40 select AHCI select ALLWINNER_SRAMC select ALLWINNER_A10_PIT + select ALLWINNER_WDT select AXP2XX_PMU select SERIAL select ARM_TIMER --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279949; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279627; x=1706884427; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=r1v3SV+PmV/A+0Uc2aWf5zTz7bzHoDfhI5pt+5wcTmM=; b=WBsp2ne/XAZmbJe2EkVtcfUmVsj12Y4MIXCxvq4hhGxdIcSGaaWCdRSWQ8rRNHA12h GI3HkvNegIqmbCAdmzeEx09y7VUaTwVU0YYC8kenKjWoFLgv0XPMg1j6RwnQhE56cOj1 uE4VyHBbyqsoJ+KGxZCiE8UzwIBIAqK3u97n3lQupokx4QirXOdQTFEBWDDco7EdeuNZ /zwIcoVo0jBnkKTXj8tKP//MwYNwaBM6EMJZZIuOhF9J5BLLk9G30/cPkTpxICFDe5I6 uxdcyaHM5H5ek0z+AJ0usGwHrB2wOZZ6550hMLbrJcxz3gokXoDfKAscoPByJDLWFZ/0 cpaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279627; x=1706884427; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r1v3SV+PmV/A+0Uc2aWf5zTz7bzHoDfhI5pt+5wcTmM=; b=tLiAS5etpJhzFMEUgiNqxYHoavrBFTtGD2uNLxCQVyI2dSyPslO2bF3boFYzZv9ogB edmcGOUZZpoU12MWwLwa6D8qiql6zEtjFh4S91NgSUN/jZHzoYg65agjlL7FX9poJg4W ZUUwQGMCkZY8RuhiQo87+f7GBmIf9rArv+4m2Fty8bOBYrsNnFYr7B5N/nPXxab0wJOq Q7PCq8sYpqh6VR9tmYXZwUWqsoJ24gQigsdH/zGgxCmLWcuD2257J6DOobF62xN6Sdya Jje/V0MpD1P6EV3tdFNihKXEuu1A+9aV9HIItYxFOkkwGpK2L4kB07cd9+YEhVhxXaK5 BVtw== X-Gm-Message-State: AOJu0YwtiehlJVnKPPJvzqzNYCdYhO/RPz+o3EHO07eXcByQFGPG5ep6 LAZGqhw9B7XzDexK7YzkwHP+Ch3yZLSeUx/cGRWDkl7/WET+yj58abNt3fSWMLKSIgKvhXFUT1Q t X-Google-Smtp-Source: AGHT+IEcVNWisvqiZkQAoOFo2inzXfWoHFnIZMvkcTfVpgDghVxXOdzgJ9TEpTNjrXtPThhclCwvjA== X-Received: by 2002:a05:600c:510e:b0:40e:8613:84f with SMTP id o14-20020a05600c510e00b0040e8613084fmr574058wms.6.1706279626835; Fri, 26 Jan 2024 06:33:46 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/36] hw/arm/exynos4210: Include missing 'exec/tswap.h' header Date: Fri, 26 Jan 2024 14:33:15 +0000 Message-Id: <20240126143341.2101237-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279951295100003 From: Philippe Mathieu-Daud=C3=A9 hw/arm/exynos4210.c calls tswap32() which is declared in "exec/tswap.h". Include it in order to avoid when refactoring unrelated headers: hw/arm/exynos4210.c:499:22: error: call to undeclared function 'tswap32'; ISO C99 and later do not support implicit function declarations [-Wimplic= it-function-declaration] smpboot[n] =3D tswap32(smpboot[n]); ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-2-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/exynos4210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index de39fb0ece8..af511a153dd 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -23,6 +23,7 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" +#include "exec/tswap.h" #include "cpu.h" #include "hw/cpu/a9mpcore.h" #include "hw/irq.h" --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279697; cv=none; d=zohomail.com; s=zohoarc; b=IY9V9XzfXAC5JMi+SVErbE9eY+vgzV7FtWsZZB0WPfSldnld4V5LywEgwCL4czLUmw7v2Y3PJPWA+0YbxpXQUEVxTqXLyUNRLPWJ5OPIbhxP4rB/Eq53H1U+AYHX3HBzPnqM8I08ypPqS/6P37TxVF1ZF66DC5r/GCBL0kvZWh0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279697; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=PQlpwttdu93pWOUx8f8ZpRO+tP7SjE8rg5GEXBoZTSo=; b=FgOJaSqF2S2L6AUckKAxiBOmT+uboeZavj29OkwUOCTdwlttuHgTigDkEvmEbqMx2o9/4bSAlOzEl64qwVJ7WKsZ9uxfafS3fVQGjw1Z6UlzBB0V6tOaB7khsMBBZAOvuoaSjTe0JPFo8XEo3GHvaSkyr2kIZzq+QyIpDzNE8sw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279697131323.6667663251718; Fri, 26 Jan 2024 06:34:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHF-0002HQ-4a; Fri, 26 Jan 2024 09:33:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHC-0002Eu-Ga for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:50 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHA-0007sf-FY for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:50 -0500 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-33922d2cb92so650785f8f.1 for ; Fri, 26 Jan 2024 06:33:48 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279627; x=1706884427; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=PQlpwttdu93pWOUx8f8ZpRO+tP7SjE8rg5GEXBoZTSo=; b=seGSi7NnkrNRe7w71GD2OVmjB1BCv5HjLtsVd6FS85WtfafRWb01v+7W7HVgf3kgRj sOGHF7N+UiZ+jfl+mikfAib7i0FxzqP2xkBfAviMAf3HV3jbMp0m2upeTH71k5N54qkf Vg7SJBnPTsKrJRlPFWzGglqtgyvYmlmgwNp73w6ZhxDX4pRPyHL6yGGlTQGUUsnHWuMv XHwoO4LWsuKJJQw5r5Fh+2o7Ih/l3DQS7w2R9lWgxPBdbUU9pEDmU4C6VPKk/WjEJAJ8 Yz75fCQ+QYQhqoEOAovg8zB6CsKii1FP9zA7yNcju6jK6QRZcHIXqhyJWUMlrcBSuiJ5 KyLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279627; x=1706884427; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PQlpwttdu93pWOUx8f8ZpRO+tP7SjE8rg5GEXBoZTSo=; b=tmgaf6S93km5ZMVqcy/2BVPXjHZjVIP2MyskX69fwl3mwcgx/gF1UqqM3mUiNgcr+4 EJJoJNybep0rUkGipFyh5b6WyT+C/1lLrUM+vkIPKPJfxd2hDHqfkfAuwtCRMeEcwGfe 47BZuSaElsozRVMUQJkoxoYOzn+KJ1553d4Wimz1RfMeF0Y89ud6ywzY30lJqH9hxu0D CooChHRrFRUlLKgoGQte67/wCm45E9Fp7kX8RaHsrRjDIjlmki3xmrLiJvD76LPxZRFm BpGjLJjVsHooqWNw6Xp+phnTAHpKm6FWWq+UGk+OxRsApyOiihuvA1mV0CTwxByyDVNv sL4w== X-Gm-Message-State: AOJu0Yzt+GLzOsecWHz9ccbXFmTa5/q9nP4oIO1JOb/rn1yKbLIvPnEh ihC1UUOoOZWQFKi+Q4lGzZvlL9LaGC5UfadQW4fjbTU4ZRv1gQNJB2Jy0rGXGOVOSkUwHJvzSD+ l X-Google-Smtp-Source: AGHT+IGuBCfmCEmJaHUcfVSPNBDGHt1VP1D8fr6a+qLf7wsrg+sWOuft+daQEJYCbDZC25qzk3/o3Q== X-Received: by 2002:adf:eac9:0:b0:33a:ea1:538f with SMTP id o9-20020adfeac9000000b0033a0ea1538fmr736911wrn.121.1706279627192; Fri, 26 Jan 2024 06:33:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/36] hw/arm/xilinx_zynq: Include missing 'exec/tswap.h' header Date: Fri, 26 Jan 2024 14:33:16 +0000 Message-Id: <20240126143341.2101237-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279698600100011 From: Philippe Mathieu-Daud=C3=A9 hw/arm/xilinx_zynq.c calls tswap32() which is declared in "exec/tswap.h". Include it in order to avoid when refactoring unrelated headers: hw/arm/xilinx_zynq.c:103:31: error: call to undeclared function 'tswap32'; ISO C99 and later do not support implicit function declarations [-Wimplic= it-function-declaration] board_setup_blob[n] =3D tswap32(board_setup_blob[n]); ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-3-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/xilinx_zynq.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index dbb9793aa13..d4c817ecdc0 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -37,6 +37,7 @@ #include "hw/qdev-clock.h" #include "sysemu/reset.h" #include "qom/object.h" +#include "exec/tswap.h" =20 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE) --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279898; cv=none; d=zohomail.com; s=zohoarc; b=BGGlOuY2o0Cajsgiqne9apYMTGXMyxGnTbhR6Wd54/0jXE6QBMaGY0UQtD59HIFG3k0/DOrhXQ1Hrfwb27j+BfC6uI5H7ozw6HzH0UcfsGnCN88HLg62sjfl/iqW+5CxbaMtqE6f+uFcMAqUXoSSF+kfxdnllRNdFjuXAWHVrLk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279898; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=fI0vqBKhfwteSfpqeytU8U01fv4ToN4htezLoldNdvs=; b=bUVMOnVskMceiqDVBFMG3XUNT9kjfNCB0vcgWRUYXln8vY3ZT8U4NG0g7vqPE899fQGbpYBqMD66PMvALk5RZY2WlDFBMU/nlzirHY//szbCjWzh0RvUGk9LiJLPpFsRiKu8TSFaRRWsSbCSZvTALCT8dguXvifUpcSZ/Smbijg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279898502867.5042463332546; Fri, 26 Jan 2024 06:38:18 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHG-0002JP-QW; Fri, 26 Jan 2024 09:33:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHC-0002F3-S9 for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:50 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHA-0007sr-QI for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:50 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-337cf4ac600so482313f8f.3 for ; Fri, 26 Jan 2024 06:33:48 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279627; x=1706884427; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=fI0vqBKhfwteSfpqeytU8U01fv4ToN4htezLoldNdvs=; b=sNl3UFpT7Hf7+MNWSqplgSGAit1vVweNpPau2JOFP+e0u+Ji8qJX601wob+qPQPat+ fe5FjMU2RTAAA5F4VsPh5QjUGAVd5nqFEKH89YnJJwfBF7IlHVejuHqe2VBXQhgqnxP1 yj/gl4ajRwx19Pysv5zaFgOO/+TLL71/6A5V5K1NmoLU/UKXHdpJ/8YcDayD5+begkGk y2UzHH4VK/4CzfkQWdkICGLTf8ODJ+sjbSRl+JqA75w8dxULX0nm9aKwT8kICCBtJQu+ GyjbKJJ8RKB5s7gJsCg0nyqCQc319xd8mz3TlFneH2dGbO3E+oGsC78kP+1FE3KOQeqD g1pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279627; x=1706884427; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fI0vqBKhfwteSfpqeytU8U01fv4ToN4htezLoldNdvs=; b=lapP21BIl3CQ6BCIc8Px9IqrRcGPsbCZf3PtXYE7EWnKHQo/4zauGurEM3ReCx1RTM d0qyeyM8xBh5d9ILkZeSb/rboGu9Bjr8cvpdp+20Q1SbmNMMjTPI+22/DgksDwfenTsW m6dHtLBJiFv3OYOF4vYjjLiNcAI21SdwcXHh5ze9Ie3uXe3zF0UYV6fRigAv2MQQkuAv FJslFXDFFYb2aTheC1WZiQs/pkvdh0ABFVI2dYkcASwxLcmt4tAMAceF6kpVCtlAzlXE rQASCzrktdPfSaurpvuDukYscCCAZ5US/VfNFM/l/w1joewR3493FtwpCeueezVDYIIy wSuA== X-Gm-Message-State: AOJu0YxD5RKwi5xrcnlxsDDwOSdwCPZ/xfN9ZYpRbNf6NwNj+W6FzSp4 j06levVTNMVcH7tpYGWrog/E18xbGMSXLgzreVxo4Kl1wk9eXgENWP9xNGVk4ar1K9G+dCGWVp/ g X-Google-Smtp-Source: AGHT+IGKMXqE4/LQMu87xBGIIHTlmQBVHx0bcptNPN7l4/BMpSzyxPN81AGiXxFmJeQKcEk9O2nsmQ== X-Received: by 2002:adf:f54c:0:b0:337:bf75:1a3e with SMTP id j12-20020adff54c000000b00337bf751a3emr1124667wrp.37.1706279627552; Fri, 26 Jan 2024 06:33:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/36] hw/arm/smmuv3: Include missing 'hw/registerfields.h' header Date: Fri, 26 Jan 2024 14:33:17 +0000 Message-Id: <20240126143341.2101237-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279899103100005 From: Philippe Mathieu-Daud=C3=A9 hw/arm/smmuv3-internal.h uses the REG32() and FIELD() macros defined in "hw/registerfields.h". Include it in order to avoid when refactoring unrelated headers: In file included from ../../hw/arm/smmuv3.c:34: hw/arm/smmuv3-internal.h:36:28: error: expected identifier REG32(IDR0, 0x0) ^ hw/arm/smmuv3-internal.h:37:5: error: expected function body after functi= on declarator FIELD(IDR0, S2P, 0 , 1) ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-4-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/smmuv3-internal.h | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h index 6076025ad6a..e987bc4686b 100644 --- a/hw/arm/smmuv3-internal.h +++ b/hw/arm/smmuv3-internal.h @@ -21,6 +21,7 @@ #ifndef HW_ARM_SMMUV3_INTERNAL_H #define HW_ARM_SMMUV3_INTERNAL_H =20 +#include "hw/registerfields.h" #include "hw/arm/smmu-common.h" =20 typedef enum SMMUTranslationStatus { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279741; cv=none; d=zohomail.com; s=zohoarc; b=jea62swQty+zxTvpXvcnaa/L1W+OhsLavetk8sJS+n0ZUNfwB0kMBZVVizL4I6LJaR2obNC47y374ritNb2S5Chi4mduN8qdZxA4kdajyDzEmjJ5v3YAgRLQ6D6yRZCKd4A5+x5XuOOhlbi0btJ95VmGXwClE4BcbL1qZRWJG6g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279741; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=SayjVZreUIIZvwgWfW2preOvFMoE7PMcRfYHzIZ+5wg=; b=PMY/qNIQqXLfeSvxY0/VCGnu1gJG0d6b58T65ck/bI+YgLDYT1n1WDO4xKesxZpg12XTOV3Lf8A2g1COSOIVU8MlOt34o1xrscLu8d70EYT49b4Rp//3OQyCxq+GrC2i6mSXJ3Z4U0UjMYjqbwdrNBTFawCNK0x4tanz+s10PAE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279741014100.92647476679633; Fri, 26 Jan 2024 06:35:41 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHF-0002Hz-Eu; Fri, 26 Jan 2024 09:33:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHD-0002F8-22 for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:51 -0500 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHB-0007t7-De for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:50 -0500 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-3394dc75eadso451919f8f.2 for ; Fri, 26 Jan 2024 06:33:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279628; x=1706884428; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=SayjVZreUIIZvwgWfW2preOvFMoE7PMcRfYHzIZ+5wg=; b=AJ4+1TzMLsSYIAejsV+VIv9vMqf2ZvMb6Tz4ejpGJi29/RNJ4I67/oAMxFtx09C+eY oAYF6ODr/oDbEqnBI/6sz7q8mvGjTP9Xu40MKb3qgDpc5ECk9wEDQKNCvSRHKcRywS/6 tHEmKHLl8FwhNe7bpnsVCQ3NZu7yeN3Hb0sCx9D1mMkiNyB44oSHvNSkDYyFBuk0KoVz 4XgVH1m3U5CxHAAE1FCO8wILM022HVpacJkmd19nefPvt9vJRg42LDJyXV7yf6Q1sHXS ski9BWrNPSKymCsEqa8/f3Xk8/TJhdWITBqthv5XM8o/W60lMhCArUHwST1jtw67845w 34AA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279628; x=1706884428; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SayjVZreUIIZvwgWfW2preOvFMoE7PMcRfYHzIZ+5wg=; b=Y1ePOvkYK9VY9xyHFZfvpfVPQOPmLTqbv3fQIB1Jei50Zp7z0b4eEG6N/CeYc76AK0 BCLweqqxNW3U1QLZa2llTGDsgxFn7umLFKTM7pa2UNLMHFbal8NrxD+GwmKSZzpBSLja PiwOQDvVWOINpGDN+3cSK+IFquuRB3DxW5VbPla/4/lQtpkrF/xEc/6WHZgiOFfoAgFy 4DN+yr/xC65zbnubstK8y0sMVmTRABuzF59KDHgCViEJ8uPDUAVZvtjzBkzvCeiNhx6t NjmWITAAYXs6h+PI6mlGZnGR905O3VjZNmz6YXwHvPSB+Wzyo2okdWdEMfUIn4HAzqqo tyCA== X-Gm-Message-State: AOJu0Yy7ESb/MJLVf6/Qg/9A76Bolq9b+dyJCYect9Y5NpRSTa8wnLJl yF6LrDHFup/ly6CayE3TCcvSyXW2kBX0MHliHSxLBRLdSObeOTrn+48zWtLqH0esCZAKHVyBUAi j X-Google-Smtp-Source: AGHT+IH38csVYwjKhtQbIj15R9ZNILBM9iRhfOcaZr5ANC3f2NvcK/INsCNOYmibZDQojnTVsrawqg== X-Received: by 2002:adf:a199:0:b0:337:cab8:b7e1 with SMTP id u25-20020adfa199000000b00337cab8b7e1mr1028565wru.81.1706279627975; Fri, 26 Jan 2024 06:33:47 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/36] hw/arm/xlnx-versal: Include missing 'cpu.h' header Date: Fri, 26 Jan 2024 14:33:18 +0000 Message-Id: <20240126143341.2101237-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279742632100003 From: Philippe Mathieu-Daud=C3=A9 include/hw/arm/xlnx-versal.h uses the ARMCPU structure which is defined in the "target/arm/cpu.h" header. Include it in order to avoid when refactoring unrelated headers: In file included from hw/arm/xlnx-versal-virt.c:20: include/hw/arm/xlnx-versal.h:62:23: error: array has incomplete element t= ype 'ARMCPU' (aka 'struct ArchCPU') ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-5-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index b24fa64557f..025beb5532d 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -34,6 +34,7 @@ #include "hw/net/xlnx-versal-canfd.h" #include "hw/misc/xlnx-versal-cfu.h" #include "hw/misc/xlnx-versal-cframe-reg.h" +#include "target/arm/cpu.h" =20 #define TYPE_XLNX_VERSAL "xlnx-versal" OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279856; cv=none; d=zohomail.com; s=zohoarc; b=hoFw7C0OWot4G3ZhGcPJWyY+nZycKHgaaGfNdFD6JF8P0IpOnwXYkSIglmGzjsYP3R+koHLBQWujL0XSa1dpjyCU483a/5gi2qeypjTw0IZziTcD3Cb2MEK1V/knJu8SuAvP8+KvDR/uimYEyfR1VjEhVPafks0WlBHKDQPAud0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279856; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=qOAj+xgESAfIYVFV2UzsvAbHui7mgq2G92H1X0CLzHk=; b=X/JTGuCY7bbbhKuzIg63QW+21zzKdlBfy7d69m3sI75ADI5dRFs5/gg4tBJvLBJ+NBSkGXjHwbGo8zfVyxjp+pFfyqjpkyOT9g/g1ULZDSUSeN9xppriR+nFYOOzv9CS1ZuqKUhnBaYQsesWt2Iybska6PYZjETQrgOgJjiK1oU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279856191874.4339806468612; Fri, 26 Jan 2024 06:37:36 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHG-0002Io-DV; Fri, 26 Jan 2024 09:33:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHD-0002Fc-LX for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:51 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHB-0007tH-RG for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:51 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3392291b21bso634098f8f.1 for ; Fri, 26 Jan 2024 06:33:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279628; x=1706884428; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=qOAj+xgESAfIYVFV2UzsvAbHui7mgq2G92H1X0CLzHk=; b=zmYoonAcPr/gZka3/FyrwRsufjwC0Og5SZ2eSrTjMD+qCx21c/QI988JBvpaa6WB2n WdXcf2Rg3l0de8zkJf/QXk+SPG0/pgu0sPM1SAsCNMjmOy04ulxXd5xgt/VXC43QWp0A u8yAQpTPA+tz9u3C1sz6df1vziUh1CuyaUyrSmOHXP3+umeeTnZxvaPdUT4eKM3p20iR q8YjRXcT7Sr+wnh930esOjwaFFrf0Y/Z1Jmnq0xb2/8ZvVf9mfBYdbHMzbDVxAsk8/Cd TxwTZvsqgoDNHtrYNqsCps7m7UxuRJVhwakSIoS5HFDoU2XJIrgfEH4UinmobWxxrAkR Zv+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279628; x=1706884428; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qOAj+xgESAfIYVFV2UzsvAbHui7mgq2G92H1X0CLzHk=; b=S9rVlQfrOsl+FGiC56BgyUxeoORT8f64/9R1Cj9gM4mZA/CKVN+O97LcnNRlqvqs2i dQn2zJvuAGr446pZsl/K6VB26BpzPWQDly0KVbIPSY5+VTf1gfPZkBSki5PHCPjvoUAJ u/GpQtbq1B9jObmws4pR2GbzwtpQ7YjF/DKvE/5Z53y1mN5I3Y1TcngTmACwx52+Nf8u sNHuhspZTafUG2i38ECOpTV4GGDEZDp43S3H0OtQR74DYESXj88j/c1BCNtt1rRHrA+d R10bOpUfC191kQtXUDJEQLFiWJuJUpQfMTUJyW/0/GH1HVuiEK8sakUACSVur6jVZ37L al1g== X-Gm-Message-State: AOJu0YxP70f4I4NDpmkvOdaekn1Vg6n6RiDI3C9B9ll8fkB/iFpj7ylR wnubeQEc/Jq90w+C/MwM0IR8xyy/eRF9aqnbKIgrcP/6c6DIe52v/x6VOKMqioL9wJ1q9rkUtZA q X-Google-Smtp-Source: AGHT+IH9rm0cfiLk6G1NIGTrAjISECXOC4gRMXvJ0U4hcDOGKtJXyb2XDlITJ2n+DV5dOKSpjc/9nQ== X-Received: by 2002:adf:e9ca:0:b0:337:c4c7:d05e with SMTP id l10-20020adfe9ca000000b00337c4c7d05emr1047899wrn.46.1706279628343; Fri, 26 Jan 2024 06:33:48 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/36] target/arm/cpu-features: Include missing 'hw/registerfields.h' header Date: Fri, 26 Jan 2024 14:33:19 +0000 Message-Id: <20240126143341.2101237-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279856922100003 From: Philippe Mathieu-Daud=C3=A9 target/arm/cpu-features.h uses the FIELD_EX32() macro defined in "hw/registerfields.h". Include it in order to avoid when refactoring unrelated headers: target/arm/cpu-features.h:44:12: error: call to undeclared function 'FIEL= D_EX32'; ISO C99 and later do not support implicit function declarations [-Wimplic= it-function-declaration] return FIELD_EX32(id->id_isar0, ID_ISAR0, DIVIDE) !=3D 0; ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-6-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu-features.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index 7a590c824cf..028795ff23f 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -20,6 +20,8 @@ #ifndef TARGET_ARM_FEATURES_H #define TARGET_ARM_FEATURES_H =20 +#include "hw/registerfields.h" + /* * Naming convention for isar_feature functions: * Functions which test 32-bit ID registers should have _aa32_ in --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279953; cv=none; d=zohomail.com; s=zohoarc; b=m1cpb5MbtyGGtqfCPd1OIRg16zc4P8lZh1oYrDCoojVF68iq4uhocyyStia+kgAIrQHM0pH/UXl3c0v/aM7sFL8TsZwQEZkuTou+YV/8ypVTWeaPX4baaN24vo21L6g2YE2RoO9/wDtCDNkAqOnFmXMPrZI39Qe9wyA91+50mn0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279953; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=JzJ/7eGoWRxiuO78ttkuN8WfwtChGDxYPbjZXcNs7S0=; b=SszDzu1aTA3ibKAnMKWdCLxobKjlXxESaOzqoF9wCngdNUKv1sGYlOfdWID4l4fMojd2QipWFBtiovpEdT67WwA6oEYT3xojZjz6PBbEV6vHZYfWCEkxcHSEmWusiywuDoWUL/JI8FLLjLli2JX/0yI2c25Jo/ddxm5kEAirEgE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279953085870.5240182688683; Fri, 26 Jan 2024 06:39:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHE-0002Gm-NO; Fri, 26 Jan 2024 09:33:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHD-0002Ff-Pj for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:51 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHC-0007tU-2c for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:51 -0500 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-337d5480a6aso487966f8f.1 for ; Fri, 26 Jan 2024 06:33:49 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279628; x=1706884428; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=JzJ/7eGoWRxiuO78ttkuN8WfwtChGDxYPbjZXcNs7S0=; b=B0ACAv7fT12PNpCMol0VcOYaw+vLXgio5Ym1tZIexynC/5l4hEdfCa+NcSHU0oDilf hrKfDrwd76Pr2d0nEMarAEJFK3M0cgXrNGGuUiA6wMJCxK+FJzX1xz4fn9zVEzzUU6sT DUjV3DBgCeRNgfcMJWKk+Ycvst7xGr8ijH8xhm2OHrQ+N+oRxM3TYkBhD1ylBubj/HQ/ 3uraNNMcgiWsIC9IUcRuUzOuO78JiyS/Vb/awO+gf76b1J2k+7vv/u4G7fGpSy2Fn3V7 /9id/jQQev8jDOM/mIlUTY95npSQzRouZD9rMxuobDJqi0Q4MKUiUqsU7Ua+SB3gFOEn xMHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279628; x=1706884428; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JzJ/7eGoWRxiuO78ttkuN8WfwtChGDxYPbjZXcNs7S0=; b=GDhzP7Ez9anL/rzbZNLWwe5+u/rgpeZyzExUcyKshpWKK6T48OqcIQtyhCtAGx/xgm 5nmT8zUAPQKAZUQCvlFBK3pikrP/f5RS4u4LqPoMHiPiwq8yNoF9a+cfgEVoR0gkkp8y qlRHIz6Ke4l/XX/Q6EGJxv37IAv72WFW13sfBHExHiVrMpBA2Q6ThnNo6gsJAEyG2H6P kGYfJtXlfz+/mgm4gCMvYklCZEfQZfLVtUA2qZzB+aARkUw7VfRIpBkgYlqtCKHdPdzr XQeEa/EVN8WIdvP3AlOCj6oG+V3VfL6AVkbyJPHVryHG3TqU0KZD87fXe1ZsegFckZdx R+RA== X-Gm-Message-State: AOJu0Yw9aaImmhRAKBaeyqYD1cNw484Y7PpTfgDo1bD3tmf7Ux0T2ZdO BxgvVxsJeohxraJSfch7oR8OkUFjlbfzK1u0CqA7RlgiuCz+EBRvSyszoq+fXu4r+qN2NQE2LdU h X-Google-Smtp-Source: AGHT+IEYW/XKEx7QEZnUd75HtYetV1ZW2Zruh+zRCuGXnT2aG2ImJ6qEEdLTySM8rfpvDWu4hH9B7A== X-Received: by 2002:a5d:60c6:0:b0:33a:de66:49f7 with SMTP id x6-20020a5d60c6000000b0033ade6649f7mr226593wrt.51.1706279628740; Fri, 26 Jan 2024 06:33:48 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/36] target/arm/cpregs: Include missing 'hw/registerfields.h' header Date: Fri, 26 Jan 2024 14:33:20 +0000 Message-Id: <20240126143341.2101237-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279953291100005 From: Philippe Mathieu-Daud=C3=A9 target/arm/cpregs.h uses the FIELD() macro defined in "hw/registerfields.h". Include it in order to avoid when refactoring unrelated headers: target/arm/cpregs.h:347:30: error: expected identifier FIELD(HFGRTR_EL2, AFSR0_EL1, 0, 1) ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-7-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h index b6fdd0f3eb4..ca2d6006ceb 100644 --- a/target/arm/cpregs.h +++ b/target/arm/cpregs.h @@ -21,6 +21,8 @@ #ifndef TARGET_ARM_CPREGS_H #define TARGET_ARM_CPREGS_H =20 +#include "hw/registerfields.h" + /* * ARMCPRegInfo type field bits: */ --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279881; cv=none; d=zohomail.com; s=zohoarc; b=RLt1u9jLXUjXAGfpaXUnvkwOWwf5dIggt3Fwu67I1rk3d7NpdK1J33HUMwHXuCZfhlg1ACuSsRQKaZgZL1um9U+oxj09EjxVxOKgC7TN6FV5w8frv4BAr3WVUIDoy0hqak3bDes4JvAQVVnayDmLswp8wGtKdtWzYFVqtWcl2Is= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279881; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=ELkpfpUcCpMmE/EyjZLsfEZZ/g6NmNI21NxV4ntMPM8=; b=FkGW8N1cKX+8I86O5Y2qFOi/L3JLinJkbyn6j3t7jugLkymULsIWgWTXV72GNycLbaMGtBmFXBvTEvRrCjc+n8vlHRGAsQppula/k1I1x151B7u88KEqTCr73WpLlHS2Pn0b920L4iBiFZ3s9Ta//LUxG7qVDQi7P7zGaie5PSw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279881912239.37269804469486; Fri, 26 Jan 2024 06:38:01 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHG-0002IQ-5U; Fri, 26 Jan 2024 09:33:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHE-0002HG-Vu for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:52 -0500 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHC-0007ub-Hx for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:52 -0500 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-40e60e135a7so5022765e9.0 for ; Fri, 26 Jan 2024 06:33:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279629; x=1706884429; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=ELkpfpUcCpMmE/EyjZLsfEZZ/g6NmNI21NxV4ntMPM8=; b=dsn1n0rjLl0ZSjjm6e02XTjlBQHZvC2lYqnOwtdflfldMS3IhFuCAo7q+G7O0Hrz5/ Mxi2inFrNUDAc6rjLLzW6SDyVi+MGaUOOAM/mhHb74BCPEhvylCBaMH7nuRQjeyDin4P UdbsJfBp2w+UP6LD6WR61VR/BBwcJ9rMCYb5nW+69reWoSq1f+ziZMWI5XKENkgeQCjl q/sSNfdjObKbaLBYCfyersNOk4TWIhFEjbAtgZ6goBCZuQu/1RxYZbmO4+XKtNBDdpoT KNjfTpNf785EsduvR/BrDhFFnsyZghfa9WKebkz0ghNOoo6CFGIT7g77oQIEiDQ1yf/7 ZOqA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279629; x=1706884429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ELkpfpUcCpMmE/EyjZLsfEZZ/g6NmNI21NxV4ntMPM8=; b=Q6r/tj7qWOoaxeCfx/39Sqde2p4/VDIcxqDLmXlrvnIOKOfRYcmHz33gTicbxr5qJU nlruzic+Sc2XU6M4ZVZQB2eF7STM0BTh3Yy5EM0TYt3J8au0C2g2KxEQBoSJGPHGtnwC Z+U/gRXN2Tlr6FOZamtF8X+bfs19pUilzRv6IRX4gOkBx//KYEA3XblWJ9ioGgWBvO7Y wYJzAxD9uVV8ER/bVOHUkxzq1o4pF9lpNF+C/SOWXYPTr0fP7rpyu4Q1NxJiKinp7D1f AALyOG0LwBrj9PiW8s276umBkDQYACrftczxZ45/jdJhbmtQ173nvqZqfdJu22QUsvJH xUqg== X-Gm-Message-State: AOJu0YwdmCIv0syv/0A33lZLFZuJ1HKYskx5gY9HMxCA0zYREyXlxm+X IAFY0IwW3VlDau0qKq6rXha+1YKAXkQ9GTqu7yBxaSk5yPUErTcWfA6nzdA6qD5iNDO/NJ8SCz0 O X-Google-Smtp-Source: AGHT+IE2DRpTBRDUzkOT4eRSlJ2PkFL5J6ij4vlcLTyt9HQJoHtz7n9OkvVLxah9t0pGvfpI/V446Q== X-Received: by 2002:a05:6000:389:b0:337:ac00:9e64 with SMTP id u9-20020a056000038900b00337ac009e64mr2632417wrf.44.1706279629188; Fri, 26 Jan 2024 06:33:49 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/36] target/arm/cpregs: Include missing 'kvm-consts.h' header Date: Fri, 26 Jan 2024 14:33:21 +0000 Message-Id: <20240126143341.2101237-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279882994100003 From: Philippe Mathieu-Daud=C3=A9 target/arm/cpregs.h uses the CP_REG_ARCH_* definitions from "target/arm/kvm-consts.h". Include it in order to avoid when refactoring unrelated headers: target/arm/cpregs.h:191:18: error: use of undeclared identifier 'CP_REG_A= RCH_MASK' if ((kvmid & CP_REG_ARCH_MASK) =3D=3D CP_REG_ARM64) { ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-8-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpregs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h index ca2d6006ceb..cc7c54378f4 100644 --- a/target/arm/cpregs.h +++ b/target/arm/cpregs.h @@ -22,6 +22,7 @@ #define TARGET_ARM_CPREGS_H =20 #include "hw/registerfields.h" +#include "target/arm/kvm-consts.h" =20 /* * ARMCPRegInfo type field bits: --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279760; cv=none; d=zohomail.com; s=zohoarc; b=KZzrsypswABgl/E1QwrnCXoJksDLtWzKECd0Wfj9Ilux2ZdWgGGpfd6WCT/DhyzhPRY1uZ8TpJeYf2DadnsCl7y3HENwB6c/Bac2KinUukrphyI0dEtyDkAp+Xq6t7ZdvMjjxqf3tP5KFfaiYV98RTC1jvLUrMxkh19sy8aMMF0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279760; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=WClEbAYEMyFm8PZOzcgu+oaG2+JFImSPU42hTK0ft1A=; b=nb51rcQfHeQv9WIkQ0GvI96QGbGdn51WHNTraHSbyQbKSVz/k8nEDraDFxGQ9+Ke8RrDJ1zDzgJTkxwTmNMObdt7F1VGCoQc00nBe8XZixOnuyqNFg/aQG6OFogNvNGqV8x4pFqLNP4iB1QTBrd9L5/n7flmAOTpHGwNaZivYIY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279760328531.8656414851479; Fri, 26 Jan 2024 06:36:00 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHJ-0002MD-5o; Fri, 26 Jan 2024 09:33:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHF-0002ID-LT for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:53 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHD-0007vu-DK for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:53 -0500 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-3394dc75eadso451971f8f.2 for ; Fri, 26 Jan 2024 06:33:50 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279630; x=1706884430; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=WClEbAYEMyFm8PZOzcgu+oaG2+JFImSPU42hTK0ft1A=; b=J8ACLJhTqUyC6BSIeavmxU63mbOZ4aVM4fEa6rI6oj3O5W8BsfvPdfDomJBw1OGbgd pmMn5lRyYCdM87DO8Qo6nMnMmFnMOOlpNog8Z3qhBWo6BWg3yq+19xwugnbA7iJAKuVQ hFtEuWmIy5/+SZ/40sBqD4YAtbu/Y626nEXF7UQeTChAxHm2Sjn77OMI5XcQnVTDovZ3 NahNhjLOySEE8JjzfYqNFPUF0SJltQtOuAuHOIJZXOz/lkYNlxyfMMr4PK5ZVo3SG0ei JErfceYCQd5xY3+m6ls2eDQsLyt6OfPEkCchBzGOg4fGNrKZfM5FZLe0zGjJT2j7mjt4 npDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279630; x=1706884430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WClEbAYEMyFm8PZOzcgu+oaG2+JFImSPU42hTK0ft1A=; b=u9R+w/R9l7kQZquNmuyqGGjh3BPfkhTggsUu+S6bTxn1RHq3IIW3R2sXE0ueUORbWD VP1ZHR7cSQv14bsgqqY77sW06VPHS5qO4Ak3AIsgs22AwBQreae/xhEsyP1TRnIBZvKt O17P+H9D3bD6cwzjlVulDapDqCKaXf21edaLZhgGgXlag7l+KuhX7LTAGG8BJrh/lw87 XznoWmOgFn9bUhx7jZKvFxPv2KSU+1Qy/H+X/deC/QIRJcMjhW22eLL9vb8rhBEUA6LG VYhY2aZK58rLtPdq+0nNLLnUdExSxLy/P43BWN2lcaIKicc/yL7zzidERLOKsNLuGVLT NCOQ== X-Gm-Message-State: AOJu0YzZ71vBm9fjXYJKN+5wNDeG6PbhqXXlBi3WUTY8KE8EeNg9XMPC RPuGd5+GZsycjE/TvfFx/IZqaQaThwJ+rqsd7UcWVoP/6dx3Nx/ePE04LZClPg4MZAU3hcsGZcP I X-Google-Smtp-Source: AGHT+IFXYAmbA0yQ357CN2Vl743xnyR22dtdITRCAc9YmFw6WksHPVI0eHUL7Qn6BMFWRz6FnKQOpA== X-Received: by 2002:adf:f88d:0:b0:339:6114:c90e with SMTP id u13-20020adff88d000000b003396114c90emr1162100wrp.27.1706279629792; Fri, 26 Jan 2024 06:33:49 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/36] target/arm: Rename arm_cpu_mp_affinity Date: Fri, 26 Jan 2024 14:33:22 +0000 Message-Id: <20240126143341.2101237-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279760718100001 From: Richard Henderson Rename to arm_build_mp_affinity. This frees up the name for other usage, and emphasizes that the cpu object is not involved. Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-9-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- hw/arm/npcm7xx.c | 2 +- hw/arm/sbsa-ref.c | 2 +- hw/arm/virt.c | 2 +- target/arm/cpu.c | 6 +++--- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index ec276fcd57c..55a19e8539e 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1171,7 +1171,7 @@ void arm_cpu_post_init(Object *obj); (ARM_AFF0_MASK | ARM_AFF1_MASK | ARM_AFF2_MASK | ARM_AFF3_MASK) #define ARM64_AFFINITY_INVALID (~ARM64_AFFINITY_MASK) =20 -uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz); +uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz); =20 #ifndef CONFIG_USER_ONLY extern const VMStateDescription vmstate_arm_cpu; diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index 15ff21d0472..7fb0a233b2d 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -474,7 +474,7 @@ static void npcm7xx_realize(DeviceState *dev, Error **e= rrp) /* CPUs */ for (i =3D 0; i < nc->num_cpus; i++) { object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity", - arm_cpu_mp_affinity(i, NPCM7XX_MAX_NUM_CPU= S), + arm_build_mp_affinity(i, NPCM7XX_MAX_NUM_C= PUS), &error_abort); object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar", NPCM7XX_GIC_CPU_IF_ADDR, &error_abort); diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 477dca06373..b8857d1e9e4 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -148,7 +148,7 @@ static const int sbsa_ref_irqmap[] =3D { static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) { uint8_t clustersz =3D ARM_DEFAULT_CPUS_PER_CLUSTER; - return arm_cpu_mp_affinity(idx, clustersz); + return arm_build_mp_affinity(idx, clustersz); } =20 static void sbsa_fdt_add_gic_node(SBSAMachineState *sms) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ed4ed9f4142..eecde04fc77 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1676,7 +1676,7 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState= *vms, int idx) clustersz =3D GICV3_TARGETLIST_BITS; } } - return arm_cpu_mp_affinity(idx, clustersz); + return arm_build_mp_affinity(idx, clustersz); } =20 static inline bool *virt_get_high_memmap_enabled(VirtMachineState *vms, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 593695b4247..5b5af7d4e1e 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1307,7 +1307,7 @@ static void arm_cpu_dump_state(CPUState *cs, FILE *f,= int flags) } } =20 -uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz) +uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz) { uint32_t Aff1 =3D idx / clustersz; uint32_t Aff0 =3D idx % clustersz; @@ -2113,8 +2113,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) * so these bits always RAZ. */ if (cpu->mp_affinity =3D=3D ARM64_AFFINITY_INVALID) { - cpu->mp_affinity =3D arm_cpu_mp_affinity(cs->cpu_index, - ARM_DEFAULT_CPUS_PER_CLUSTE= R); + cpu->mp_affinity =3D arm_build_mp_affinity(cs->cpu_index, + ARM_DEFAULT_CPUS_PER_CLUS= TER); } =20 if (cpu->reset_hivecs) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279630; x=1706884430; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=aKFqrLvCzXTDGSINS8VWH1i0hLeDZyaY1SkgUJsHk9M=; b=UEd733YkeDANubnYUnCNE/GrAdynl14V5gm3FlKHQegKwdpTftLN5BsBzG5aidn3yP eCRfr9012I5hKZofHAXWJUNIHURK/btr74ck8/l4Az14DPPNl7LHv2n1HNUgvmDdeaK+ tlmLF2iTh7Z8dKSfxaYnFrMNwziXqTb02ZK4iQD0/pNWVUdgXvhARHlDLhcwMt3xl4sG I7TIHap99rosPFSj44ozycG1Ux9BYtJWAXRJV+Ra6a3hReKHfVB9r3n7qj4uh8KJTZft 6T62ipYPmUrR7hI9/SlO9EURiVn9OocKY6ENDdZZw9pwaqUEEhsxlkgJhylpR2aQLtVg 33LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279630; x=1706884430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aKFqrLvCzXTDGSINS8VWH1i0hLeDZyaY1SkgUJsHk9M=; b=D3lDNdtaVbR5PF1DdrohuoaaZZ9xaWEfvFMTEEfJFSMfmyss/0Ur/R+C8+qMYigrVw /iQh//L0RiN3GUwoYYnsaN9oIhMoZWDUJNgxp8YlGSpEtRXCniZ5lrWJBjN0yeS4UQzq iLTrSJGhiFLYrakndsiQS67TQ5R+NpD660yeZkM9u/STGXBsyFz7v83jRDPjkpeFnr/y QajFieNYoyhZdhKJ0Q4AsUEyEhwfP+TA7XHMV5/SOiNe7Jf0Dc2Rs94F8gY6/rSXJ7c1 LodUBQfy3OlZGU8QElaJ5l662UikFFwXHtnQSLbFaxS/NqfY7cVYBZrNXzBbL/vI5ZY7 rCNQ== X-Gm-Message-State: AOJu0YxGeeZ7yUHhK8HvGPmuFhjXMH62iO7rZibVsZZ8FbuKtifaU03z AbicbH+PncfqRw8zupemleKiXrG1MewJ+LRDTsyrIK1XE0zsH0okOXn0tQpqcDZ1vY/cbgh58S2 6 X-Google-Smtp-Source: AGHT+IEIy+ckq7GFIKhkAM1WGB0VYb6u5WtGOgJHhtQykhYqTDFIqMN/TnuAu3pIDDsh84CaRcOBZA== X-Received: by 2002:a7b:cb43:0:b0:40e:5aa4:44f8 with SMTP id v3-20020a7bcb43000000b0040e5aa444f8mr863285wmj.216.1706279630224; Fri, 26 Jan 2024 06:33:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/36] target/arm: Create arm_cpu_mp_affinity Date: Fri, 26 Jan 2024 14:33:23 +0000 Message-Id: <20240126143341.2101237-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279776743100003 From: Richard Henderson Wrapper to return the mp affinity bits from the cpu. Signed-off-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-10-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 5 +++++ hw/arm/virt-acpi-build.c | 2 +- hw/arm/virt.c | 6 +++--- hw/arm/xlnx-versal-virt.c | 3 ++- hw/misc/xlnx-versal-crl.c | 4 ++-- target/arm/arm-powerctl.c | 2 +- target/arm/hvf/hvf.c | 4 ++-- target/arm/tcg/psci.c | 2 +- 8 files changed, 17 insertions(+), 11 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 55a19e8539e..d1584bdb3b5 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1173,6 +1173,11 @@ void arm_cpu_post_init(Object *obj); =20 uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz); =20 +static inline uint64_t arm_cpu_mp_affinity(ARMCPU *cpu) +{ + return cpu->mp_affinity; +} + #ifndef CONFIG_USER_ONLY extern const VMStateDescription vmstate_arm_cpu; =20 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index a22a2f43a56..2127778c1ea 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -720,7 +720,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, Virt= MachineState *vms) build_append_int_noprefix(table_data, vgic_interrupt, 4); build_append_int_noprefix(table_data, 0, 8); /* GICR Base Addre= ss*/ /* MPIDR */ - build_append_int_noprefix(table_data, armcpu->mp_affinity, 8); + build_append_int_noprefix(table_data, arm_cpu_mp_affinity(armcpu),= 8); /* Processor Power Efficiency Class */ build_append_int_noprefix(table_data, 0, 1); /* Reserved */ diff --git a/hw/arm/virt.c b/hw/arm/virt.c index eecde04fc77..b3592798ea9 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -370,7 +370,7 @@ static void fdt_add_cpu_nodes(const VirtMachineState *v= ms) for (cpu =3D 0; cpu < smp_cpus; cpu++) { ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(cpu)); =20 - if (armcpu->mp_affinity & ARM_AFF3_MASK) { + if (arm_cpu_mp_affinity(armcpu) & ARM_AFF3_MASK) { addr_cells =3D 2; break; } @@ -397,10 +397,10 @@ static void fdt_add_cpu_nodes(const VirtMachineState = *vms) =20 if (addr_cells =3D=3D 2) { qemu_fdt_setprop_u64(ms->fdt, nodename, "reg", - armcpu->mp_affinity); + arm_cpu_mp_affinity(armcpu)); } else { qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", - armcpu->mp_affinity); + arm_cpu_mp_affinity(armcpu)); } =20 if (ms->possible_cpus->cpus[cs->cpu_index].props.has_node_id) { diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 537118224fb..841ef69df66 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -107,7 +107,8 @@ static void fdt_add_cpu_nodes(VersalVirt *s, uint32_t p= sci_conduit) ARMCPU *armcpu =3D ARM_CPU(qemu_get_cpu(i)); =20 qemu_fdt_add_subnode(s->fdt, name); - qemu_fdt_setprop_cell(s->fdt, name, "reg", armcpu->mp_affinity); + qemu_fdt_setprop_cell(s->fdt, name, "reg", + arm_cpu_mp_affinity(armcpu)); if (psci_conduit !=3D QEMU_PSCI_CONDUIT_DISABLED) { qemu_fdt_setprop_string(s->fdt, name, "enable-method", "psci"); } diff --git a/hw/misc/xlnx-versal-crl.c b/hw/misc/xlnx-versal-crl.c index ac6889fcf26..9bfa9baa157 100644 --- a/hw/misc/xlnx-versal-crl.c +++ b/hw/misc/xlnx-versal-crl.c @@ -67,9 +67,9 @@ static void crl_reset_cpu(XlnxVersalCRL *s, ARMCPU *armcp= u, bool rst_old, bool rst_new) { if (rst_new) { - arm_set_cpu_off(armcpu->mp_affinity); + arm_set_cpu_off(arm_cpu_mp_affinity(armcpu)); } else { - arm_set_cpu_on_and_reset(armcpu->mp_affinity); + arm_set_cpu_on_and_reset(arm_cpu_mp_affinity(armcpu)); } } =20 diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c index 88503815659..6c86e901028 100644 --- a/target/arm/arm-powerctl.c +++ b/target/arm/arm-powerctl.c @@ -37,7 +37,7 @@ CPUState *arm_get_cpu_by_id(uint64_t id) CPU_FOREACH(cpu) { ARMCPU *armcpu =3D ARM_CPU(cpu); =20 - if (armcpu->mp_affinity =3D=3D id) { + if (arm_cpu_mp_affinity(armcpu) =3D=3D id) { return cpu; } } diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index a537a5bc94c..659401e12c7 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1016,7 +1016,7 @@ static void hvf_raise_exception(CPUState *cpu, uint32= _t excp, =20 static void hvf_psci_cpu_off(ARMCPU *arm_cpu) { - int32_t ret =3D arm_set_cpu_off(arm_cpu->mp_affinity); + int32_t ret =3D arm_set_cpu_off(arm_cpu_mp_affinity(arm_cpu)); assert(ret =3D=3D QEMU_ARM_POWERCTL_RET_SUCCESS); } =20 @@ -1045,7 +1045,7 @@ static bool hvf_handle_psci_call(CPUState *cpu) int32_t ret =3D 0; =20 trace_hvf_psci_call(param[0], param[1], param[2], param[3], - arm_cpu->mp_affinity); + arm_cpu_mp_affinity(arm_cpu)); =20 switch (param[0]) { case QEMU_PSCI_0_2_FN_PSCI_VERSION: diff --git a/target/arm/tcg/psci.c b/target/arm/tcg/psci.c index 9080a91d9c6..50d4b23d26b 100644 --- a/target/arm/tcg/psci.c +++ b/target/arm/tcg/psci.c @@ -215,7 +215,7 @@ err: return; =20 cpu_off: - ret =3D arm_set_cpu_off(cpu->mp_affinity); + ret =3D arm_set_cpu_off(arm_cpu_mp_affinity(cpu)); /* notreached */ /* sanity check in case something failed */ assert(ret =3D=3D QEMU_ARM_POWERCTL_RET_SUCCESS); --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279630; x=1706884430; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=gl5mdL8o4tkULNtVB7E10+lX7Lfh3f3aHXrBpGvFwCw=; b=l2qwh0WBfH1JVfdtAgS3H8IvDTYxbqBXhwxQTZhL1EGY3JHnYq0CzGNH3O/xq6lV8h L5UDeQc9psbER8/uK2yxms8xzU50oqOa1utlvOuiBxZ9SU1aw/mflvTO5WfdBSN58LXr NyhiQ2vJ16e7uc+vvQCHWSU8BzZIz76nCHKubreRpopNoqC12YNvbzNhg028Qe2N5RWs IRETHdHAJthE8yUTlYF+FpXz9ClC9kLXBpcbjokpzF/EuIvf2J/FpyoXj8OJH5tPozhp kNmDpOjVQyVB5r2c/+bdbzpUfM1Hi5VOcptOAhsSttOsZD7xdgEy/XzE7eKY2c+02Iqs fUAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279630; x=1706884430; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gl5mdL8o4tkULNtVB7E10+lX7Lfh3f3aHXrBpGvFwCw=; b=itMiomyeHM9kfKqkde5nHgcG7x8uMc1N4PIT5A0YV9BehfWWkTVpYxPjjbEaNYXueW lRrDszUphC7oHQbOdYV4Vz6B78Fh3C+F6hUnueRYEZ6BgRk6r1KN2foPtoZOcLE+k2aO h6Kmf+DMfBsOMLLrZHCc+LV+affJCIQJZVr+4rE9jJU4HPTpQogIuW+gvggsvLN9yTdx BBcsPx17M4Bb9O7Vyv/59QHWxZFY4iw+JdvjZUBn/WGHujGgTXaWtpKEfxDg3XlejVND KqfPGZ1AKXOsez+p2VhA5Qjiq31e7shd1TqOS7gV5cBjA/mjlDd+U93y2Pao5OVET4+O 6Piw== X-Gm-Message-State: AOJu0Yy3MA5x2MaK5T2fi9nblIiWBVmKRU1uZn0E7efGqTFOt8+qX0OM B73rUU8e3Mw05jkc6h08zWW8eiSS8FPAsfDb2Or2yJCogVLWkYhMP9mzntCuKMSw0O094syugOF W X-Google-Smtp-Source: AGHT+IHFOH8mAEtP2w4qdoPCzIcRF+mw7DSaZ9w2IKxVNs+hBYdzxSgMfELwBgP0ZZLMoBMqsf0R7Q== X-Received: by 2002:adf:ee8a:0:b0:337:b74b:492c with SMTP id b10-20020adfee8a000000b00337b74b492cmr486377wro.234.1706279630638; Fri, 26 Jan 2024 06:33:50 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 19/36] target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header Date: Fri, 26 Jan 2024 14:33:24 +0000 Message-Id: <20240126143341.2101237-20-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279716639100003 From: Philippe Mathieu-Daud=C3=A9 Declare arm_cpu_mp_affinity() prototype in the new "target/arm/multiprocessing.h" header so units in hw/arm/ can use it without having to include the huge target-specific "cpu.h". File list to include the new header generated using: $ git grep -lw arm_cpu_mp_affinity Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-11-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 6 +----- target/arm/multiprocessing.h | 16 ++++++++++++++++ hw/arm/virt-acpi-build.c | 1 + hw/arm/virt.c | 1 + hw/arm/xlnx-versal-virt.c | 1 + hw/misc/xlnx-versal-crl.c | 1 + target/arm/arm-powerctl.c | 1 + target/arm/cpu.c | 5 +++++ target/arm/hvf/hvf.c | 1 + target/arm/tcg/psci.c | 1 + 10 files changed, 29 insertions(+), 5 deletions(-) create mode 100644 target/arm/multiprocessing.h diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d1584bdb3b5..cecac4c0a12 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -26,6 +26,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" #include "qapi/qapi-types-common.h" +#include "target/arm/multiprocessing.h" =20 /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) @@ -1173,11 +1174,6 @@ void arm_cpu_post_init(Object *obj); =20 uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz); =20 -static inline uint64_t arm_cpu_mp_affinity(ARMCPU *cpu) -{ - return cpu->mp_affinity; -} - #ifndef CONFIG_USER_ONLY extern const VMStateDescription vmstate_arm_cpu; =20 diff --git a/target/arm/multiprocessing.h b/target/arm/multiprocessing.h new file mode 100644 index 00000000000..81715d345c2 --- /dev/null +++ b/target/arm/multiprocessing.h @@ -0,0 +1,16 @@ +/* + * ARM multiprocessor CPU helpers + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef TARGET_ARM_MULTIPROCESSING_H +#define TARGET_ARM_MULTIPROCESSING_H + +#include "target/arm/cpu-qom.h" + +uint64_t arm_cpu_mp_affinity(ARMCPU *cpu); + +#endif diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 2127778c1ea..43ccc60f43c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -59,6 +59,7 @@ #include "hw/acpi/ghes.h" #include "hw/acpi/viot.h" #include "hw/virtio/virtio-acpi.h" +#include "target/arm/multiprocessing.h" =20 #define ARM_SPI_BASE 32 =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b3592798ea9..1e0df6ea3ad 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -74,6 +74,7 @@ #include "hw/arm/smmuv3.h" #include "hw/acpi/acpi.h" #include "target/arm/internals.h" +#include "target/arm/multiprocessing.h" #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" #include "hw/acpi/generic_event_device.h" diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 841ef69df66..29f4d2c2dce 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -20,6 +20,7 @@ #include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" #include "hw/arm/boot.h" +#include "target/arm/multiprocessing.h" #include "qom/object.h" =20 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt") diff --git a/hw/misc/xlnx-versal-crl.c b/hw/misc/xlnx-versal-crl.c index 9bfa9baa157..1f1762ef163 100644 --- a/hw/misc/xlnx-versal-crl.c +++ b/hw/misc/xlnx-versal-crl.c @@ -19,6 +19,7 @@ #include "hw/resettable.h" =20 #include "target/arm/arm-powerctl.h" +#include "target/arm/multiprocessing.h" #include "hw/misc/xlnx-versal-crl.h" =20 #ifndef XLNX_VERSAL_CRL_ERR_DEBUG diff --git a/target/arm/arm-powerctl.c b/target/arm/arm-powerctl.c index 6c86e901028..2b2055c6acc 100644 --- a/target/arm/arm-powerctl.c +++ b/target/arm/arm-powerctl.c @@ -16,6 +16,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "sysemu/tcg.h" +#include "target/arm/multiprocessing.h" =20 #ifndef DEBUG_ARM_POWERCTL #define DEBUG_ARM_POWERCTL 0 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5b5af7d4e1e..04296f2928f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1314,6 +1314,11 @@ uint64_t arm_build_mp_affinity(int idx, uint8_t clus= tersz) return (Aff1 << ARM_AFF1_SHIFT) | Aff0; } =20 +uint64_t arm_cpu_mp_affinity(ARMCPU *cpu) +{ + return cpu->mp_affinity; +} + static void arm_cpu_initfn(Object *obj) { ARMCPU *cpu =3D ARM_CPU(obj); diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 659401e12c7..71a26db1886 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -28,6 +28,7 @@ #include "arm-powerctl.h" #include "target/arm/cpu.h" #include "target/arm/internals.h" +#include "target/arm/multiprocessing.h" #include "trace/trace-target_arm_hvf.h" #include "migration/vmstate.h" =20 diff --git a/target/arm/tcg/psci.c b/target/arm/tcg/psci.c index 50d4b23d26b..51d2ca3d30d 100644 --- a/target/arm/tcg/psci.c +++ b/target/arm/tcg/psci.c @@ -24,6 +24,7 @@ #include "sysemu/runstate.h" #include "internals.h" #include "arm-powerctl.h" +#include "target/arm/multiprocessing.h" =20 bool arm_is_psci_call(ARMCPU *cpu, int excp_type) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279631; x=1706884431; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=REDIbkefaHLl5VHtlOjlhfc4RzzdVkDK80vRRwWKuZc=; b=IfNhhx5q8HfdM8X7V5D1BVrn5s4fHkr9+i9Q2XPZdBNq7IZIq2FAcywdQ5cJvKsy/q pxJsrFPGBMvuItpbSJkU+Bo8d8HKbxxwEZJoD5W1FiBS82qFxgGUcaT+LC8iwMH1R2tO ubr4zaSyLTl3dLwuzQpmARf97s5+Lrp0Jh2uRrhtk1bDJm0QJYp0LkV0ogvIR7zRSp/j PBnsO6XfYAx8iYWtkmIsbJOxItvZ2kOzieCPSm4vBFy0z/HlXvxRa5ZDN92L5VBOfJe6 kAu1O9fNSt6U35JDmkC6j9S6U7okmOeFPJeZUf9IM5wYaoXK117lBi8jUw40lYTVnbdu dH6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279631; x=1706884431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=REDIbkefaHLl5VHtlOjlhfc4RzzdVkDK80vRRwWKuZc=; b=ioWmd7g9KC903VjVxL3mEo6QK18hQQ77XKKlQSF82F99SCihMfRd6XlTo9ZHd75nkW Mx3V1rS+RkntUQJqfG6om3nykaFp527nvGlVjDlNbuXxfrxGYdKHhs+OErXMRRykuZxp BVvhVQN+L65wlY0wYKKTP4RL5eh6hH0W+Z1M+EzfadopP1qig9437NekJuSw2/MaykdX GYtCXI6fKWFeC1IEB4mK3g46DWzU+oaz78zMiRvE1cJ7wZ/r1DvIbCzhrB/KenMST7iq STr1t0cz5456jJl2wWmIi2Y6+GFe7lY2w60Qpa9pbT5lzBe/6p82NymqgUQEC6UZGyye UG2g== X-Gm-Message-State: AOJu0YyxGUaLuTpeiZfhWAPhqYeEVZYzFNKuEU5en3de5gX/zsoWi1Za zgA5D8h+vxy9Im0IgRGe+U0V4eZrPEe6GarpSSPHNOZy3tNqB4M0rpCg1XgAFwuFq2HrNb+g/Qu s X-Google-Smtp-Source: AGHT+IEvOQJ/vsG+Xzc79qS1kUH+Htbk/BG6NHSjSTEIr9T+0yCJnlJvTaif+wGC/2vziqW8FicwUA== X-Received: by 2002:adf:ee46:0:b0:336:68dd:c7e2 with SMTP id w6-20020adfee46000000b0033668ddc7e2mr992707wro.27.1706279631022; Fri, 26 Jan 2024 06:33:51 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 20/36] target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' Date: Fri, 26 Jan 2024 14:33:25 +0000 Message-Id: <20240126143341.2101237-21-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279824860100001 From: Philippe Mathieu-Daud=C3=A9 Missed in commit 2d56be5a29 ("target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'"). See it for more details. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-12-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu-qom.h | 3 +++ target/arm/cpu.h | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 02b914c8767..f795994135f 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -33,4 +33,7 @@ typedef struct AArch64CPUClass AArch64CPUClass; DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU, TYPE_AARCH64_CPU) =20 +#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU +#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) + #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index cecac4c0a12..41659d0ef15 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2837,8 +2837,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_syn= c); #define ARM_CPUID_TI915T 0x54029152 #define ARM_CPUID_TI925T 0x54029252 =20 -#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU -#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) #define CPU_RESOLVING_TYPE TYPE_ARM_CPU =20 #define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279697; cv=none; d=zohomail.com; s=zohoarc; b=I0JEdOKcGP/VLdTn3zPltS4qokIc6nyUGMm+tt4cM76V8jEJNg4LU4fgCUYc0xUIwRxdYRny7QwyEKqVpYIpndKXVyBPMStNkvWPXTbSw9PCX3tDJtK5aYD1O6LoSUYP5U1WSAj4sJscFxkP6o5K4bT3veV097XqrKVrSMGCuC8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279697; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=8W6Dmg/Z15G38A2ANLX0PCG/NULptGOn1F3YALWfvag=; b=RH+8y9UFXZdfAZgX7DJbyUhJeM8RdbMVDh8XbxFDssIaP8GZ7RmTYmvDDpEkAc2JDCr8WjL3ZF0AqbmipRcXZBczrFhlhLiLsWn6jGdT7yvVU+IfniBkPhRBRa9J8xuwGSya2IFsoYevhuSI0i97ee4FLgJ3N/3/7zCyayjqdXU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279697318888.669455030642; Fri, 26 Jan 2024 06:34:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHJ-0002M8-2A; Fri, 26 Jan 2024 09:33:57 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHH-0002K9-BU for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:55 -0500 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHE-0007wt-Tn for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:55 -0500 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-3392291b21bso634144f8f.1 for ; Fri, 26 Jan 2024 06:33:52 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279631; x=1706884431; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=8W6Dmg/Z15G38A2ANLX0PCG/NULptGOn1F3YALWfvag=; b=fkEx0EjjHRzF3rvznw7+RqB3EJFj9s6om0y4h137cxnTPcjhjbuATTUIOSsqWrcku8 mtufP+rbCoJdlWs5RVX6n+fYKRnYYiOEmQfe6PZYD0g/Zo2B6naQJR1X2qbr+Uopt72w 0tmlUG7Npzno68sfDbxP+zKRu2CvhgXpmvGH8yBp/wZYJvn4rAzipZhRgQwRuHYZUr3l 9Yguqo8be9o2xbdzlyVl1o0KP8n7g5Hv3PCTN/PvmACp1U+ZqaOFt/ZlKwxen1SJ4EHP 8smtBXJUIYUu4+okXQJqTj0DEQiU7QBDJuzxXHaASW9+Cr0GBUNMWCfGTP5AMElRPPL2 E16g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279631; x=1706884431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8W6Dmg/Z15G38A2ANLX0PCG/NULptGOn1F3YALWfvag=; b=IOBaDbz5SZDeSoASO0zLxrRExCKf4sFrayV3pFG3I6oTzX1quiesA6G3G8eZhtpZvT MWplpQI2VEamu93eR6Kl7Tg3FfD2a8CvR7NBMPSLIwi+Ba8nD7ro1NyylNYCYbiscj7s 3Xr3IUNFZa7L07CHYx+KI7lgNzWVJazbLQukwVsBhfVhzQ1eMQzH0qTITrHpmnND3whx WyAG6oSNHtze2Vci71lQ/XS2/Hoh4RJowrfKq1RVoZo14M9kFFcjV/viGp+zdz4kIsWP 0pcxNathGRhf9DJ8Xg6fBXgOJiT1+fzFQ6LA1X55kPtLgEq+8j0qduGfVbn1SMs/WKM1 OTXA== X-Gm-Message-State: AOJu0YxYEcTr23t2LLxyRvFhvmc8bbWleJiZ8hp+oQO/LDGOYgylT+H5 r7qkOPNMHNA0gNX8zH59wN+tAIeHfqFV1303ZM5eXn3M9bq2X2jo/Ep5hu+Xt74XvbCsvnY00Zm V X-Google-Smtp-Source: AGHT+IF9uk3c1ASXF2iTrylbz01F2lZILul21p0dTjJY97LbAxFj3xdLDYkfRD/yqN8e6kmrAfG4gQ== X-Received: by 2002:a5d:6303:0:b0:337:9b58:6b8d with SMTP id i3-20020a5d6303000000b003379b586b8dmr926115wru.112.1706279631407; Fri, 26 Jan 2024 06:33:51 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 21/36] hw/cpu/a9mpcore: Build it only once Date: Fri, 26 Jan 2024 14:33:26 +0000 Message-Id: <20240126143341.2101237-22-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279698540100009 From: Philippe Mathieu-Daud=C3=A9 hw/cpu/a9mpcore.c doesn't require "cpu.h" anymore. By removing it, the unit become target agnostic: we can build it once. Update meson. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-13-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/cpu/a9mpcore.c | 2 +- hw/cpu/meson.build | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index d03f57e579b..c30ef72c669 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -15,7 +15,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/core/cpu.h" -#include "cpu.h" +#include "target/arm/cpu-qom.h" =20 #define A9_GIC_NUM_PRIORITY_BITS 5 =20 diff --git a/hw/cpu/meson.build b/hw/cpu/meson.build index 6d319947ca0..38cdcfbe572 100644 --- a/hw/cpu/meson.build +++ b/hw/cpu/meson.build @@ -2,5 +2,5 @@ system_ss.add(files('core.c', 'cluster.c')) =20 system_ss.add(when: 'CONFIG_ARM11MPCORE', if_true: files('arm11mpcore.c')) system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_mpcore.c')) -specific_ss.add(when: 'CONFIG_A9MPCORE', if_true: files('a9mpcore.c')) +system_ss.add(when: 'CONFIG_A9MPCORE', if_true: files('a9mpcore.c')) specific_ss.add(when: 'CONFIG_A15MPCORE', if_true: files('a15mpcore.c')) --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279953; cv=none; d=zohomail.com; s=zohoarc; b=AP4r83IyPE5i9BzZbRer5o+hpiSWRq6tMnOpeSCSgLs9s2kW7Xextbsg8ZRPhqiVeV9aY2SSmRexvMbl7OVgfduEZt6W3PlgI9HBX41DzfMWwDX6/Nv+g1NRn4zKRK3YP733EV6g4XeFh0KO5CMBtPOGEoCMyO43GBSoSXAys5s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279953; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=STnpdxdBqg+D7O0t/DW+hSCI5CBTAErw95dM/Zpjin0=; b=DFtwMpuIEKb98+uKX6lwKklqFIr2Uwyrr0K+DP2uvSeXlvECHrTAlJdSDyAMl9ZDWhKuWyqlIbrPm1v21GdDIaIyh49lbsMXufRORsL3DloR6X2fGVf3rPj/jUlTuQZS2ExYeaf89hnn2Cy8YZB6d5ektTzToHE74OwZ5nMrsmA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279953411921.3136273830099; Fri, 26 Jan 2024 06:39:13 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHN-0002Tg-8P; Fri, 26 Jan 2024 09:34:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHH-0002Km-KD for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:55 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHF-0007xB-DN for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:55 -0500 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-33921b95dddso1153424f8f.1 for ; Fri, 26 Jan 2024 06:33:53 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279632; x=1706884432; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=STnpdxdBqg+D7O0t/DW+hSCI5CBTAErw95dM/Zpjin0=; b=A4CZHqLJRxtChmNlg5Blxgr3R9SYqdZAi/b3s4/d6TCgdcujBWHX4Zf3A6WNDh60jy 5Z6VHhW9ZZgWFypOMrKcvKk078UwlRPpSmiWkHln7U6LcHtluFLvX7Rd+X8DVAqbTZtr Tl0rw3c8yskquAu/LrVZcOCCLlN7VwCbOV3DQzoi9Wue97A2bCDyMm762BcOEGmdDN6w mgVgO6K9oecWLPCBt2pZUXjc/MeGTu/n2TgD58OmF/XCqNrZ5MSV6pColJhgx9Wy4OxC 6nV5HXO9OUlVZPrm8oEgs4aSfahzUA4DB+NoTUekTpgYzpl1MMLXGZk8EAVAmf5SFxOu up2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279632; x=1706884432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=STnpdxdBqg+D7O0t/DW+hSCI5CBTAErw95dM/Zpjin0=; b=U2P6Lmw1dMmlfnmQNqnVzmrVlSH0To+7MvssXbdFsPmJ0Lb1oKOiD7gO7W82ctwwNg HQHfk2DEk82P9CiZFnjt1qNfFSdFgR5m5/+7giaOIY39n3/I0dvLRBKHfAyN9aVxUu4g 3c1mF5U06eJubeOVNO3U8sUImL6zPBRywhdjFwaawJ4j3JvkuQbtIINqJztmgs0aLBqg 0l+QE6WZVHiyQqxxGNvX+lGShI3/ZVEFJs04bicG6LYTIMPJZaIS8Ei74Bpw6bvRsMlg VmQWyY8b79MMHNUGnq4i0ctQrq93uqS1VTX7u711KFyTLHOfT+RbnNMQUsopofjzN8F8 WmtA== X-Gm-Message-State: AOJu0YzLahPD1rDv180ZfAUzQPdRR9GW6c7xEJbeNeqzBPiaFNVn/hyU 3xhuSmDkYFR6k37/RoP9fVeAd5eG0b91BypTHJOMmYhuQgNUtmemngLKgit7skUEu/43T+JwH9T 7 X-Google-Smtp-Source: AGHT+IEozrV2gn/h4yKWScmgLGPMd1nC9i3lak6xrEo/I20bmEpJ+Dx4cU+YLvY+/u2vZJDii/lkMg== X-Received: by 2002:adf:ea44:0:b0:33a:c656:b26c with SMTP id j4-20020adfea44000000b0033ac656b26cmr757908wrn.14.1706279632087; Fri, 26 Jan 2024 06:33:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 22/36] hw/misc/xlnx-versal-crl: Include generic 'cpu-qom.h' instead of 'cpu.h' Date: Fri, 26 Jan 2024 14:33:27 +0000 Message-Id: <20240126143341.2101237-23-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279955396100021 From: Philippe Mathieu-Daud=C3=A9 "target/arm/cpu.h" is target specific, any file including it becomes target specific too, thus this is the same for any file including "hw/misc/xlnx-versal-crl.h". "hw/misc/xlnx-versal-crl.h" doesn't require any target specific definition however, only the target-agnostic QOM definitions from "target/arm/cpu-qom.h". Include the latter header to avoid tainting unnecessary objects as target-specific. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-14-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/misc/xlnx-versal-crl.h | 2 +- hw/misc/xlnx-versal-crl.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/hw/misc/xlnx-versal-crl.h b/include/hw/misc/xlnx-versa= l-crl.h index dfb8dff197d..dba6d3585d1 100644 --- a/include/hw/misc/xlnx-versal-crl.h +++ b/include/hw/misc/xlnx-versal-crl.h @@ -11,7 +11,7 @@ =20 #include "hw/sysbus.h" #include "hw/register.h" -#include "target/arm/cpu.h" +#include "target/arm/cpu-qom.h" =20 #define TYPE_XLNX_VERSAL_CRL "xlnx-versal-crl" OBJECT_DECLARE_SIMPLE_TYPE(XlnxVersalCRL, XLNX_VERSAL_CRL) diff --git a/hw/misc/xlnx-versal-crl.c b/hw/misc/xlnx-versal-crl.c index 1f1762ef163..1a596f1cf57 100644 --- a/hw/misc/xlnx-versal-crl.c +++ b/hw/misc/xlnx-versal-crl.c @@ -18,6 +18,7 @@ #include "hw/register.h" #include "hw/resettable.h" =20 +#include "target/arm/cpu.h" #include "target/arm/arm-powerctl.h" #include "target/arm/multiprocessing.h" #include "hw/misc/xlnx-versal-crl.h" --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279899; cv=none; d=zohomail.com; s=zohoarc; b=X3L2fiPLBRhK2iYN80KUbehvwtLFGtp61bzwFsJRGzwfGegouAauiFRwwU6Dhur6kMgWrQUWziyToh4h5WLb06kYGKoZToXi+tlSq8dJZHMAbkH928N2+AhuTRnffGsoy1e6Wy4wTYDJWXKQleRvmHOQtMvizl83RSYU8RfgeKg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279899; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=LouzfqvK2IHKPiiDEvjrZzysBnMRC0GfKDnWQD9WZEU=; b=bQoVXEF6j1C+yq7Dm0z8oKmKowEnRSzbYKNBInVQfif00DVHRJSHxne2KMrUYH28cFYhz3B3qrbD7dKDCu8eky6jPHfNY8zhT6+Joaff/H4JyUc8gOPSr3b0EphC5L8Ps0Y41kvB7c7y0dBJ13ENUrCPtb11rWbvzyCrt8rkbJo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279899649237.2718948165068; Fri, 26 Jan 2024 06:38:19 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHK-0002Of-Ga; Fri, 26 Jan 2024 09:33:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHI-0002Kz-8x for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHG-0007xM-5s for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-40eacb4bfa0so7000195e9.1 for ; Fri, 26 Jan 2024 06:33:53 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279632; x=1706884432; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=LouzfqvK2IHKPiiDEvjrZzysBnMRC0GfKDnWQD9WZEU=; b=MBs5J5Xt/Qy+tNUZG8p9FDnzJppyFPN5AHlNS28yEvJjVCZV7BH5o6PLPoTtbBksIS qdR9ZuSWYviHM4q8+P3xvxlCpK8P4FsraNGY7QZMy2WbDyMRMC4A1mz7UAQgNB7V74NV eLT5WTnUFhm794IXiCXYZk00+7hRLiISu8mLjHV/sTRIvNkHDp+5a0EBGZVTYtmKrl33 1uR/BoF/kMe+z5wkBp2GNBQZpkWnr9BZtOilEtxUjyB96XK+ZXf0VJ2kGq0pRA+EgLwQ zS1lve/t+YPNidfJ0JyF38aUGQURlfY8Ots3qEi4yIaVNtsZWWy9n3/988e4v5nCtAXX +lqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279632; x=1706884432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LouzfqvK2IHKPiiDEvjrZzysBnMRC0GfKDnWQD9WZEU=; b=Iy/Yv5A9/mc25eruVCBkM9VDoOtGW1blVMWmNZB6q0VOQ9JZ6Oy6nwBeT7trZjxJWe D5iOv4UGjeMxJ1cfbS0Hke8joEcc/efeNYza7N2hLJCC9Tg3HtLOSQt21OWKrmKY7Scj J4m7S/cnp4yusR3eFqRm+jLF7LTu8wxdjslaN1qjoNu4lBOHphpXvBW5HReE2P58nh5Q +FJMqSBVuOMmQxfDXj8twUG5B6BcNv21jth/kACX8b+ApThCIoE/7cZ6VN4FT5qrvAeg KJ2nqGOJtFE13FPHxT4HftCKfhkdFmQVY2PDODs2fk7EqLWV++VbBPdyGK0A+Np8wN6C 78Sw== X-Gm-Message-State: AOJu0YzHjqKxT/lZgQmlTekCJtYlAuDFXRZECeojTHhbwDMW2KE0ACGe rkZARuWuR1pCaV3limA3aqm0Q9YWTS7obDl1oSEH81fXXQJsyesi45XwR48CgHAiK6QPz6iy54b M X-Google-Smtp-Source: AGHT+IEafsKxr2vb8cyaFangAYRpmu2zOUni7W8du/1ULX+hA4klsujtUyFenx+u3TJokHdsaC/ybw== X-Received: by 2002:a7b:c3d1:0:b0:40e:47db:9a3b with SMTP id t17-20020a7bc3d1000000b0040e47db9a3bmr1023333wmj.75.1706279632501; Fri, 26 Jan 2024 06:33:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 23/36] hw/misc/xlnx-versal-crl: Build it only once Date: Fri, 26 Jan 2024 14:33:28 +0000 Message-Id: <20240126143341.2101237-24-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279901054100014 From: Philippe Mathieu-Daud=C3=A9 hw/misc/xlnx-versal-crl.c doesn't require "cpu.h" anymore. By removing it, the unit become target agnostic: we can build it once. Update meson. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-15-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/misc/xlnx-versal-crl.c | 1 - hw/misc/meson.build | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/misc/xlnx-versal-crl.c b/hw/misc/xlnx-versal-crl.c index 1a596f1cf57..1f1762ef163 100644 --- a/hw/misc/xlnx-versal-crl.c +++ b/hw/misc/xlnx-versal-crl.c @@ -18,7 +18,6 @@ #include "hw/register.h" #include "hw/resettable.h" =20 -#include "target/arm/cpu.h" #include "target/arm/arm-powerctl.h" #include "target/arm/multiprocessing.h" #include "hw/misc/xlnx-versal-crl.h" diff --git a/hw/misc/meson.build b/hw/misc/meson.build index 2ca2ce4b62e..e4ef1da5a53 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -96,8 +96,8 @@ system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slav= io_misc.c')) system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c')) system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-= crf.c')) system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-= apu-ctrl.c')) -specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-cr= l.c')) system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files( + 'xlnx-versal-crl.c', 'xlnx-versal-xramc.c', 'xlnx-versal-pmc-iou-slcr.c', 'xlnx-versal-cfu.c', --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279933; cv=none; d=zohomail.com; s=zohoarc; b=i2PWY+A0CO3GdzindySqZKOjwJ6Rvzo3nFmyhUVWndsL5snLk47TaWDazOeim/IPG2RBJLxyKX4FiI+eRsRLhJfXlcitjk33Lz7iVKHJejSwyDyiZu3sFFcY0d7R8cFCh5kwR+8ywjbl+8Ib+eABkj7yiAyLr+J8X+2PsVhEmOg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279933; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=KENK9Mpj18OXyJdvgmdqz6uWTQ8A1jTnhGCoNoZ/oAs=; b=Q4HcHwVN0t9NTwVoIk57UCi/XjsO+h7LOQCvz81PWvbHrvsUQ5GYiqOirferatnNrH6kbM6NuqY9uJy0l+e5jbvXWSTQQZTSfweDulxDdVhtXK6cLsBcbijFF2MTpE1urIE7ZZZq6qsckLhP4x5DZuL1IN2jYdF4KijtGNzmyOg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279933842306.9930164580003; Fri, 26 Jan 2024 06:38:53 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHM-0002S8-Dg; Fri, 26 Jan 2024 09:34:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHI-0002LT-Kz for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHG-0007xc-Fa for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-33ade052953so335741f8f.1 for ; Fri, 26 Jan 2024 06:33:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279633; x=1706884433; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=KENK9Mpj18OXyJdvgmdqz6uWTQ8A1jTnhGCoNoZ/oAs=; b=XbPhYnoP+Ejo6jE+cWN6QxOCsVRITxzn3oDn5Pa4tTAwxzPiwbbxnilbbs3LTU4pLF jgn8mLZZJqlJuw+DtDp+CuV9uKBKLfYuPbpF8kv4NTC5Mt4akEiBXFO8Y/82fBG99oJ8 Fia9R3WboZR+7bqmRQQswq2j871HUlv6gDGAlzxOs1Kv+cDGuVq99jWAh7hWykE04S3y K+9r+vn+VWpgK2p+H9yKfl8G9RyIsjRegUDPtc9EIWHB6VR1zs3ge0h4vxVGhrFIFeDR NxN8O3PuWXbdv8VDaNejGI/R7yfJIcZDGfNIhPonTzlUiIWoSvPLQWkRTpIvhjQIAnnV P9mw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279633; x=1706884433; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KENK9Mpj18OXyJdvgmdqz6uWTQ8A1jTnhGCoNoZ/oAs=; b=NXZq9Aqfd4G++AlwHnBeu0NN7JyBJ1b6iTxO04UkKa3XwXCGSnIc8J3pBR6+lrsXcW A9GXn+odU4RxWyN7Uqxg3SlNNDfi/GdUZNhp5tiA3eQtPpumDrKtlQRaBsZ7BhPnarwn 5Gn9Wv+QxLI9qYIPiXeoPDEN6KKz18nqxzeVrpYvqf4Cz0f8meCZ1tqSDLkAbb8f6CiZ lzSfNOhzK1/2O9/HPFF5AwZ34OANfRm7+jtdNtL9MzKT7jYHx6pRMBH7ucpDnaqPX6f8 F2DU8pYQX/q6tKeL7Hnqc62ASwB+mkLSDYEDR+YC1nru7FGZi+FuDrQenaq9r9bqSo90 P/bg== X-Gm-Message-State: AOJu0YwUx4yDDUXZ9qaxBaae8bC1dux70zyYz+8bN7gbaoPaeFDNU6Se xUDVkSZh/HIa9kI3fxOOqvhfaUSj+oIdpPWlo2uCY1UQ86zoH4li6tl9mYmM6cWBX5QB6z+Tbac e X-Google-Smtp-Source: AGHT+IFXln4FmTTuxM+HvVjtzdcSWwL2GgAhRb+NQLPYwq8EGSh5L1X9xug/j/ZMTYSosH50/fJlXA== X-Received: by 2002:a5d:6204:0:b0:337:6f4e:3833 with SMTP id y4-20020a5d6204000000b003376f4e3833mr1004795wru.12.1706279632960; Fri, 26 Jan 2024 06:33:52 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 24/36] target/arm: Expose M-profile register bank index definitions Date: Fri, 26 Jan 2024 14:33:29 +0000 Message-Id: <20240126143341.2101237-25-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279935157100011 From: Philippe Mathieu-Daud=C3=A9 The ARMv7M QDev container accesses the QDev SysTickState by its secure/non-secure bank index. In order to make the "hw/intc/armv7m_nvic.h" header target-agnostic in the next commit, first move the M-profile bank index definitions to "target/arm/cpu-qom.h". Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-16-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu-qom.h | 15 +++++++++++++++ target/arm/cpu.h | 15 --------------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index f795994135f..77bbc1f13c9 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -36,4 +36,19 @@ DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU, #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) =20 +/* For M profile, some registers are banked secure vs non-secure; + * these are represented as a 2-element array where the first element + * is the non-secure copy and the second is the secure copy. + * When the CPU does not have implement the security extension then + * only the first element is used. + * This means that the copy for the current security state can be + * accessed via env->registerfield[env->v7m.secure] (whether the security + * extension is implemented or not). + */ +enum { + M_REG_NS =3D 0, + M_REG_S =3D 1, + M_REG_NUM_BANKS =3D 2, +}; + #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 41659d0ef15..d6a79482adb 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -73,21 +73,6 @@ #define ARMV7M_EXCP_PENDSV 14 #define ARMV7M_EXCP_SYSTICK 15 =20 -/* For M profile, some registers are banked secure vs non-secure; - * these are represented as a 2-element array where the first element - * is the non-secure copy and the second is the secure copy. - * When the CPU does not have implement the security extension then - * only the first element is used. - * This means that the copy for the current security state can be - * accessed via env->registerfield[env->v7m.secure] (whether the security - * extension is implemented or not). - */ -enum { - M_REG_NS =3D 0, - M_REG_S =3D 1, - M_REG_NUM_BANKS =3D 2, -}; - /* ARM-specific interrupt pending bits. */ #define CPU_INTERRUPT_FIQ CPU_INTERRUPT_TGT_EXT_1 #define CPU_INTERRUPT_VIRQ CPU_INTERRUPT_TGT_EXT_2 --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279900; cv=none; d=zohomail.com; s=zohoarc; b=NCLraOFek7XJMbRfgtTmpxzxz/IVPYx4MSeX2vLhJHeGPmFiPKswnn5MKc53buIZe57d85r/EmCDyTYreCQ1hGe/IHjHOQsIzwGRLs8/a60hDmfYY0fpvSV1H8fgpkD9Edx2dWZjN3Xjhzrzi+HpHanR7s5xnm5TSKoOknpofmo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279900; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=VXXpoqeWUrMcxrn/dztG+5/UTCdvQjyp/SkalnZboFI=; b=b/vKA0MwgLFE9ja1I+35E410dTlPgvJO9V4YuZ9wDvytfEz8uglWQtNXJjnf3iWBkuIYeKaB6gc+eGAYiXdvdDV+kYcL6Oo6kzul0UbnVnIywpleE4JTvbQmDoVlapbCBeSh5KR+lXyJopYOV8wRPJubvn8rlQeduEAF3FNVuCY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279900041491.1897028370947; Fri, 26 Jan 2024 06:38:20 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHN-0002Tt-LI; Fri, 26 Jan 2024 09:34:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHI-0002LU-LY for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHG-0007xj-UX for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:56 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-40ee418e7edso6502205e9.2 for ; Fri, 26 Jan 2024 06:33:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279633; x=1706884433; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=VXXpoqeWUrMcxrn/dztG+5/UTCdvQjyp/SkalnZboFI=; b=aMprNKQvN3rlL2x9qwwvKNbnR7OBp9Yqk5vXrIesirQgAC7ZWTrQ2H8M2YkmPvG3qz kmQSJ7K7aTopR34FifU+N3ThHpOO7e5W+xSikExzPz3o+rVQxiAdQSNSXivyv8vJYeT5 6H6YxYU2+hkXiNQzmb/EusSNFYI5OGckqVeRhP4aSs8ERjkbRWGwXJoMcmuPt61msCLv oryLmKsa0z9R6gBxxnTpFa1nYP98uvHyrSFc80EwI2MmWNJ5qBbGtSl1ti6/EEqKecC1 uvPqNM3WaNKoqp1MQC4Ag04ZRjstSqr6BrgFqQ0cD5XKnU4AGlyqEDPlA8umtEHmXScV HIJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279633; x=1706884433; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VXXpoqeWUrMcxrn/dztG+5/UTCdvQjyp/SkalnZboFI=; b=AKOdMqlKoTI6EYW9yI+L5apMVh97aLHlFb6VEKVGRHzYnSDlx5jYp8vCjecq58qWTm 98NaHnmgd8PfQFufbrUVbjvOjUwSUc/I/NP0OxmuBquCW4zxP3pXfQ595RVimxH2nCK8 3eMn3cmBChZSvHMChl2W/WY4K5Ubr7clDWneHKV3RWpxAqoP28FlqyzEXVxUAhYrXNi4 5ZLtRDjDSIBz7Q6mQziOre/h0dHhPewqKaDLoawe4l2WOUhy1yJaoXODOw0pagBf9KE/ rLGqPc4jf9gqBBhDBaw5TfAmOAm0O0fvHY8shJR+8odbCtVCB+pYHcOmHRApQrKxQCxr 52Fg== X-Gm-Message-State: AOJu0YwMcwDhCWwKBVt+sfnHE0Vaan8diWoWyk4nZWcSD9JfHu095SJ7 +djbxW7zJ6TKRF1xH4xmG79DHuEuiSjnyjjRNhDW/U9AywMHgmUchnLtWcD5mHGgz7imJoJ9NDz R X-Google-Smtp-Source: AGHT+IFs4lSQsnfz/Sf5JbJSQsXCraaIgQARnUoxerCbfPQ4yreYxVnujAwx/RArxqACMI4FtWH7jQ== X-Received: by 2002:a05:600c:21da:b0:40e:8550:4240 with SMTP id x26-20020a05600c21da00b0040e85504240mr1042789wmj.138.1706279633378; Fri, 26 Jan 2024 06:33:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 25/36] hw/arm/armv7m: Make 'hw/intc/armv7m_nvic.h' a target agnostic header Date: Fri, 26 Jan 2024 14:33:30 +0000 Message-Id: <20240126143341.2101237-26-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279901047100013 From: Philippe Mathieu-Daud=C3=A9 Now than we can access the M-profile bank index definitions from the target-agnostic "cpu-qom.h" header, we don't need the huge "cpu.h" anymore (except in hw/arm/armv7m.c). Reduce its inclusion to the source unit. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-17-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/intc/armv7m_nvic.h | 2 +- hw/arm/armv7m.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index 6b4ae566c9a..89fe8aedaa9 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -10,7 +10,7 @@ #ifndef HW_ARM_ARMV7M_NVIC_H #define HW_ARM_ARMV7M_NVIC_H =20 -#include "target/arm/cpu.h" +#include "target/arm/cpu-qom.h" #include "hw/sysbus.h" #include "hw/timer/armv7m_systick.h" #include "qom/object.h" diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 1f218277734..edcd8adc748 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -21,6 +21,7 @@ #include "qemu/module.h" #include "qemu/log.h" #include "target/arm/idau.h" +#include "target/arm/cpu.h" #include "target/arm/cpu-features.h" #include "migration/vmstate.h" =20 --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279710; cv=none; d=zohomail.com; s=zohoarc; b=NrdunQy3XG34FSxFnSpmYFn7BkF4qfKsu4vVKGxnzqMNoV36aZouk3raX74XrXGB2YQiwaSYNNcGSH1NXH1ojo1mFSPzFJaRzpl31n4AHLZJRMJm5RpCvU3IZEvQOPQjTyYXnQW/Tnzg9klDfqNeqUhlp3IM1v5xeP2esXJWYu8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279710; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=kT4FU7BdZDSw/ALIzrvXiPFzXH+nnZjgGXux5dvXWzU=; b=gTr3qJuoLA2hS5L1Ukt+N8YxBYW8GOqHUJoWPSorDKk7azcpOCV3qLGn5wOzPhM/RusGwKUfvekbse0GRwAzWNtUjWwUqAZaVgzBKCwz7QPtpbpB+qZDjZDvqpLQAjD8VbDukCC+oPqbedw7kNrBlRkupx2dKXNrlDl6QvTOgs8= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279710811649.0462802158103; Fri, 26 Jan 2024 06:35:10 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHM-0002SV-MK; Fri, 26 Jan 2024 09:34:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHJ-0002N7-MN for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:57 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHH-0007y0-7F for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:57 -0500 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-337d99f9cdfso591105f8f.0 for ; Fri, 26 Jan 2024 06:33:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279634; x=1706884434; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=kT4FU7BdZDSw/ALIzrvXiPFzXH+nnZjgGXux5dvXWzU=; b=c7Xl2/sNXTUtr1/4+SKNJ6fPqdR7fKXe1KPPGRGnkSvGrAduSUkdjkOWBXMJBw0UNd CKDATmOMCVAQ8w0dIxcYbkgiBCf1vr49gq5WkdeMrvOhl36c95wLvYw/NQQuUPt8kxAl NTpMv0dS/GJz0aZCRKlcgi+doM5QY4rQTIYclszcJaVJILsdlRzlAgVZSj0pGNjYTV+U Dl2Q7/dqF7FMLr/edBKkSXIDiZwpiBoF6nmzMd2cCmmOgAOHVu7+Gu3M9eQIgkevtRd8 v7+TgqXuXACGHN8NkPpOK67lTxjcuooEMP8mSsbQmZqmFhwYUe4ldvT/pAVnQ0p+ZxT8 zRTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279634; x=1706884434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kT4FU7BdZDSw/ALIzrvXiPFzXH+nnZjgGXux5dvXWzU=; b=a9/4HAllDQzUPhMPfHfZkVnHywReeJHWnMCvSzEDJpowf9xWMVb+Rb3r3F0ljRNdTP gToGLSBUralLyRl2/9rG9Oq86EWR5wN5MhLMiWsxv2T0HGNS6tqDyN0BrOW9DAN7yL32 6obERsjvm0+h5/iwxIJKRTZI/WbL+LHInmstFsulpH05QHthCBFYk6pvQlQLBnF3oLmw fgtIhXe8rFQ6NL/G21pQdCRrA3/9OQ+NfUzOn1SeSe4xR8hJAqri67xVDaS96rEYrLwQ FOyalFo/d67LxpZL/uIoleCKmue+qg2wqkYruuOgtgwFEBUnJWv7deIE1DxGAMoNUbRU YMOg== X-Gm-Message-State: AOJu0Yz17LTbkzs4lGr5IdDdMX0SOJY6q3EoP+iYTXIkqFmn2qh7F35T Yk2Q0Sle9hGRFpHC0A6yacmXE1vLQ5QjjbD0cIijRUEopb8A4IbuixhCOEPr9Sx9NySHFTVgGdL 2 X-Google-Smtp-Source: AGHT+IEkiTHfQG3tdDenazw7FYn1Siu3aWSas6UF2onyIPEg4QzLqYcqHoKj1TRFblQSKARMa4oJjg== X-Received: by 2002:adf:f103:0:b0:337:bfa5:221a with SMTP id r3-20020adff103000000b00337bfa5221amr981373wro.107.1706279633775; Fri, 26 Jan 2024 06:33:53 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 26/36] target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header Date: Fri, 26 Jan 2024 14:33:31 +0000 Message-Id: <20240126143341.2101237-27-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279712611100003 From: Philippe Mathieu-Daud=C3=A9 The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handler. To allow non-ARM code to raise interrupt on ARM cores, move they to 'target/arm/cpu-qom.h' which is non-ARM specific and can be included by any hw/ file. File list to include the new header generated using: $ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)' Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-18-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu-qom.h | 6 ++++++ target/arm/cpu.h | 6 ------ hw/arm/allwinner-a10.c | 1 + hw/arm/allwinner-h3.c | 1 + hw/arm/allwinner-r40.c | 1 + hw/arm/armv7m.c | 1 + hw/arm/aspeed_ast2400.c | 1 + hw/arm/aspeed_ast2600.c | 1 + hw/arm/bcm2836.c | 1 + hw/arm/exynos4210.c | 1 + hw/arm/fsl-imx25.c | 1 + hw/arm/fsl-imx31.c | 1 + hw/arm/fsl-imx6.c | 1 + hw/arm/fsl-imx6ul.c | 1 + hw/arm/fsl-imx7.c | 1 + hw/arm/highbank.c | 1 + hw/arm/integratorcp.c | 1 + hw/arm/musicpal.c | 1 + hw/arm/npcm7xx.c | 1 + hw/arm/omap1.c | 1 + hw/arm/omap2.c | 1 + hw/arm/realview.c | 1 + hw/arm/sbsa-ref.c | 1 + hw/arm/strongarm.c | 1 + hw/arm/versatilepb.c | 1 + hw/arm/vexpress.c | 1 + hw/arm/virt.c | 1 + hw/arm/xilinx_zynq.c | 1 + hw/arm/xlnx-versal.c | 1 + hw/arm/xlnx-zynqmp.c | 1 + target/arm/cpu.c | 1 + 31 files changed, 35 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu-qom.h b/target/arm/cpu-qom.h index 77bbc1f13c9..8e032691dbf 100644 --- a/target/arm/cpu-qom.h +++ b/target/arm/cpu-qom.h @@ -36,6 +36,12 @@ DECLARE_CLASS_CHECKERS(AArch64CPUClass, AARCH64_CPU, #define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU #define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX) =20 +/* Meanings of the ARMCPU object's four inbound GPIO lines */ +#define ARM_CPU_IRQ 0 +#define ARM_CPU_FIQ 1 +#define ARM_CPU_VIRQ 2 +#define ARM_CPU_VFIQ 3 + /* For M profile, some registers are banked secure vs non-secure; * these are represented as a 2-element array where the first element * is the non-secure copy and the second is the secure copy. diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d6a79482adb..e8df41d642e 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -93,12 +93,6 @@ #define offsetofhigh32(S, M) (offsetof(S, M) + sizeof(uint32_t)) #endif =20 -/* Meanings of the ARMCPU object's four inbound GPIO lines */ -#define ARM_CPU_IRQ 0 -#define ARM_CPU_FIQ 1 -#define ARM_CPU_VIRQ 2 -#define ARM_CPU_VFIQ 3 - /* ARM-specific extra insn start words: * 1: Conditional execution bits * 2: Partial exception syndrome for data aborts diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 0135632996c..581dd45edf0 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -26,6 +26,7 @@ #include "hw/boards.h" #include "hw/usb/hcd-ohci.h" #include "hw/loader.h" +#include "target/arm/cpu-qom.h" =20 #define AW_A10_SRAM_A_BASE 0x00000000 #define AW_A10_DRAMC_BASE 0x01c01000 diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index f05afddf7e0..2d684b5287b 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -30,6 +30,7 @@ #include "hw/loader.h" #include "sysemu/sysemu.h" #include "hw/arm/allwinner-h3.h" +#include "target/arm/cpu-qom.h" =20 /* Memory map */ const hwaddr allwinner_h3_memmap[] =3D { diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index a28e5b3886a..79976b0b54d 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -33,6 +33,7 @@ #include "sysemu/sysemu.h" #include "hw/arm/allwinner-r40.h" #include "hw/misc/allwinner-r40-dramc.h" +#include "target/arm/cpu-qom.h" =20 /* Memory map */ const hwaddr allwinner_r40_memmap[] =3D { diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index edcd8adc748..7c68525a9e6 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -23,6 +23,7 @@ #include "target/arm/idau.h" #include "target/arm/cpu.h" #include "target/arm/cpu-features.h" +#include "target/arm/cpu-qom.h" #include "migration/vmstate.h" =20 /* Bitbanded IO. Each word corresponds to a single bit. */ diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c index 0baa2ff96e4..ad76035528f 100644 --- a/hw/arm/aspeed_ast2400.c +++ b/hw/arm/aspeed_ast2400.c @@ -21,6 +21,7 @@ #include "hw/i2c/aspeed_i2c.h" #include "net/net.h" #include "sysemu/sysemu.h" +#include "target/arm/cpu-qom.h" =20 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 =20 diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 3a9a303ab8b..386a88d4e0f 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -16,6 +16,7 @@ #include "hw/i2c/aspeed_i2c.h" #include "net/net.h" #include "sysemu/sysemu.h" +#include "target/arm/cpu-qom.h" =20 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 #define ASPEED_SOC_DPMCU_SIZE 0x00040000 diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index b0674a22a6c..58a78780d2b 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -15,6 +15,7 @@ #include "hw/arm/bcm2836.h" #include "hw/arm/raspi_platform.h" #include "hw/sysbus.h" +#include "target/arm/cpu-qom.h" =20 struct BCM283XClass { /*< private >*/ diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index af511a153dd..6c428d8eeb4 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -36,6 +36,7 @@ #include "hw/arm/exynos4210.h" #include "hw/sd/sdhci.h" #include "hw/usb/hcd-ehci.h" +#include "target/arm/cpu-qom.h" =20 #define EXYNOS4210_CHIPID_ADDR 0x10000000 =20 diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 9d2fb75a689..4a49507ef19 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -28,6 +28,7 @@ #include "sysemu/sysemu.h" #include "hw/qdev-properties.h" #include "chardev/char.h" +#include "target/arm/cpu-qom.h" =20 #define IMX25_ESDHC_CAPABILITIES 0x07e20000 =20 diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index c0584e4dfcd..4b8d9b8e4fe 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -26,6 +26,7 @@ #include "exec/address-spaces.h" #include "hw/qdev-properties.h" #include "chardev/char.h" +#include "target/arm/cpu-qom.h" =20 static void fsl_imx31_init(Object *obj) { diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index af2e982b052..42f90588251 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -29,6 +29,7 @@ #include "chardev/char.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "target/arm/cpu-qom.h" =20 #define IMX6_ESDHC_CAPABILITIES 0x057834b4 =20 diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index e37b69a5e16..486a009deb8 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -25,6 +25,7 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "target/arm/cpu-qom.h" =20 #define NAME_SIZE 20 =20 diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 474cfdc87c6..57281094918 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -26,6 +26,7 @@ #include "sysemu/sysemu.h" #include "qemu/error-report.h" #include "qemu/module.h" +#include "target/arm/cpu-qom.h" =20 #define NAME_SIZE 20 =20 diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index c21e18d08fd..e6e27d69af5 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -36,6 +36,7 @@ #include "qemu/log.h" #include "qom/object.h" #include "cpu.h" +#include "target/arm/cpu-qom.h" =20 #define SMP_BOOT_ADDR 0x100 #define SMP_BOOT_REG 0x40 diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 1830e1d7850..5600616a4dd 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -28,6 +28,7 @@ #include "hw/sd/sd.h" #include "qom/object.h" #include "audio/audio.h" +#include "target/arm/cpu-qom.h" =20 #define TYPE_INTEGRATOR_CM "integrator_core" OBJECT_DECLARE_SIMPLE_TYPE(IntegratorCMState, INTEGRATOR_CM) diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 6987472871e..a2d25139e20 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -39,6 +39,7 @@ #include "hw/net/mv88w8618_eth.h" #include "audio/audio.h" #include "qemu/error-report.h" +#include "target/arm/cpu-qom.h" =20 #define MP_MISC_BASE 0x80002000 #define MP_MISC_SIZE 0x00001000 diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index 7fb0a233b2d..e3243a520d8 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -26,6 +26,7 @@ #include "qapi/error.h" #include "qemu/units.h" #include "sysemu/sysemu.h" +#include "target/arm/cpu-qom.h" =20 /* * This covers the whole MMIO space. We'll use this to catch any MMIO acce= sses diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index d5438156ee9..86ee336e599 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -40,6 +40,7 @@ #include "hw/sysbus.h" #include "qemu/cutils.h" #include "qemu/bcd.h" +#include "target/arm/cpu-qom.h" =20 static inline void omap_log_badwidth(const char *funcname, hwaddr addr, in= t sz) { diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index f170728e7ec..f159fb73ea9 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -39,6 +39,7 @@ #include "hw/sysbus.h" #include "hw/boards.h" #include "audio/audio.h" +#include "target/arm/cpu-qom.h" =20 /* Enhanced Audio Controller (CODEC only) */ struct omap_eac_s { diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 132217b2edd..566deff9ced 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -30,6 +30,7 @@ #include "hw/i2c/arm_sbcon_i2c.h" #include "hw/sd/sd.h" #include "audio/audio.h" +#include "target/arm/cpu-qom.h" =20 #define SMP_BOOT_ADDR 0xe0000000 #define SMP_BOOTREG_ADDR 0x10000030 diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index b8857d1e9e4..d6081bfc41f 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -50,6 +50,7 @@ #include "net/net.h" #include "qapi/qmp/qlist.h" #include "qom/object.h" +#include "target/arm/cpu-qom.h" =20 #define RAMLIMIT_GB 8192 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB) diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index fef3638acaa..75637869cba 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -46,6 +46,7 @@ #include "qemu/cutils.h" #include "qemu/log.h" #include "qom/object.h" +#include "target/arm/cpu-qom.h" =20 //#define DEBUG =20 diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 4b2257787b2..15b5ed0cedc 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -27,6 +27,7 @@ #include "hw/sd/sd.h" #include "qom/object.h" #include "audio/audio.h" +#include "target/arm/cpu-qom.h" =20 #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index fd981f4c33e..49dbcdcbf0c 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -46,6 +46,7 @@ #include "qapi/qmp/qlist.h" #include "qom/object.h" #include "audio/audio.h" +#include "target/arm/cpu-qom.h" =20 #define VEXPRESS_BOARD_ID 0x8e0 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1e0df6ea3ad..64802446cb1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -73,6 +73,7 @@ #include "standard-headers/linux/input.h" #include "hw/arm/smmuv3.h" #include "hw/acpi/acpi.h" +#include "target/arm/cpu-qom.h" #include "target/arm/internals.h" #include "target/arm/multiprocessing.h" #include "hw/mem/pc-dimm.h" diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index d4c817ecdc0..5809fc32af9 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -38,6 +38,7 @@ #include "sysemu/reset.h" #include "qom/object.h" #include "exec/tswap.h" +#include "target/arm/cpu-qom.h" =20 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9") OBJECT_DECLARE_SIMPLE_TYPE(ZynqMachineState, ZYNQ_MACHINE) diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 9600551c442..87fdb39d430 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -23,6 +23,7 @@ #include "hw/misc/unimp.h" #include "hw/arm/xlnx-versal.h" #include "qemu/log.h" +#include "target/arm/cpu-qom.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 5905a330151..38cb34942f8 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -25,6 +25,7 @@ #include "sysemu/kvm.h" #include "sysemu/sysemu.h" #include "kvm_arm.h" +#include "target/arm/cpu-qom.h" =20 #define GIC_NUM_SPI_INTR 160 =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 04296f2928f..4807a4fea0d 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -48,6 +48,7 @@ #include "disas/capstone.h" #include "fpu/softfloat.h" #include "cpregs.h" +#include "target/arm/cpu-qom.h" =20 static void arm_cpu_set_pc(CPUState *cs, vaddr value) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279634; x=1706884434; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=VH/lIqQG7z5pWQD+ZUbSPEPHh0W87PjWxNhH7leqI34=; b=pxfbL3x8liC28yBalDVO78fNqAm7S8D306lWonqpSmdm6Vyks6Bves3hGmcz/KzCmv P2qpLPLEaK0N9I8wsr22xqPaF68OPopufXme4NWmUdsS814MnpDN4yTerswCPumcUT5i yr1x8poFxiMPxKoUZznpz0fbYVgSUuArzgiGQNXTFCqOLgM6Fvmg8KZKzvQRZH4RxDc1 i/wHTgO6KTxjHHL8faPYe8SzV4KRKDJaeTg/zUGXzNMdJCnsuU1OJtCi47KZGz3ZTt3r zgOFV44+UniVmE8QLOKg46dUPeOnNJ07KXRH68KM39dEW51xiP+BdTf2/mw3w6rboAhC 2n5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279634; x=1706884434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VH/lIqQG7z5pWQD+ZUbSPEPHh0W87PjWxNhH7leqI34=; b=dSpS8raMJr2OA7BoaPOp+a4u3pRQoQDTDyDP3gk7+CP6TNU+uWWNnMR2opRqMUqNhY hnnrwbrU/cA+asGc4+lxKTVt8qyUTO1sAhiScAXlaZ6hVISlbVgEyP1/Tk5yljJPZPIc IY3oYudK8FaldJjP0zuksfpZOyn4wo1tte/BKAxd2EUTdaXUMjY4StV3jhA1Qc/JnKF+ 759ZoRY3+Gnz4BC7tW5DgIx+/0/LklgQuC7ryTxNY+Z1xz+m82vx4rx6c/dN0EEVPFx4 z4dgjMUbcXqXEmkWMYcG0N6JPaB+oNU9Jt7s0A2N5bxDMfRQdf94c61nfCD/hGlTZ4Ve B50Q== X-Gm-Message-State: AOJu0YyooSJSOLFLLbo+QzGSKZ2/HXRCTmYWAhp8cuTKeHYnuHR94NI8 RBQZuo1bUgd+6Ci4cUvHMkyBre1oxQoPtNwHU0kJMNpJ3So26MC2/vt7bsIE2h0TaV9l/uOxEec J X-Google-Smtp-Source: AGHT+IGy5UZwvZDf5pZzkB0r4UefF+sGlNxHPMje43sV/A8kXJ6MOA4HNTyLzgHca3dfAkHGOkdMxA== X-Received: by 2002:a05:6000:1a54:b0:337:c409:717d with SMTP id t20-20020a0560001a5400b00337c409717dmr560655wry.159.1706279634193; Fri, 26 Jan 2024 06:33:54 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 27/36] target/arm: Move e2h_access() helper around Date: Fri, 26 Jan 2024 14:33:32 +0000 Message-Id: <20240126143341.2101237-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279955398100022 From: Philippe Mathieu-Daud=C3=A9 e2h_access() was added in commit bb5972e439 ("target/arm: Add VHE timer register redirection and aliasing") close to the generic_timer_cp_reginfo[] array, but isn't used until vhe_reginfo[] definition. Move it closer to the other e2h helpers. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-19-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e068d353831..e07b2af8a3d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3345,20 +3345,6 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[]= =3D { }, }; =20 -static CPAccessResult e2h_access(CPUARMState *env, const ARMCPRegInfo *ri, - bool isread) -{ - if (arm_current_el(env) =3D=3D 1) { - /* This must be a FEAT_NV access */ - /* TODO: FEAT_ECV will need to check CNTHCTL_EL2 here */ - return CP_ACCESS_OK; - } - if (!(arm_hcr_el2_eff(env) & HCR_E2H)) { - return CP_ACCESS_TRAP; - } - return CP_ACCESS_OK; -} - #else =20 /* @@ -6546,6 +6532,21 @@ static const ARMCPRegInfo el3_cp_reginfo[] =3D { }; =20 #ifndef CONFIG_USER_ONLY + +static CPAccessResult e2h_access(CPUARMState *env, const ARMCPRegInfo *ri, + bool isread) +{ + if (arm_current_el(env) =3D=3D 1) { + /* This must be a FEAT_NV access */ + /* TODO: FEAT_ECV will need to check CNTHCTL_EL2 here */ + return CP_ACCESS_OK; + } + if (!(arm_hcr_el2_eff(env) & HCR_E2H)) { + return CP_ACCESS_TRAP; + } + return CP_ACCESS_OK; +} + /* Test if system register redirection is to occur in the current state. = */ static bool redirect_for_e2h(CPUARMState *env) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279932; cv=none; d=zohomail.com; s=zohoarc; b=mUD5SdpjThHjl78AXwJfvyM5IENJTUBLjS0wqUN6TzX3G7zT4sm7FAA2vGgaW7PTixUSWwaE9vwDIqqHJmd56/UFIuAQ/VyE7+QUDWqK0fGm8h/ukUWovjimGo23MhCYcCZ4ePu0VY/WIpf8S4YdK0xvIhb1j6GeFIxBIkDtdLg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279932; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=2Ij/Lp2rwQRGvyHfQ52tPmKqtKK6wJgy1701b00v8tA=; b=gr4oSG5hDit8rYXou9JqJ1TqQIVgidGTIyUEQLDMC88+KxEdQ8Gyy03rmRXMW0MK2YfRvZdl6S2WnQS/JXySywf/ce8na2ho2jW4C/NB/UJcZZRuBOptvJyGSDxLEX8EnpKiuGtwBFRvi+RBmStNtN1kejxSR3N2O8mCzG8v5Is= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279932744153.28823197167594; Fri, 26 Jan 2024 06:38:52 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHN-0002Tv-UX; Fri, 26 Jan 2024 09:34:01 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHK-0002Oh-H3 for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:58 -0500 Received: from mail-lf1-x12f.google.com ([2a00:1450:4864:20::12f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHI-0007yR-FJ for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:58 -0500 Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-51022133a84so547269e87.3 for ; Fri, 26 Jan 2024 06:33:56 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279635; x=1706884435; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=2Ij/Lp2rwQRGvyHfQ52tPmKqtKK6wJgy1701b00v8tA=; b=I1AEzOtkca1H6QB9YMQgHE6BmfT1Gq6TEikBujMreGN9h0ZV4LapbHPf8ZSZ0RwEQd fUeE9vrvXdegBoppkUXhR92JTYuyUAbQ/nrLtyqL5e6WFpEcV5Cw2jgdcDmJ9zdOdrCD AnRvIzgPsNIOJ5EVFg5srIuxp6j45hKkQUm0IL1KCLksTpDs/SL7Q6k1yD1kcl4uwd4q UUcJ3Ok7BgQZKsWZ/y5P21oo6qsy33EbyxWcVF7aIR7UJyqrZsTQt75nJIwNtgd3CdBh zYmVDNqrSZdOzi0lfz2h3Y2wTu4whIre3wGncM3T5kuNV9KrYBNhIxU1r8VTLWJVL7tj eQoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279635; x=1706884435; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2Ij/Lp2rwQRGvyHfQ52tPmKqtKK6wJgy1701b00v8tA=; b=Z12+sIaB/eP0W63iuGyw+pNX05grS5iTxpPK548wtYKa+6+5VHiQbOOv4XHQ9KGGzl 59wrdCnCC5EZEXGga+97A1SW1jw6lXzsoWspAkyR0X0V9LxF+QTxKGnVgAe0cd2qMvho 0W4GF95a+qaRl8EplFlrxUU4tqu6q1Pf0JAz7cJ9B905h8B0ka/43hodlDzttYZFZUwd 4boRv3ri1r0M/VrvQM0AyTkm0addzTx8Tge6ryTgUdMCSyvAn3aIqfndMpBf2o2AvPwp jhX++87oZzPhthVQ6a9QH/p6VsWa7Jte4mT0jMxUPyahLKHrlQSzX2fXPP7dm/ZP3rny knFw== X-Gm-Message-State: AOJu0YykivUf7KvUnk+eRxQ1u0OP/Jokwm4Xde8Tw7Dq2x7U35VfB3q+ colHo1NJdUXtKnCIBicGdbddW7ZSQIh4ksQU744fJytHT384WxN99+C0C/bx6FxrphF5l4yD6aI E X-Google-Smtp-Source: AGHT+IE+vDKB1/n/Pi8H2pPK0D4rZCrOUUpWQHl4846JXYxjSlfZ7hWuN5lW0j+UElxYflluhLHAYQ== X-Received: by 2002:a05:6512:6d5:b0:510:ca7:dcca with SMTP id u21-20020a05651206d500b005100ca7dccamr2056420lff.40.1706279634596; Fri, 26 Jan 2024 06:33:54 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 28/36] target/arm: Move GTimer definitions to new 'gtimer.h' header Date: Fri, 26 Jan 2024 14:33:33 +0000 Message-Id: <20240126143341.2101237-29-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=peter.maydell@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279933163100001 From: Philippe Mathieu-Daud=C3=A9 Move Arm A-class Generic Timer definitions to the new "target/arm/gtimer.h" header so units in hw/ which don't need access to ARMCPU internals can use them without having to include the huge "cpu.h". Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-20-philmd@linaro.org Signed-off-by: Peter Maydell --- target/arm/cpu.h | 8 +------- target/arm/gtimer.h | 21 +++++++++++++++++++++ hw/arm/allwinner-h3.c | 1 + hw/arm/allwinner-r40.c | 1 + hw/arm/bcm2836.c | 1 + hw/arm/sbsa-ref.c | 1 + hw/arm/virt.c | 1 + hw/arm/xlnx-versal.c | 1 + hw/arm/xlnx-zynqmp.c | 1 + hw/cpu/a15mpcore.c | 1 + target/arm/cpu.c | 1 + target/arm/helper.c | 1 + target/arm/hvf/hvf.c | 1 + target/arm/kvm.c | 1 + target/arm/machine.c | 1 + 15 files changed, 35 insertions(+), 7 deletions(-) create mode 100644 target/arm/gtimer.h diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e8df41d642e..d3477b16018 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -27,6 +27,7 @@ #include "exec/cpu-defs.h" #include "qapi/qapi-types-common.h" #include "target/arm/multiprocessing.h" +#include "target/arm/gtimer.h" =20 /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) @@ -140,13 +141,6 @@ typedef struct ARMGenericTimer { uint64_t ctl; /* Timer Control register */ } ARMGenericTimer; =20 -#define GTIMER_PHYS 0 -#define GTIMER_VIRT 1 -#define GTIMER_HYP 2 -#define GTIMER_SEC 3 -#define GTIMER_HYPVIRT 4 -#define NUM_GTIMERS 5 - #define VTCR_NSW (1u << 29) #define VTCR_NSA (1u << 30) #define VSTCR_SW VTCR_NSW diff --git a/target/arm/gtimer.h b/target/arm/gtimer.h new file mode 100644 index 00000000000..b992941bef1 --- /dev/null +++ b/target/arm/gtimer.h @@ -0,0 +1,21 @@ +/* + * ARM generic timer definitions for Arm A-class CPU + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#ifndef TARGET_ARM_GTIMER_H +#define TARGET_ARM_GTIMER_H + +enum { + GTIMER_PHYS =3D 0, + GTIMER_VIRT =3D 1, + GTIMER_HYP =3D 2, + GTIMER_SEC =3D 3, + GTIMER_HYPVIRT =3D 4, +#define NUM_GTIMERS 5 +}; + +#endif diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c index 2d684b5287b..380e0ec11d6 100644 --- a/hw/arm/allwinner-h3.c +++ b/hw/arm/allwinner-h3.c @@ -31,6 +31,7 @@ #include "sysemu/sysemu.h" #include "hw/arm/allwinner-h3.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 /* Memory map */ const hwaddr allwinner_h3_memmap[] =3D { diff --git a/hw/arm/allwinner-r40.c b/hw/arm/allwinner-r40.c index 79976b0b54d..eef1fc196e5 100644 --- a/hw/arm/allwinner-r40.c +++ b/hw/arm/allwinner-r40.c @@ -34,6 +34,7 @@ #include "hw/arm/allwinner-r40.h" #include "hw/misc/allwinner-r40-dramc.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 /* Memory map */ const hwaddr allwinner_r40_memmap[] =3D { diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index 58a78780d2b..e3ba18a8ec1 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -16,6 +16,7 @@ #include "hw/arm/raspi_platform.h" #include "hw/sysbus.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 struct BCM283XClass { /*< private >*/ diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index d6081bfc41f..85cb68d5463 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -51,6 +51,7 @@ #include "qapi/qmp/qlist.h" #include "qom/object.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 #define RAMLIMIT_GB 8192 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 64802446cb1..e6ead2c5c89 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -76,6 +76,7 @@ #include "target/arm/cpu-qom.h" #include "target/arm/internals.h" #include "target/arm/multiprocessing.h" +#include "target/arm/gtimer.h" #include "hw/mem/pc-dimm.h" #include "hw/mem/nvdimm.h" #include "hw/acpi/generic_event_device.h" diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 87fdb39d430..2798df3730d 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -24,6 +24,7 @@ #include "hw/arm/xlnx-versal.h" #include "qemu/log.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 38cb34942f8..65901c6e74b 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -26,6 +26,7 @@ #include "sysemu/sysemu.h" #include "kvm_arm.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 #define GIC_NUM_SPI_INTR 160 =20 diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index bfd8aa56448..967d8d3dd50 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -26,6 +26,7 @@ #include "hw/qdev-properties.h" #include "sysemu/kvm.h" #include "kvm_arm.h" +#include "target/arm/gtimer.h" =20 static void a15mp_priv_set_irq(void *opaque, int irq, int level) { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4807a4fea0d..b60e1030469 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -49,6 +49,7 @@ #include "fpu/softfloat.h" #include "cpregs.h" #include "target/arm/cpu-qom.h" +#include "target/arm/gtimer.h" =20 static void arm_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target/arm/helper.c b/target/arm/helper.c index e07b2af8a3d..945d8571a61 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -30,6 +30,7 @@ #include "semihosting/common-semi.h" #endif #include "cpregs.h" +#include "target/arm/gtimer.h" =20 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */ =20 diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 71a26db1886..e5f0f60093e 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -29,6 +29,7 @@ #include "target/arm/cpu.h" #include "target/arm/internals.h" #include "target/arm/multiprocessing.h" +#include "target/arm/gtimer.h" #include "trace/trace-target_arm_hvf.h" #include "migration/vmstate.h" =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8f52b211f9a..81813030a5a 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -38,6 +38,7 @@ #include "qemu/log.h" #include "hw/acpi/acpi.h" #include "hw/acpi/ghes.h" +#include "target/arm/gtimer.h" =20 const KVMCapabilityInfo kvm_arch_required_capabilities[] =3D { KVM_CAP_LAST_INFO diff --git a/target/arm/machine.c b/target/arm/machine.c index 542be14bec2..9d7dbaea54c 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -7,6 +7,7 @@ #include "internals.h" #include "cpu-features.h" #include "migration/cpu.h" +#include "target/arm/gtimer.h" =20 static bool vfp_needed(void *opaque) { --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279886; cv=none; d=zohomail.com; s=zohoarc; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279635; x=1706884435; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=wxNpb57lzKyDUqz5nfLTlsDm3aDJ+DN5wdvRGUfEGN4=; b=REzn6rKAosMrgSryymnl3TAeP4+CSShGJ/tkYAT+UII+i4u4Z5pb3rzzKf+uL0UWf3 QnuaHL0Ip2aaKEj83ejuAs+lhQOBOqVKSP8taQlzSVRnZmrxplyYHpCFXhJadbTHt9KS xV0r+ASAXmbNiwv79Fq59Lc0ImJ5VdzQ5agvQYI21d112j7C4Br8adNV9E/iF1a7ciwO 4xD53djt8WjYoe+wccvbg/lUNs3hAYbyfDNEDUlWjWM3XH1+WHOriHjwSzIWP8FUiMg6 0SVgZPr7TG5uNkKdrHjD1xAfwXUSd1NdhwNZpGalm+0T7GVkfvWjVILbTndsa1BdBf9h ACKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279635; x=1706884435; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wxNpb57lzKyDUqz5nfLTlsDm3aDJ+DN5wdvRGUfEGN4=; b=BDWlOvl2mAfqFgcJ7tEuVJyszcRWT9QfzoPFNkayhxAtt83UttjB7PH26/RuZsXXe4 +TvJ5dBOD0TwxGFWMALIybrd76o/XXiw0aY5y1k39zd4AYG2Z8JXb29PiTawxr8wlpWi dkwQXD044KY9KoYFkxQk60FrxvaoxMfnIQSl5e9JbUQjYcHrDlr83GnquXQtO6X5bDLJ oINEvNMSONylOsPLSEOjnzWYRTn/AT8AULOGlBv4ZKcD4otH+TZrzx3lAu0iNuiho2Su YaoyuIr2cBm53luwcbUhuKqTRRmF9m7+gbhOiqB9E7hkXrcKYaAS9fFDkOmBvl8FOXtx EA4Q== X-Gm-Message-State: AOJu0YxfTj2pUbq0LpwPB8aPb7D0p14/pVjOWBFZwWUSA5SkXxskPf+a LPOdd3uwmKT7p7MCiZael3ReLwZ/UcZGHHG6j2w+3qilqZAS2i/zxes3Y9lRXPjEjpDToG35ZXE Y X-Google-Smtp-Source: AGHT+IFUXzwvvChInzHxupbVq2/JM4/22ZXMNN5FZHhi0NwQ+f+fNlFrPkmS0YPfS6ynOIyOvKyJdA== X-Received: by 2002:a5d:660a:0:b0:339:2ba9:dda2 with SMTP id n10-20020a5d660a000000b003392ba9dda2mr953308wru.116.1706279635098; Fri, 26 Jan 2024 06:33:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 29/36] hw/arm: Build various units only once Date: Fri, 26 Jan 2024 14:33:34 +0000 Message-Id: <20240126143341.2101237-30-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279887064100001 From: Philippe Mathieu-Daud=C3=A9 Various files in hw/arm/ don't require "cpu.h" anymore. Except virt-acpi-build.c, all of them don't require any ARM specific knowledge anymore and can be build once as target agnostic units. Update meson accordingly. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 20240118200643.29037-21-philmd@linaro.org Signed-off-by: Peter Maydell --- hw/arm/collie.c | 1 - hw/arm/gumstix.c | 1 - hw/arm/integratorcp.c | 1 - hw/arm/mainstone.c | 1 - hw/arm/musicpal.c | 1 - hw/arm/omap2.c | 1 - hw/arm/omap_sx1.c | 1 - hw/arm/palm.c | 1 - hw/arm/spitz.c | 1 - hw/arm/strongarm.c | 1 - hw/arm/versatilepb.c | 1 - hw/arm/vexpress.c | 1 - hw/arm/virt-acpi-build.c | 1 - hw/arm/xilinx_zynq.c | 1 - hw/arm/xlnx-versal-virt.c | 1 - hw/arm/z2.c | 1 - hw/arm/meson.build | 23 ++++++++++++----------- 17 files changed, 12 insertions(+), 27 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index a0ad1b8dc7e..eaa5c52d45a 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -17,7 +17,6 @@ #include "hw/arm/boot.h" #include "hw/block/flash.h" #include "exec/address-spaces.h" -#include "cpu.h" #include "qom/object.h" #include "qemu/error-report.h" =20 diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 2ca4140c9fc..3f2bcaa24e4 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -44,7 +44,6 @@ #include "hw/boards.h" #include "exec/address-spaces.h" #include "sysemu/qtest.h" -#include "cpu.h" =20 #define CONNEX_FLASH_SIZE (16 * MiB) #define CONNEX_RAM_SIZE (64 * MiB) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 5600616a4dd..793262eca8c 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -9,7 +9,6 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "cpu.h" #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/boards.h" diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index 68329c46178..fc14e050608 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -23,7 +23,6 @@ #include "hw/block/flash.h" #include "hw/sysbus.h" #include "exec/address-spaces.h" -#include "cpu.h" =20 /* Device addresses */ #define MST_FPGA_PHYS 0x08000000 diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index a2d25139e20..0fe0160b48b 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -12,7 +12,6 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" -#include "cpu.h" #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/boot.h" diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index f159fb73ea9..d9683276c68 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "qemu/error-report.h" #include "qapi/error.h" -#include "cpu.h" #include "exec/address-spaces.h" #include "sysemu/blockdev.h" #include "sysemu/qtest.h" diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c index 4bf1579f8c1..62d7915fb8f 100644 --- a/hw/arm/omap_sx1.c +++ b/hw/arm/omap_sx1.c @@ -35,7 +35,6 @@ #include "hw/block/flash.h" #include "sysemu/qtest.h" #include "exec/address-spaces.h" -#include "cpu.h" #include "qemu/cutils.h" #include "qemu/error-report.h" =20 diff --git a/hw/arm/palm.c b/hw/arm/palm.c index b86f2c331bb..8c4c8316140 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -29,7 +29,6 @@ #include "hw/input/tsc2xxx.h" #include "hw/irq.h" #include "hw/loader.h" -#include "cpu.h" #include "qemu/cutils.h" #include "qom/object.h" #include "qemu/error-report.h" diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 1d680b61e24..643a02b1807 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -33,7 +33,6 @@ #include "hw/adc/max111x.h" #include "migration/vmstate.h" #include "exec/address-spaces.h" -#include "cpu.h" #include "qom/object.h" #include "audio/audio.h" =20 diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 75637869cba..7fd99a0f144 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -28,7 +28,6 @@ */ =20 #include "qemu/osdep.h" -#include "cpu.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index 15b5ed0cedc..1d813aa23b5 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -9,7 +9,6 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" -#include "cpu.h" #include "hw/sysbus.h" #include "migration/vmstate.h" #include "hw/arm/boot.h" diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 49dbcdcbf0c..f1b45245d5d 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -24,7 +24,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/datadir.h" -#include "cpu.h" #include "hw/sysbus.h" #include "hw/arm/boot.h" #include "hw/arm/primecell.h" diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 43ccc60f43c..17aeec7a6f5 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -32,7 +32,6 @@ #include "qemu/error-report.h" #include "trace.h" #include "hw/core/cpu.h" -#include "target/arm/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" #include "hw/nvram/fw_cfg_acpi.h" diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 5809fc32af9..66d0de139f2 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -18,7 +18,6 @@ #include "qemu/osdep.h" #include "qemu/units.h" #include "qapi/error.h" -#include "cpu.h" #include "hw/sysbus.h" #include "hw/arm/boot.h" #include "net/net.h" diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 29f4d2c2dce..94942c55dff 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -16,7 +16,6 @@ #include "hw/boards.h" #include "hw/sysbus.h" #include "hw/arm/fdt.h" -#include "cpu.h" #include "hw/qdev-properties.h" #include "hw/arm/xlnx-versal.h" #include "hw/arm/boot.h" diff --git a/hw/arm/z2.c b/hw/arm/z2.c index 83741a49092..a67fba2cfd2 100644 --- a/hw/arm/z2.c +++ b/hw/arm/z2.c @@ -25,7 +25,6 @@ #include "hw/audio/wm8750.h" #include "audio/audio.h" #include "exec/address-spaces.h" -#include "cpu.h" #include "qom/object.h" #include "qapi/error.h" =20 diff --git a/hw/arm/meson.build b/hw/arm/meson.build index bb92b27db3e..c4017790670 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -9,23 +9,14 @@ arm_ss.add(when: 'CONFIG_INTEGRATOR', if_true: files('int= egratorcp.c')) arm_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mainstone.c')) arm_ss.add(when: 'CONFIG_MICROBIT', if_true: files('microbit.c')) arm_ss.add(when: 'CONFIG_MUSICPAL', if_true: files('musicpal.c')) -arm_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c')) arm_ss.add(when: 'CONFIG_NETDUINOPLUS2', if_true: files('netduinoplus2.c')) arm_ss.add(when: 'CONFIG_OLIMEX_STM32_H405', if_true: files('olimex-stm32-= h405.c')) arm_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx.c', 'npcm7xx_bo= ards.c')) arm_ss.add(when: 'CONFIG_NSERIES', if_true: files('nseries.c')) -arm_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c')) -arm_ss.add(when: 'CONFIG_CHEETAH', if_true: files('palm.c')) -arm_ss.add(when: 'CONFIG_GUMSTIX', if_true: files('gumstix.c')) -arm_ss.add(when: 'CONFIG_SPITZ', if_true: files('spitz.c')) -arm_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c')) arm_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview.c')) arm_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa-ref.c')) arm_ss.add(when: 'CONFIG_STELLARIS', if_true: files('stellaris.c')) arm_ss.add(when: 'CONFIG_STM32VLDISCOVERY', if_true: files('stm32vldiscove= ry.c')) -arm_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c')) -arm_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c')) -arm_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c')) arm_ss.add(when: 'CONFIG_ZYNQ', if_true: files('xilinx_zynq.c')) arm_ss.add(when: 'CONFIG_SABRELITE', if_true: files('sabrelite.c')) =20 @@ -33,8 +24,7 @@ arm_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m= .c')) arm_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210.c')) arm_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c', 'pxa2xx_gpio.= c', 'pxa2xx_pic.c')) arm_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic.c')) -arm_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c', 'omap2.c')) -arm_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c')) +arm_ss.add(when: 'CONFIG_OMAP', if_true: files('omap1.c')) arm_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('allwinner-a10.c',= 'cubieboard.c')) arm_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3.c', '= orangepi.c')) arm_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40.c',= 'bananapi_m2u.c')) @@ -69,8 +59,19 @@ arm_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf= 51_soc.c')) arm_ss.add(when: 'CONFIG_XEN', if_true: files('xen_arm.c')) =20 system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c')) +system_ss.add(when: 'CONFIG_CHEETAH', if_true: files('palm.c')) +system_ss.add(when: 'CONFIG_COLLIE', if_true: files('collie.c')) system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c')) +system_ss.add(when: 'CONFIG_GUMSTIX', if_true: files('gumstix.c')) +system_ss.add(when: 'CONFIG_NETDUINO2', if_true: files('netduino2.c')) +system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap2.c')) system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'= )) +system_ss.add(when: 'CONFIG_SPITZ', if_true: files('spitz.c')) +system_ss.add(when: 'CONFIG_STRONGARM', if_true: files('strongarm.c')) +system_ss.add(when: 'CONFIG_SX1', if_true: files('omap_sx1.c')) system_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c')) +system_ss.add(when: 'CONFIG_VERSATILE', if_true: files('versatilepb.c')) +system_ss.add(when: 'CONFIG_VEXPRESS', if_true: files('vexpress.c')) +system_ss.add(when: 'CONFIG_Z2', if_true: files('z2.c')) =20 hw_arch +=3D {'arm': arm_ss} --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279952; cv=none; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279635; x=1706884435; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=eZpEnAeJf53ixh3kz2oebZYqrcVt+0YUC5baVJx1ZCE=; b=MOPEiymwOLR5akSKbdgGs9zAfxR9UWsfclcrQbx3U5rKA0x2ci4TOCC0/nwJNDDN2o Odj4U2HofMgj0eG15Z0Q/nHUjRY+mSMyfBjQJ47t42hEafqnwlvzBwsAWSZxRtdIkrkQ uh+zyxzw6GkyPAxfCojzXcnTnJ35lS9RPVvg0X6Xloedh6wtORCZNS3mBWq5d7cUvlBn pUGV2Mi20N6lszQ/KZ2BTWZrhN+Nbj1XoL51DrZw+7JAZV0dcatbJ9FSpxu0bBkxX7mZ aihAyR0/Bd0BRbtW8eR+VNXv1uPOm+gTQaC/COwDJt8bUE5623mA7WRd3DUw+5tm+q+F YKQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279635; x=1706884435; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eZpEnAeJf53ixh3kz2oebZYqrcVt+0YUC5baVJx1ZCE=; b=aaO4f1jArDiju1Ey65vjHar7KXyp5RufypUMod3sjL9ArpVLH9RWEK4kzJhEZEaUFt sig92g/i0noQfgcOkzU9uXwvZP76lXd9jFXbtWnx818BVPTXSjmYktPsJ0lCbG1ofLOz DH3JVptvM5009sosBU1nsT0rypjEi0ZHqXd3x0Qv/L258Y5oFxI1hvp/JaFdwpo2hiLo 0lF5Lk7EEQ16iRXSq/WRDhwb3d9XljmNM3ge29ZZ3ZHS3bBmBNs90H8s6O/R8XVV/cMO +lVSNH62obhb5khRBDlzBZxJzx5RP4qIu4h4X3hg2PRgvDtRWc5lH/ENZqrPiYPABKMZ gHhw== X-Gm-Message-State: AOJu0YyM9Bu2j4BN1qGXjj09LvyE7h6Wy2IvpjGAWL1is6ktrH4KRV3r hpG3BkOuTts2wQiTK6EdbAR9PsjoTv2rxrS+EVg2SNhOj7BQznYn0R3VvItVjsG06i064GUS5ch x X-Google-Smtp-Source: AGHT+IGgDeqPPldGOCcki9hFSfUDRsMg3C+p1Xn8qdFb3ej5mHljqC7bqWR9gmq8R96xe39bTfImmQ== X-Received: by 2002:adf:a486:0:b0:337:abfd:6058 with SMTP id g6-20020adfa486000000b00337abfd6058mr682127wrb.74.1706279635690; Fri, 26 Jan 2024 06:33:55 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 30/36] fsl-imx6ul: Add various missing unimplemented devices Date: Fri, 26 Jan 2024 14:33:35 +0000 Message-Id: <20240126143341.2101237-31-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279953302100006 From: Guenter Roeck Add MMDC, OCOTP, SQPI, CAAM, and USBMISC as unimplemented devices. This allows operating systems such as Linux to run emulations such as mcimx6ul-evk. Before commit 0cd4926b85 ("Refactor i.MX6UL processor code"), the affected memory ranges were covered by the unimplemented DAP device. The commit reduced the DAP address range from 0x100000 to 4kB, and the emulation thus no longer covered the various unimplemented devices in the affected address range. Fixes: 0cd4926b85 ("Refactor i.MX6UL processor code") Cc: Jean-Christophe Dubois Signed-off-by: Guenter Roeck Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20240120005356.2599547-1-linux@roeck-us.net Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6ul.h | 2 ++ hw/arm/fsl-imx6ul.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index 14390f60144..8277b0e8b2c 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -182,6 +182,8 @@ enum FslIMX6ULMemoryMap { FSL_IMX6UL_ENET1_ADDR =3D 0x02188000, =20 FSL_IMX6UL_USBO2_USBMISC_ADDR =3D 0x02184800, + FSL_IMX6UL_USBO2_USBMISC_SIZE =3D 0x200, + FSL_IMX6UL_USBO2_USB1_ADDR =3D 0x02184000, FSL_IMX6UL_USBO2_USB2_ADDR =3D 0x02184200, =20 diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c index 486a009deb8..343bd65d1b2 100644 --- a/hw/arm/fsl-imx6ul.c +++ b/hw/arm/fsl-imx6ul.c @@ -193,6 +193,36 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error= **errp) create_unimplemented_device("a7mpcore-dap", FSL_IMX6UL_A7MPCORE_DAP_AD= DR, FSL_IMX6UL_A7MPCORE_DAP_SIZE); =20 + /* + * MMDC + */ + create_unimplemented_device("a7mpcore-mmdc", FSL_IMX6UL_MMDC_CFG_ADDR, + FSL_IMX6UL_MMDC_CFG_SIZE); + + /* + * OCOTP + */ + create_unimplemented_device("a7mpcore-ocotp", FSL_IMX6UL_OCOTP_CTRL_AD= DR, + FSL_IMX6UL_OCOTP_CTRL_SIZE); + + /* + * QSPI + */ + create_unimplemented_device("a7mpcore-qspi", FSL_IMX6UL_QSPI_ADDR, + FSL_IMX6UL_QSPI_SIZE); + + /* + * CAAM + */ + create_unimplemented_device("a7mpcore-qspi", FSL_IMX6UL_CAAM_ADDR, + FSL_IMX6UL_CAAM_SIZE); + + /* + * USBMISC + */ + create_unimplemented_device("a7mpcore-usbmisc", FSL_IMX6UL_USBO2_USBMI= SC_ADDR, + FSL_IMX6UL_USBO2_USBMISC_SIZE); + /* * GPTs */ --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279905; cv=none; d=zohomail.com; s=zohoarc; b=gPobKgAcn92PyBSqjJWqb8zgwbXTWpsYI6hkXH5+yen6x8nuKbJt2ghqXpzTEVuTTHfVJlQ1JDudEKdFv4jnZMKG2HO+z0Pd6LAF9Hv7HWEqm+M2Rj6meu+MHX4u5JFWS8gciqtnJCsU16HgPuVze1xKcM8gPZRx3IihKxgmUMQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279905; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=CbytbZE5r6VKI1aTBZEBghdNkVDSmRfkbInRbv2Plj8=; b=C4YdmBTyrAH7TmGhi/ullSUnp9v0fRGmlTDrvdiZ9F3mER+acsePf/v3cFQv3ORlcFUoFj9NQKAc9cKq5kyBbbLzAjHGRtDHAHPLga4p+pv8emJ4Yf1zBk3wazFl1ZLw8f1Agyx24e1CFdYEr/iYLXL4MwVqEBtdN1HfUM4zf7A= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279905844814.1620522061957; Fri, 26 Jan 2024 06:38:25 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHO-0002XK-E5; Fri, 26 Jan 2024 09:34:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHL-0002RO-J4 for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:59 -0500 Received: from mail-lf1-x12f.google.com ([2a00:1450:4864:20::12f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHJ-0007z3-St for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:59 -0500 Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-510218ab26fso724719e87.2 for ; Fri, 26 Jan 2024 06:33:57 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279636; x=1706884436; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=CbytbZE5r6VKI1aTBZEBghdNkVDSmRfkbInRbv2Plj8=; b=ZqeJ10taPdCjvez4CdoAUJCaxLsAXocrTWkQJQP/bw+L6l1WZpQHqOzzauTL/HgCfH NSMRt7OnyYGn2OJf0xZN1KZxB7Ac3k+RqyJlbIS9Vq3AnUatSO9Yr4Ka0C7+dfkBEb3Q U9kqHop0YtnZKhdJF8kSrTzoZ3cM/1qnJN/bGWh8RjvLyyfSySOiXCE272L0BNNQLK0+ YRaDa+fTZ3l52EbrNqDdNtDYJYajvEoeEkKIQTX1OQDwxrL/LriWCYqLDBmTnrIG3iAX 7AeHBmxOXKrkhRAl/1UTotIcXLDJoeDPCPlVSL4wMOl091/Ui4w0ZuFUKei/7f2NA1hb HqSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279636; x=1706884436; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CbytbZE5r6VKI1aTBZEBghdNkVDSmRfkbInRbv2Plj8=; b=a+bFUpDtXpH1frAxV2iyHAYwa9ASJoRI+i7+PEJA2ERoVm1TYVjljmjE25lYBsavNr mPl64RprL4tZz6MkTzjqo1nTohKPZoj7lmor75lSvWHakOE+YUOSqdUNx/dadwbI9uSx WA5zRM4t4iLJ2Dyu1rJLVsqpeS2Q39g09GX8JSq+561tVIx/BV93COpHlOcK5RqYsSdZ 0xCmFM9sqpZZ5PHR5GvKlnMItT8LgvN8MW8B6Yks93LJi3R/XexgL4KFl6IBnCenCnaW ahtPcSLUiDfugeRomuu1BauwQDgQ7C7lvohVm+XjxS7Y2NgvxIYidIudTIacAsPifZmV VLaw== X-Gm-Message-State: AOJu0YwMDp8SsXqjnKtZ8kKIa/9Zux11/jr3JGot1AfXpSutzdnACFkJ ucruZvTEGjJ9Z0QxyiHja9xeovmX6P/LSdtQP9yS95HWiP5BMf4YXMomOSRfHGckxf+ogDbfkhq 2 X-Google-Smtp-Source: AGHT+IHN/1J38rMpghWDj72Ez7d93GxehQXOJaTPrsZp17r7QncdV8Q8+J8HQigE0ahunrOaTcphbQ== X-Received: by 2002:ac2:59da:0:b0:510:c20:74a9 with SMTP id x26-20020ac259da000000b005100c2074a9mr1820442lfn.64.1706279636312; Fri, 26 Jan 2024 06:33:56 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 31/36] docs/system/arm/virt.rst: Add note on CPU features off by default Date: Fri, 26 Jan 2024 14:33:36 +0000 Message-Id: <20240126143341.2101237-32-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=peter.maydell@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279907045100003 Content-Type: text/plain; charset="utf-8" From: Gustavo Romero Add a note on CPU features that are off by default in `virt` machines. Some CPU features will remain off even if a CPU-capable CPU (e.g., `-cpu max`) is selected because they require support in both the CPU itself and in the wider system. Therefore, the user, besides selecting a CPU that supports such features, must also turn on the feature using a machine option. Signed-off-by: Gustavo Romero Message-id: 20240122211215.95073-1-gustavo.romero@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- docs/system/arm/virt.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index c245c52b7ac..26fcba00b76 100644 --- a/docs/system/arm/virt.rst +++ b/docs/system/arm/virt.rst @@ -69,6 +69,19 @@ Supported guest CPU types: Note that the default is ``cortex-a15``, so for an AArch64 guest you must specify a CPU type. =20 +Also, please note that passing ``max`` CPU (i.e. ``-cpu max``) won't +enable all the CPU features for a given ``virt`` machine. Where a CPU +architectural feature requires support in both the CPU itself and in the +wider system (e.g. the MTE feature), it may not be enabled by default, +but instead requires a machine option to enable it. + +For example, MTE support must be enabled with ``-machine virt,mte=3Don``, +as well as by selecting an MTE-capable CPU (e.g., ``max``) with the +``-cpu`` option. + +See the machine-specific options below, or check them for a given machine +by passing the ``help`` suboption, like: ``-machine virt-9.0,help``. + Graphics output is available, but unlike the x86 PC machine types there is no default display device enabled: you should select one from the Display devices section of "-device help". The recommended option --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279817; cv=none; d=zohomail.com; s=zohoarc; b=KBnTVQNDTrEI+Y6POYdNdtTWzaW0wazF3NjmV3SG4Llt4Bn/IVoMj/xfivSy7dskGRUYUNGQ7s0CUeHNRbOzPN2KdDGlYI6GUjoXViHEEbS0aHqtWUjqrpejGqcTshjKmsUomvOIaU3bYvkInER/pxw6UZt5Hrp7Bog6h0nkaxQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279817; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=6GdiHkmihi3/CT5xTxzMMWZkQ0ZumRMBWRBDkHYF3cM=; b=L8qhihb9zAHaV2CwupQxm5gewnQbvK1R1drSy9goH+NG5Xo/MN30rUy8+yq10fb6M3Hw4zVHBrNmbF2Y+gcQOpxogrTVGKIKD/IqI2GBLFWSg9GwI2QT05ezYX1Qn6JGpTg0LuJYiCQZCwZUXiQlI8hjdwaNR1fZfj5cMPc874Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279817214803.7786880870899; Fri, 26 Jan 2024 06:36:57 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHQ-0002dG-18; Fri, 26 Jan 2024 09:34:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHM-0002S0-4j for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:00 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHK-0007z7-2D for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:33:59 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-339289fead2so522683f8f.3 for ; Fri, 26 Jan 2024 06:33:57 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279636; x=1706884436; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=6GdiHkmihi3/CT5xTxzMMWZkQ0ZumRMBWRBDkHYF3cM=; b=HS4FzEvbXAzrow0tGa7JlFxepfrHvM6FhtXEJWSnCRsKmimebZG6u0sKsMc2AzMA5s dJ3qOyywTPIVxLQFVOa5FbIFYqKXoQpSirMnPt20kf8rkWb7z92zNuKICdC9Nwqw3+0d mlbSLMW3xXTHwyxkt4mLOVKa9YzpU57j6u3VP1YvghbelmQvFEXwo4S03KBbX0l68RLc WDvz1aYTlJ3i0TS8GE7gp7OuaYtMWD2OYeyJLYU/eyvlxBz12datRdm8pwQ/ACVwefsw LK2odhqR+QmLL01DxogAXcCh6CyYkB2pudaqd6MipyW+ZpgLDH0c2MyfL///9O/Ig9h+ bNHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279636; x=1706884436; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6GdiHkmihi3/CT5xTxzMMWZkQ0ZumRMBWRBDkHYF3cM=; b=CMt4g7dxuED9BthGXi0kS4qYKEoPet4DIb7pHtnPymrRMQKsfCSnjpddJcn5z3PpT7 OFX071yunWZAZTEfwF22HdbqfV4E23nclCIg0fY0YqKiFOgCrEN8Gwh5xRPaoo4rByBC pxQp6pSPzio5A4ew4dFr8qfeOpg8F4G+675FxL/oJQNrM9GD87gsoliCGO8nAxJXJwxD Dm0qSf7yRAN3288zJebJoB5X4kJIwTgmFeUg5dXEEoe7OCw6ae6Mah1w+fofU/yC9pLl vnieV8qb5Vl8LFbAd+dhLJ6JbSY+uv0EtIARnHCB9tZJZh/+yDY1f9aLpouKBuZe+T2H XchQ== X-Gm-Message-State: AOJu0YwyhrpvDiCoA57olg7kPJb8IgKWzCU2cmj/cBdxikPr4A2/GlyS jnlxzUrD7QnsLDgaIxoRFOAhUnrQ04Ofok2yK+O+HfngGpX7D8lolvJl+23dRUwQ9beq9oa3ukV 5 X-Google-Smtp-Source: AGHT+IGnhXC9n4txh3nwEVwkGsFb6F0MNe4S3MfyCgzrS8pcOu8zEHl75/65Sm9GCklBo9ehi2YnJQ== X-Received: by 2002:a5d:5741:0:b0:337:c943:5f04 with SMTP id q1-20020a5d5741000000b00337c9435f04mr984971wrw.90.1706279636735; Fri, 26 Jan 2024 06:33:56 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 32/36] hw/char/imx_serial: Implement receive FIFO and ageing timer Date: Fri, 26 Jan 2024 14:33:37 +0000 Message-Id: <20240126143341.2101237-33-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279818900100003 Content-Type: text/plain; charset="utf-8" From: Rayhan Faizel This patch implements a 32 half word FIFO as per imx serial device specifications. If a non empty FIFO is below the trigger level, an ageing timer will tick for a duration of 8 characters. On expiry, AGTIM will be set triggering an interrupt. AGTIM timer resets when there is activity in the receive FIFO. Otherwise, RRDY is set when trigger level is exceeded. The receive trigger level is 8 in newer kernel versions and 1 in older ones. This change will break migration compatibility for the imx boards. Signed-off-by: Rayhan Faizel Message-id: 20240125151931.83494-1-rayhan.faizel@gmail.com Reviewed-by: Peter Maydell [PMM: commit message tidyups] Signed-off-by: Peter Maydell --- include/hw/char/imx_serial.h | 20 ++++++- hw/char/imx_serial.c | 102 ++++++++++++++++++++++++++++++----- 2 files changed, 108 insertions(+), 14 deletions(-) diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h index b823f945195..65f0e97c76b 100644 --- a/include/hw/char/imx_serial.h +++ b/include/hw/char/imx_serial.h @@ -21,12 +21,16 @@ #include "hw/sysbus.h" #include "chardev/char-fe.h" #include "qom/object.h" +#include "qemu/fifo32.h" =20 #define TYPE_IMX_SERIAL "imx.serial" OBJECT_DECLARE_SIMPLE_TYPE(IMXSerialState, IMX_SERIAL) =20 +#define FIFO_SIZE 32 + #define URXD_CHARRDY (1<<15) /* character read is valid */ #define URXD_ERR (1<<14) /* Character has error */ +#define URXD_OVRRUN (1<<13) /* 32nd character in RX FIFO */ #define URXD_FRMERR (1<<12) /* Character has frame error */ #define URXD_BRK (1<<11) /* Break received */ =20 @@ -65,11 +69,13 @@ OBJECT_DECLARE_SIMPLE_TYPE(IMXSerialState, IMX_SERIAL) #define UCR1_TXMPTYEN (1<<6) /* Tx Empty Interrupt Enable */ #define UCR1_UARTEN (1<<0) /* UART Enable */ =20 +#define UCR2_ATEN (1<<3) /* Ageing Timer Enable */ #define UCR2_TXEN (1<<2) /* Transmitter enable */ #define UCR2_RXEN (1<<1) /* Receiver enable */ #define UCR2_SRST (1<<0) /* Reset complete */ =20 #define UCR4_DREN BIT(0) /* Receive Data Ready interrupt enable */ +#define UCR4_OREN BIT(1) /* Overrun interrupt enable */ #define UCR4_TCEN BIT(3) /* TX complete interrupt enable */ #define UCR4_WKEN BIT(7) /* WAKE interrupt enable */ =20 @@ -78,13 +84,25 @@ OBJECT_DECLARE_SIMPLE_TYPE(IMXSerialState, IMX_SERIAL) #define UTS1_TXFULL (1<<4) #define UTS1_RXFULL (1<<3) =20 +#define TL_MASK 0x3f + + /* Bit time in nanoseconds assuming maximum baud rate of 115200 */ +#define BIT_TIME_NS 8681 + +/* Assume 8 bits per character */ +#define NUM_BITS 8 + +/* Ageing timer triggers after 8 characters */ +#define AGE_DURATION_NS (8 * NUM_BITS * BIT_TIME_NS) + struct IMXSerialState { /*< private >*/ SysBusDevice parent_obj; =20 /*< public >*/ MemoryRegion iomem; - int32_t readbuff; + QEMUTimer ageing_timer; + Fifo32 rx_fifo; =20 uint32_t usr1; uint32_t usr2; diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c index 1df862eb7ff..ba37be6faab 100644 --- a/hw/char/imx_serial.c +++ b/hw/char/imx_serial.c @@ -26,6 +26,7 @@ #include "migration/vmstate.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qemu/fifo32.h" =20 #ifndef DEBUG_IMX_UART #define DEBUG_IMX_UART 0 @@ -41,10 +42,11 @@ =20 static const VMStateDescription vmstate_imx_serial =3D { .name =3D TYPE_IMX_SERIAL, - .version_id =3D 2, - .minimum_version_id =3D 2, + .version_id =3D 3, + .minimum_version_id =3D 3, .fields =3D (const VMStateField[]) { - VMSTATE_INT32(readbuff, IMXSerialState), + VMSTATE_FIFO32(rx_fifo, IMXSerialState), + VMSTATE_TIMER(ageing_timer, IMXSerialState), VMSTATE_UINT32(usr1, IMXSerialState), VMSTATE_UINT32(usr2, IMXSerialState), VMSTATE_UINT32(ucr1, IMXSerialState), @@ -71,6 +73,10 @@ static void imx_update(IMXSerialState *s) * following: */ usr1 =3D s->usr1 & s->ucr1 & (USR1_TRDY | USR1_RRDY); + /* + * Interrupt if AGTIM is set (ageing timer interrupt in RxFIFO) + */ + usr1 |=3D (s->ucr2 & UCR2_ATEN) ? (s->usr1 & USR1_AGTIM) : 0; /* * Bits that we want in USR2 are not as conveniently laid out, * unfortunately. @@ -78,15 +84,66 @@ static void imx_update(IMXSerialState *s) mask =3D (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0; /* * TCEN and TXDC are both bit 3 + * ORE and OREN are both bit 1 * RDR and DREN are both bit 0 */ - mask |=3D s->ucr4 & (UCR4_WKEN | UCR4_TCEN | UCR4_DREN); + mask |=3D s->ucr4 & (UCR4_WKEN | UCR4_TCEN | UCR4_DREN | UCR4_OREN); =20 usr2 =3D s->usr2 & mask; =20 qemu_set_irq(s->irq, usr1 || usr2); } =20 +static void imx_serial_rx_fifo_push(IMXSerialState *s, uint32_t value) +{ + uint32_t pushed_value =3D value; + if (fifo32_is_full(&s->rx_fifo)) { + /* Set ORE if FIFO is already full */ + s->usr2 |=3D USR2_ORE; + } else { + if (fifo32_num_used(&s->rx_fifo) =3D=3D FIFO_SIZE - 1) { + /* Set OVRRUN on 32nd character in FIFO */ + pushed_value |=3D URXD_ERR | URXD_OVRRUN; + } + fifo32_push(&s->rx_fifo, pushed_value); + } +} + +static uint32_t imx_serial_rx_fifo_pop(IMXSerialState *s) +{ + if (fifo32_is_empty(&s->rx_fifo)) { + return 0; + } + return fifo32_pop(&s->rx_fifo); +} + +static void imx_serial_rx_fifo_ageing_timer_int(void *opaque) +{ + IMXSerialState *s =3D (IMXSerialState *) opaque; + s->usr1 |=3D USR1_AGTIM; + imx_update(s); +} + +static void imx_serial_rx_fifo_ageing_timer_restart(void *opaque) +{ + /* + * Ageing timer starts ticking when + * RX FIFO is non empty and below trigger level. + * Timer is reset if new character is received or + * a FIFO read occurs. + * Timer triggers an interrupt when duration of + * 8 characters has passed (assuming 115200 baudrate). + */ + IMXSerialState *s =3D (IMXSerialState *) opaque; + + if (!(s->usr1 & USR1_RRDY) && !(s->uts1 & UTS1_RXEMPTY)) { + timer_mod_ns(&s->ageing_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + AGE_DURATION_= NS); + } else { + timer_del(&s->ageing_timer); + } +} + static void imx_serial_reset(IMXSerialState *s) { =20 @@ -102,7 +159,9 @@ static void imx_serial_reset(IMXSerialState *s) s->ucr3 =3D 0x700; s->ubmr =3D 0; s->ubrc =3D 4; - s->readbuff =3D URXD_ERR; + + fifo32_reset(&s->rx_fifo); + timer_del(&s->ageing_timer); } =20 static void imx_serial_reset_at_boot(DeviceState *dev) @@ -125,20 +184,28 @@ static uint64_t imx_serial_read(void *opaque, hwaddr = offset, unsigned size) { IMXSerialState *s =3D (IMXSerialState *)opaque; - uint32_t c; + uint32_t c, rx_used; + uint8_t rxtl =3D s->ufcr & TL_MASK; =20 DPRINTF("read(offset=3D0x%" HWADDR_PRIx ")\n", offset); =20 switch (offset >> 2) { case 0x0: /* URXD */ - c =3D s->readbuff; + c =3D imx_serial_rx_fifo_pop(s); if (!(s->uts1 & UTS1_RXEMPTY)) { /* Character is valid */ c |=3D URXD_CHARRDY; - s->usr1 &=3D ~USR1_RRDY; - s->usr2 &=3D ~USR2_RDR; - s->uts1 |=3D UTS1_RXEMPTY; + rx_used =3D fifo32_num_used(&s->rx_fifo); + /* Clear RRDY if below threshold */ + if (rx_used < rxtl) { + s->usr1 &=3D ~USR1_RRDY; + } + if (rx_used =3D=3D 0) { + s->usr2 &=3D ~USR2_RDR; + s->uts1 |=3D UTS1_RXEMPTY; + } imx_update(s); + imx_serial_rx_fifo_ageing_timer_restart(s); qemu_chr_fe_accept_input(&s->chr); } return c; @@ -300,19 +367,24 @@ static void imx_serial_write(void *opaque, hwaddr off= set, static int imx_can_receive(void *opaque) { IMXSerialState *s =3D (IMXSerialState *)opaque; - return !(s->usr1 & USR1_RRDY); + return s->ucr2 & UCR2_RXEN && fifo32_num_used(&s->rx_fifo) < FIFO_SIZE; } =20 static void imx_put_data(void *opaque, uint32_t value) { IMXSerialState *s =3D (IMXSerialState *)opaque; + uint8_t rxtl =3D s->ufcr & TL_MASK; =20 DPRINTF("received char\n"); + imx_serial_rx_fifo_push(s, value); + if (fifo32_num_used(&s->rx_fifo) >=3D rxtl) { + s->usr1 |=3D USR1_RRDY; + } + + imx_serial_rx_fifo_ageing_timer_restart(s); =20 - s->usr1 |=3D USR1_RRDY; s->usr2 |=3D USR2_RDR; s->uts1 &=3D ~UTS1_RXEMPTY; - s->readbuff =3D value; if (value & URXD_BRK) { s->usr2 |=3D USR2_BRCD; } @@ -345,6 +417,10 @@ static void imx_serial_realize(DeviceState *dev, Error= **errp) { IMXSerialState *s =3D IMX_SERIAL(dev); =20 + fifo32_create(&s->rx_fifo, FIFO_SIZE); + timer_init_ns(&s->ageing_timer, QEMU_CLOCK_VIRTUAL, + imx_serial_rx_fifo_ageing_timer_int, s); + DPRINTF("char dev for uart: %p\n", qemu_chr_fe_get_driver(&s->chr)); =20 qemu_chr_fe_set_handlers(&s->chr, imx_can_receive, imx_receive, --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279637; x=1706884437; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=cravlyBFi7JJgiMIcZjmEYHU7D0lxD+xDQlAtlvWf2Y=; b=q1rMAIpkyzvxt0CJ+Yt6GxYNtfNHrwXKzgwrX+zMjwsQWVQ18Xrf1E5NJNX6qqGGR/ DDRuJdLXN6h6tscri4vOoD331KnjJg0U+NPSimYGp6wtl6zxFZ2C+wZ6uqKSWlEjJD2j 27agOc6NxhH9xWL2Lu6Hby7lRQEd9cOTsoZJgSxF8PsGyB+34P80Ju6ee5tXL5gbnx/B uZGA11YSMquyCV94WUrLoLeHkSFZ1JaFwLwAokuXOJleasetZV+sRyrdGj/bfV5BkXCD NUILACNSkMFuUy1+fVrK6tescVqaOafF1bJNlfjEca8fYlEE5UWAyvPIFkGBir+cRG5l lmcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279637; x=1706884437; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cravlyBFi7JJgiMIcZjmEYHU7D0lxD+xDQlAtlvWf2Y=; b=ppvHRSc2zpR7xDP5jFGa9wSu99M4q/CDF5b2AE0mGn1IOvXafswZVwA4uHpNIGfBfQ nCTzlddeqcVx7vBwfiC61Z/YIarZxOpXWevZgtXqiPvmSQP3ykxySdZDzI5OBiaH4/OQ P/hq0SiiqN3LKynD3ggpwY4Gqy6Ta57ozUm+NgRteIMx3S5GQLa5snpJFEadXPwth/uK y3mjbMmz+8kqNCSQqBSS2/FH5ACLC0PfT9ratZxgaQr7cahm4Y5XJRJFSuUHEsPjRyfP 6wTCUT+2ARFpa/8nZ+sKtkdZoB7eoF111PezKB/4GcOfWc7wT3mBTLGTqO4cOZ32+U2r pDtA== X-Gm-Message-State: AOJu0YyPDbdsmTWA3NEJE4E7x2sP+9a/42HqIb+Kg96V31JwkJNDPv9F Wi50go25PEqT6pyn8sbRaR2b316ClAFvVGl62UsZcQMk0mKSmOkKjL3wfxqUbsjBOYF1iPq4qC6 G X-Google-Smtp-Source: AGHT+IEILqfnbZGBXlWy+slEhy6m0yFFQg4ZhwKklIfg1knI3hjrnn8+o6vxiwuXsW6YxovER/bN8w== X-Received: by 2002:a5d:564a:0:b0:33a:9919:853a with SMTP id j10-20020a5d564a000000b0033a9919853amr1022036wrw.96.1706279637483; Fri, 26 Jan 2024 06:33:57 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/36] target/arm: Fix A64 scalar SQSHRN and SQRSHRN Date: Fri, 26 Jan 2024 14:33:38 +0000 Message-Id: <20240126143341.2101237-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279812875100003 Content-Type: text/plain; charset="utf-8" In commit 1b7bc9b5c8bf374dd we changed handle_vec_simd_sqshrn() so that instead of starting with a 0 value and depositing in each new element from the narrowing operation, it instead started with the raw result of the narrowing operation of the first element. This is fine in the vector case, because the deposit operations for the second and subsequent elements will always overwrite any higher bits that might have been in the first element's result value in tcg_rd. However in the scalar case we only go through this loop once. The effect is that for a signed narrowing operation, if the result is negative then we will now return a value where the bits above the first element are incorrectly 1 (because the narrowfn returns a sign-extended result, not one that is truncated to the element size). Fix this by using an extract operation to get exactly the correct bits of the output of the narrowfn for element 1, instead of a plain move. Cc: qemu-stable@nongnu.org Fixes: 1b7bc9b5c8bf374dd3 ("target/arm: Avoid tcg_const_ptr in handle_vec_s= imd_sqshrn") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2089 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20240123153416.877308-1-peter.maydell@linaro.org --- target/arm/tcg/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 27335e85407..340265beb05 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -8343,7 +8343,7 @@ static void handle_vec_simd_sqshrn(DisasContext *s, b= ool is_scalar, bool is_q, narrowfn(tcg_rd_narrowed, tcg_env, tcg_rd); tcg_gen_extu_i32_i64(tcg_rd, tcg_rd_narrowed); if (i =3D=3D 0) { - tcg_gen_mov_i64(tcg_final, tcg_rd); + tcg_gen_extract_i64(tcg_final, tcg_rd, 0, esize); } else { tcg_gen_deposit_i64(tcg_final, tcg_final, tcg_rd, esize * i, e= size); } --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279767; cv=none; d=zohomail.com; s=zohoarc; b=FBhk6dkQYUhWXljdkfZPmI2MGIcTYMVj34HcehJgDom0TCw8yVgwU0tDGGDkuvR6PX3u/3dUkyPWloXDLJCS0ltFMMhfIsjTqomXZKghK1q4518HkB0fG8drq7u9j4WDTFHZjiVgSV42dGby1doIOoJS6oxBZ9tvpVv+F0JLo+A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279767; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=28nbiWFQ3dXc2wMfXx4/3I1JNB6kABMI1o1Dd2Ej4Ok=; b=U8nf6kRBQ1WRj8idlVCmcbOY5pMJ/Up253x+ymQai+r55WEW7kXP8kuSQaXwn4RNvzahueo43kXYwBhcqbTW4xOxqXMpWRUMqeILhDNCU4uuQUbbwWkYIFRZL2bdtT/YHzH3+sJ/UQqUZ3RcgLC6LzjVS+DQwPSG2tjAtAaOfSg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279767587422.09729383238266; Fri, 26 Jan 2024 06:36:07 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHQ-0002fx-Pm; Fri, 26 Jan 2024 09:34:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHM-0002T7-RX for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:00 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHL-0007zT-41 for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:00 -0500 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-339289fead2so522702f8f.3 for ; Fri, 26 Jan 2024 06:33:58 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279638; x=1706884438; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=28nbiWFQ3dXc2wMfXx4/3I1JNB6kABMI1o1Dd2Ej4Ok=; b=YXVVmRfMnPNwIz5OvFi1mkRn59oMkASYDDtWUrRnlC34BDVQDHjGIQJlxfALkxm7vL o2xIxZ4hiLn3l+SKPxmRZjaFN/JWKxD28bOKGxUVBZuBaLMZStCDFsKVLxyScOlm5tTy Qe6SM0hsQwYN8p1JHWOV3lv/szQZBRhjSt+2iNra6iHV3EXgTdQE1sjOb15R8NRpj+jk aMYyFWkGEtl9gB8bk8LtJ6jveSl4kHINKtuuEttpwyhvQsKOx5JKp8sxfiCVvpkVM6z6 ZeF9bMGOyITPTc4hFknoZCI+pl5TIHj4Z3Tb3Ob2mQ5CJRZW2zv5hSev246bxSUYXE8J IDbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279638; x=1706884438; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=28nbiWFQ3dXc2wMfXx4/3I1JNB6kABMI1o1Dd2Ej4Ok=; b=YxzH+YPAu2q48YLDct/41lNmtn9STsPiu5s5QUR853sAiik7mBEJ8Uk1zyej2416Q4 oFwfalG+UezCyGWHlnU8PkvleMFhCQL7xbbz+4xjdAPxTb6DYX+TcfpD8EBGoW9Nw3sY 7QHi76S7vmn6ZEVhj3C8M9gLDUKe4l75/4/sXVkA8/qOiLeFS39SLfxfA8PgKE0d2OaD vNBNX1nTP6QXqEVN/BTt54TljdA5E/fMRgyi4lusXBi22oM8XtHOGg+vAZ2HkOfYNVnq SVrxDLXOmqYYzDc5eVR/I+WRfluzCVculJilwQ0srj1Z3vAaCBOsbWupIWUhcRjTHgs7 BmPg== X-Gm-Message-State: AOJu0Yy4lC36GSOtL1fqTjc/pRCIFw4fSySePI1yLIZjfL/R6l1iJeey P2/4SqU3/amVO0W1jvG0RatiP/5pWT2QrH/jTcl4IQ7wPM3anUa7m0loEfUEiNeORSUjeHSNrA8 2 X-Google-Smtp-Source: AGHT+IFOfNiYrNmobatReAw0ULuW1hKCIhApIbEgmXU7B5i9gurHKy8t1YI/+quUBvUSSqpEB8Vmtg== X-Received: by 2002:adf:f88e:0:b0:337:d649:da70 with SMTP id u14-20020adff88e000000b00337d649da70mr834366wrp.138.1706279637863; Fri, 26 Jan 2024 06:33:57 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 34/36] bswap.h: Fix const_le64() macro Date: Fri, 26 Jan 2024 14:33:39 +0000 Message-Id: <20240126143341.2101237-35-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279768702100003 The const_le64() macro introduced in commit 845d80a8c7b187 turns out to have a bug which means that on big-endian systems the compiler complains if the argument isn't already a 64-bit type. This hasn't caused a problem yet, because there are no in-tree uses, but it means it's not possible for anybody to add one without it failing CI. This example is from an attempted use of it with the argument '0', from the s390 CI runner's gcc: ../block/blklogwrites.c: In function =E2=80=98blk_log_writes_co_do_log=E2= =80=99: ../include/qemu/bswap.h:148:36: error: left shift count >=3D width of type [-Werror=3Dshift-count-overflow] 148 | ((((_x) & 0x00000000000000ffU) << 56) | \ | ^~ ../block/blklogwrites.c:409:27: note: in expansion of macro =E2=80=98const_= le64=E2=80=99 409 | .nr_entries =3D const_le64(0), | ^~~~~~~~~~ ../include/qemu/bswap.h:149:36: error: left shift count >=3D width of type [-Werror=3Dshift-count-overflow] 149 | (((_x) & 0x000000000000ff00U) << 40) | \ | ^~ ../block/blklogwrites.c:409:27: note: in expansion of macro =E2=80=98const_= le64=E2=80=99 409 | .nr_entries =3D const_le64(0), | ^~~~~~~~~~ cc1: all warnings being treated as errors Fix this by making all the constants in the macro have the ULL suffix. This will cause them all to be 64-bit integers, which means the result of the logical & will also be an unsigned 64-bit type, even if the input to the macro is a smaller type, and so the shifts will be in range. Fixes: 845d80a8c7b187 ("qemu/bswap: Add const_le64()") Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Thomas Huth Reviewed-by: Kevin Wolf Reviewed-by: Ira Weiny Message-id: 20240122173735.472951-1-peter.maydell@linaro.org --- include/qemu/bswap.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 933a66ee87e..bd67468e5e4 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -145,14 +145,14 @@ CPU_CONVERT(le, 64, uint64_t) */ #if HOST_BIG_ENDIAN # define const_le64(_x) \ - ((((_x) & 0x00000000000000ffU) << 56) | \ - (((_x) & 0x000000000000ff00U) << 40) | \ - (((_x) & 0x0000000000ff0000U) << 24) | \ - (((_x) & 0x00000000ff000000U) << 8) | \ - (((_x) & 0x000000ff00000000U) >> 8) | \ - (((_x) & 0x0000ff0000000000U) >> 24) | \ - (((_x) & 0x00ff000000000000U) >> 40) | \ - (((_x) & 0xff00000000000000U) >> 56)) + ((((_x) & 0x00000000000000ffULL) << 56) | \ + (((_x) & 0x000000000000ff00ULL) << 40) | \ + (((_x) & 0x0000000000ff0000ULL) << 24) | \ + (((_x) & 0x00000000ff000000ULL) << 8) | \ + (((_x) & 0x000000ff00000000ULL) >> 8) | \ + (((_x) & 0x0000ff0000000000ULL) >> 24) | \ + (((_x) & 0x00ff000000000000ULL) >> 40) | \ + (((_x) & 0xff00000000000000ULL) >> 56)) # define const_le32(_x) \ ((((_x) & 0x000000ffU) << 24) | \ (((_x) & 0x0000ff00U) << 8) | \ --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279738; cv=none; d=zohomail.com; s=zohoarc; b=PfbUJFmZQ04ie6LODc0b7YOWP5plPxqG12PCOWo1to/Y/my0XlbVCoSOxnUNBRAnSPkpyxFkzF3RYW7JEv+VuLAkC7opsa83gXP0ArmHf/O0GiD3am0BVqb7tm9fjMgNEhQE/E8llVlxa8p+Lnzy5FL5e+y1+4ujIKNvw0iIgEM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279738; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=C5S28rdH5ZOgcnO36OWOW5DPAS8PCmcDgoLOzpGvQH0=; b=BJE5oe75uqzUbJ5QKhkeOq6ilxAtkvxDq6A3/H1OWIEaf7Ya4EwK33n2p/iJT1MlkP4rO4ORtNgkNX+ftOO7sWpcZM4u1BoHyVReDuY96fal+2JgyiQJ22D9Ui11oNEb4KqqLddB+d/8zc0rbJ8vN1y3XA7gIkr+R4sAGfvZw0I= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279738141665.5306815772032; Fri, 26 Jan 2024 06:35:38 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHS-0002lt-9l; Fri, 26 Jan 2024 09:34:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHN-0002Tk-Bg for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:01 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHL-0007zn-LB for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:01 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3392d417a9fso239941f8f.1 for ; Fri, 26 Jan 2024 06:33:59 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id n5-20020a5d4845000000b00337f722e5ccsm1396207wrs.65.2024.01.26.06.33.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Jan 2024 06:33:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706279638; x=1706884438; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=C5S28rdH5ZOgcnO36OWOW5DPAS8PCmcDgoLOzpGvQH0=; b=VM6/jWRY2nrlR6dvjufh17JM0zp/0CxemEYfEmKj7M9Pf+AooZD0uQBW0YmIQjUvM/ cPLSYBbAqk6WsPBmnpdiHG2gNI2+/TxW1Sh6iISJvlyZhKN3NQgWd4bZOTrzKs2n3kWS Rt0uN1z++z4hOV8UUhSjhGImHy38M42CpKB/tX0IrLx9kM5PCgf2wiltP0OS/QmBB1Kx WQMiNJY8ZzhChFDlf3JjL3T8VsMAAxWVfoWeNmHUB6dItSCQb5++M+xf4Ekhhzz5tuT2 NZOPRXkGBHRjyDfMm3UQh/aAQg02XL3Yq8BlgToT3BPFdKm84qb61VYGls7ERJWCwhJM bzww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706279638; x=1706884438; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=C5S28rdH5ZOgcnO36OWOW5DPAS8PCmcDgoLOzpGvQH0=; b=l1Zfcr+w40aQF0z4Shl73bTL1301rL/qEwu2cTpWoQ/0GOdxvI+hJFSCzDwVgq0vnX 8R0sBbbkzzZ/sdVCIsyUvB/1Uy8t6YuUClPqGbAUhBLaxQEK37WnXffLfr4NKSC8TYA3 w8lwQfztCLZaYpbAA62h9xClm/2RHkR8BVZPS9+7a5oSGzSa1md46utNgFfaa9rn7u9v 0rPdWu5Q54sokkYWXz+QdtfNP7kcou19iTWuua30IQe328J5ymztjMITkhhCRL8ORkBx uX1MFjHx5fUxyDm+uAQhy9EWAd/j00GUgTtU4VlfrBrOlOtFU2t+JlZgqjrq9OxnYa+Y qYjA== X-Gm-Message-State: AOJu0YyY5bEypoX/LbMpeQrA35K3SZr4FiEEzAgQnrzYYwG8Ta1Kf4NL TBxDxjZr0SpLlMhM8Edp0fLsO4IcEwXGfgmqkGqYbLZBJAlMKLheya9d5jrUkQrlZ/aZxlfaUhF g X-Google-Smtp-Source: AGHT+IFHfcslRv6yflytRnCHgtutM2iAyDyWyfUpzvJOzYoWtDOD5yvb4pFTxs7dwV/MddQjv5QG1g== X-Received: by 2002:a5d:4ac4:0:b0:333:a28:bfc5 with SMTP id y4-20020a5d4ac4000000b003330a28bfc5mr1401960wrs.70.1706279638409; Fri, 26 Jan 2024 06:33:58 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 35/36] target/arm: Fix incorrect aa64_tidcp1 feature check Date: Fri, 26 Jan 2024 14:33:40 +0000 Message-Id: <20240126143341.2101237-36-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240126143341.2101237-1-peter.maydell@linaro.org> References: <20240126143341.2101237-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279738736100004 Content-Type: text/plain; charset="utf-8" A typo in the implementation of isar_feature_aa64_tidcp1() means we were checking the field in the wrong ID register, so we might have provided the feature on CPUs that don't have it and not provided it on CPUs that should have it. Correct this bug. Cc: qemu-stable@nongnu.org Fixes: 9cd0c0dec97be9 "target/arm: Implement FEAT_TIDCP1" Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2120 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20240123160333.958841-1-peter.maydell@linaro.org --- target/arm/cpu-features.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h index 028795ff23f..7567854db63 100644 --- a/target/arm/cpu-features.h +++ b/target/arm/cpu-features.h @@ -773,7 +773,7 @@ static inline bool isar_feature_aa64_hcx(const ARMISARe= gisters *id) =20 static inline bool isar_feature_aa64_tidcp1(const ARMISARegisters *id) { - return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR1, TIDCP1) !=3D 0; + return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, TIDCP1) !=3D 0; } =20 static inline bool isar_feature_aa64_hafs(const ARMISARegisters *id) --=20 2.34.1 From nobody Tue Nov 26 15:42:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706279704; cv=none; d=zohomail.com; s=zohoarc; b=SsQU/n/QYF5klprlwW4syBwwKwLCWEqwttLHzX1ynB2D10j50l0FhRbTUWiCfwVnalHq2kd4MeywZYhFnK6qsRlQ9fWXA34OoeDvE96xa57OUbTBzuToGOwxDuP/vDUTrs38ZMfammD2yyMqEZGdfALTJx6KD6HIdvs7rWhePG4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706279704; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=cnb5Te5JjfcRGo6jPAixA7Wqdmj5tk2fqhvny4CjP+g=; b=L6QTjBmYoI+f3fC38J7Rfe0ZAwQFl3Y11MHuel2IpZXFgjhJ+scox1yat602Vjx3puM4REVECoV6I4u5j3BoCN0nU5FapqDt59VZE37jN3ZQS0s6aT08BLbn3jj3uj/GfYRAFQiq1hffw0qi/aRq5fwY+7Iumq8UT5+copCNfKU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706279704305348.36105919122076; Fri, 26 Jan 2024 06:35:04 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rTNHR-0002gv-Ez; Fri, 26 Jan 2024 09:34:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rTNHN-0002Tw-TY for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:01 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rTNHM-0007zs-4D for qemu-devel@nongnu.org; Fri, 26 Jan 2024 09:34:01 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-40ee82d040dso3000995e9.3 for ; Fri, 26 Jan 2024 06:33:59 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706279704612100001 Content-Type: text/plain; charset="utf-8" From: Nikita Ostrenkov Signed-off-by: Nikita Ostrenkov Message-id: 20240108140325.1291-1-n.ostrenkov@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6.h | 44 ++++++++++++++++++++------------------- hw/arm/fsl-imx6.c | 25 ++++++++++++++++++++++ hw/arm/Kconfig | 2 ++ 3 files changed, 50 insertions(+), 21 deletions(-) diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 519b871014a..61c593ffd24 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -32,6 +32,7 @@ #include "hw/net/imx_fec.h" #include "hw/usb/chipidea.h" #include "hw/usb/imx-usb-phy.h" +#include "hw/pci-host/designware.h" #include "exec/memory.h" #include "cpu.h" #include "qom/object.h" @@ -55,27 +56,28 @@ struct FslIMX6State { DeviceState parent_obj; =20 /*< public >*/ - ARMCPU cpu[FSL_IMX6_NUM_CPUS]; - A9MPPrivState a9mpcore; - IMX6CCMState ccm; - IMX6SRCState src; - IMX7SNVSState snvs; - IMXSerialState uart[FSL_IMX6_NUM_UARTS]; - IMXGPTState gpt; - IMXEPITState epit[FSL_IMX6_NUM_EPITS]; - IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; - IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; - SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; - IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; - IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; - IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; - ChipideaState usb[FSL_IMX6_NUM_USBS]; - IMXFECState eth; - MemoryRegion rom; - MemoryRegion caam; - MemoryRegion ocram; - MemoryRegion ocram_alias; - uint32_t phy_num; + ARMCPU cpu[FSL_IMX6_NUM_CPUS]; + A9MPPrivState a9mpcore; + IMX6CCMState ccm; + IMX6SRCState src; + IMX7SNVSState snvs; + IMXSerialState uart[FSL_IMX6_NUM_UARTS]; + IMXGPTState gpt; + IMXEPITState epit[FSL_IMX6_NUM_EPITS]; + IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; + IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; + SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; + IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; + IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; + IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; + ChipideaState usb[FSL_IMX6_NUM_USBS]; + IMXFECState eth; + DesignwarePCIEHost pcie; + MemoryRegion rom; + MemoryRegion caam; + MemoryRegion ocram; + MemoryRegion ocram_alias; + uint32_t phy_num; }; =20 =20 diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 42f90588251..b7f93d8d9ce 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -22,6 +22,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/arm/fsl-imx6.h" +#include "hw/misc/unimp.h" #include "hw/usb/imx-usb-phy.h" #include "hw/boards.h" #include "hw/qdev-properties.h" @@ -103,6 +104,8 @@ static void fsl_imx6_init(Object *obj) =20 =20 object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET); + + object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HO= ST); } =20 static void fsl_imx6_realize(DeviceState *dev, Error **errp) @@ -110,6 +113,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **= errp) MachineState *ms =3D MACHINE(qdev_get_machine()); FslIMX6State *s =3D FSL_IMX6(dev); uint16_t i; + qemu_irq irq; unsigned int smp_cpus =3D ms->smp.cpus; =20 if (smp_cpus > FSL_IMX6_NUM_CPUS) { @@ -425,6 +429,27 @@ static void fsl_imx6_realize(DeviceState *dev, Error *= *errp) FSL_IMX6_WDOGn_IRQ[i])); } =20 + /* + * PCIe + */ + sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX6_PCIe_REG_ADDR); + + irq =3D qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE1_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); + irq =3D qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE2_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); + irq =3D qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE3_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); + irq =3D qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE4_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); + + /* + * PCIe PHY + */ + create_unimplemented_device("pcie-phy", FSL_IMX6_PCIe_ADDR, + FSL_IMX6_PCIe_SIZE); + /* ROM memory */ if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom", FSL_IMX6_ROM_SIZE, errp)) { diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 2bc3ea3425e..f927878152a 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -547,6 +547,7 @@ config FSL_IMX31 =20 config FSL_IMX6 bool + imply PCIE_DEVICES imply I2C_DEVICES select A9MPCORE select IMX @@ -555,6 +556,7 @@ config FSL_IMX6 select IMX_USBPHY select WDT_IMX2 select PL310 # cache controller + select PCI_EXPRESS_DESIGNWARE select SDHCI =20 config ASPEED_SOC --=20 2.34.1