From nobody Tue Nov 26 18:45:55 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1706162223; cv=none; d=zohomail.com; s=zohoarc; b=AD3cihVh48r75yXqcW5fxZIbwB2Yb7EVYxPbIJ3NB1/IVj2PHg4K+eliCpkqxlFAf7h7z/XFLsLp13MPePYGImbtwjakaKynJcpsMvyVtvs+HftzSMAspw7LZNjrg/IE+CxaMKC+4BGYDKeiLEPv1iNJ2rTCmYAAN0ok5a3icX8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1706162223; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=QNfhqMn/7H2JfeWtmxECGiPrj1Y1rofAyE4BiaQU4SY=; b=X4pQG6Z8v41vpDDrApdYkBsrSB/xAq5RatUuRaAJKKvaLA60zrxjVufVUX66PbNY3T2Sxn8UQ4vxZzC28XRrev6hjnREDqOTbf06KQmCrqEV3Z0UwFAnhDnk4OqsBnqvbFpIN0lCRyOeVL9uaiFi3ZEW5VVuKzaeS830qp9BjR0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1706162223032519.4794314805563; Wed, 24 Jan 2024 21:57:03 -0800 (PST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rSsig-0003Ke-UA; Thu, 25 Jan 2024 00:56:10 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rSsif-0003Jq-Mw for qemu-devel@nongnu.org; Thu, 25 Jan 2024 00:56:09 -0500 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rSsic-00018I-97 for qemu-devel@nongnu.org; Thu, 25 Jan 2024 00:56:09 -0500 Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-40e76626170so69884135e9.2 for ; Wed, 24 Jan 2024 21:56:05 -0800 (PST) Received: from m1x-phil.lan (lec62-h02-176-184-19-125.dsl.sta.abo.bbox.fr. [176.184.19.125]) by smtp.gmail.com with ESMTPSA id je1-20020a05600c1f8100b0040e5cf9a6c7sm1277836wmb.13.2024.01.24.21.56.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 24 Jan 2024 21:56:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706162165; x=1706766965; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QNfhqMn/7H2JfeWtmxECGiPrj1Y1rofAyE4BiaQU4SY=; b=sPc1cilOChH3JpCpyzRlp+5TeKZssyJkXjkhvvztNSeu5eHmhYfb8U+Z9hyHUTpsBr PwyTfEA4X2dwf5rgM5NSArzU3eqlKWxzhdN1Ge3bU4hnmy6Dua6Tok4usUqxDGy1LPAC ekHzvmWXndbt55uD4zL1gZtoT3HmH8tuQHFweOHAAGUvflz7i27BXldyZXiLFwWZphRs oh1ynrJf5JGzXxrsy/AKbkSW4qrJmh+fJoJhgslDQvdIGRWTvvNQnUc0i6tArLJKIrnv feDDRkMob0jdofxD+Z5AmUlksT0da9W7Vjkji/PrQY3HWSN00ZphggOeHRPc7QW/27EE z7IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706162165; x=1706766965; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QNfhqMn/7H2JfeWtmxECGiPrj1Y1rofAyE4BiaQU4SY=; b=v3WCdFtiyX8cbc5baPrl8FlUEkQ0UOjEH2Xez+ovDqEMIneb7jUDWLTR97kUmJqDEq Ig8sIMPGGQE7qA+VTUSUucsmyVPPLWMSI5UMeNU+9m1wnhK6Vczwamvo4sdjSX4S8NfY Pix6ZheAfDwLxgMoSeVC2jkqA0guoQREb6xjSIa3FfeTXBeLsYZ8cfLYFb6VFW37+Cip bqm876nSguBhlrR64+KI9ckjuYuW7XLE85tRfYsMaQcistel2JXqZFU9nantSsRc/c9X 0mJblTssG5vXvtTigI1H/ZDODh0W+tvGoQeyWMI3ySL6n8RwHS3n9eL8HuzDxtTq8wT7 p55w== X-Gm-Message-State: AOJu0YxhOXb3mjXwn84pvOZHsc/zN1gFBGLXJQ6lHHiy/OCVSG2MR1ey 6fqq+cLFV5zsJlRupt5fmCKtK64HN/p4ISy7gGRUWNBCTwQB/PQIEIxwMsR5cB2ZPZ1mdMgJ0iS b X-Google-Smtp-Source: AGHT+IEuhveNkoI12PxJoigU1k+xZsEFy41xe0X/ekzS4XltdkIH8YQUG7oUarPWR4x/W6q8/8LoEQ== X-Received: by 2002:a7b:cb8a:0:b0:40e:5cb5:916c with SMTP id m10-20020a7bcb8a000000b0040e5cb5916cmr156743wmi.129.1706162164694; Wed, 24 Jan 2024 21:56:04 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org, Andrew Jeffery , Joel Stanley , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Gavin Shan Subject: [PATCH v3 3/5] hw/arm/aspeed: Init CPU defaults in a common helper Date: Thu, 25 Jan 2024 06:55:42 +0100 Message-ID: <20240125055544.79405-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240125055544.79405-1-philmd@linaro.org> References: <20240125055544.79405-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1706162224299100007 Rework aspeed_soc_num_cpus() as a new init_cpus_defaults() helper to reduce code duplication. Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/aspeed.c | 71 +++++++++++++++++++------------------------------ 1 file changed, 28 insertions(+), 43 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 5b01a4dd28..d2d490a6d1 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -1141,10 +1141,14 @@ static void aspeed_machine_class_props_init(ObjectC= lass *oc) "Change the SPI Flash model"); } =20 -static int aspeed_soc_num_cpus(const char *soc_name) +static void aspeed_machine_class_init_cpus_defaults(MachineClass *mc) { - AspeedSoCClass *sc =3D ASPEED_SOC_CLASS(object_class_by_name(soc_name)); - return sc->num_cpus; + AspeedMachineClass *amc =3D ASPEED_MACHINE_CLASS(mc); + AspeedSoCClass *sc =3D ASPEED_SOC_CLASS(object_class_by_name(amc->soc_= name)); + + mc->default_cpus =3D sc->num_cpus; + mc->min_cpus =3D sc->num_cpus; + mc->max_cpus =3D sc->num_cpus; } =20 static void aspeed_machine_class_init(ObjectClass *oc, void *data) @@ -1176,8 +1180,7 @@ static void aspeed_machine_palmetto_class_init(Object= Class *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D palmetto_bmc_i2c_init; mc->default_ram_size =3D 256 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_quanta_q71l_class_init(ObjectClass *oc, void *d= ata) @@ -1193,8 +1196,7 @@ static void aspeed_machine_quanta_q71l_class_init(Obj= ectClass *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D quanta_q71l_bmc_i2c_init; mc->default_ram_size =3D 128 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); } =20 static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, @@ -1212,8 +1214,7 @@ static void aspeed_machine_supermicrox11_bmc_class_in= it(ObjectClass *oc, amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init =3D palmetto_bmc_i2c_init; mc->default_ram_size =3D 256 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); } =20 static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *o= c, @@ -1231,8 +1232,7 @@ static void aspeed_machine_supermicro_x11spi_bmc_clas= s_init(ObjectClass *oc, amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init =3D palmetto_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); } =20 static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *d= ata) @@ -1248,8 +1248,7 @@ static void aspeed_machine_ast2500_evb_class_init(Obj= ectClass *oc, void *data) amc->num_cs =3D 1; amc->i2c_init =3D ast2500_evb_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_yosemitev2_class_init(ObjectClass *oc, void *da= ta) @@ -1266,8 +1265,7 @@ static void aspeed_machine_yosemitev2_class_init(Obje= ctClass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D yosemitev2_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) @@ -1283,8 +1281,7 @@ static void aspeed_machine_romulus_class_init(ObjectC= lass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D romulus_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_tiogapass_class_init(ObjectClass *oc, void *dat= a) @@ -1301,8 +1298,7 @@ static void aspeed_machine_tiogapass_class_init(Objec= tClass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D tiogapass_bmc_i2c_init; mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_sonorapass_class_init(ObjectClass *oc, void *da= ta) @@ -1318,8 +1314,7 @@ static void aspeed_machine_sonorapass_class_init(Obje= ctClass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D sonorapass_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *d= ata) @@ -1335,8 +1330,7 @@ static void aspeed_machine_witherspoon_class_init(Obj= ectClass *oc, void *data) amc->num_cs =3D 2; amc->i2c_init =3D witherspoon_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *d= ata) @@ -1355,8 +1349,7 @@ static void aspeed_machine_ast2600_evb_class_init(Obj= ectClass *oc, void *data) ASPEED_MAC3_ON; amc->i2c_init =3D ast2600_evb_i2c_init; mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) @@ -1374,8 +1367,7 @@ static void aspeed_machine_tacoma_class_init(ObjectCl= ass *oc, void *data) amc->macs_mask =3D ASPEED_MAC2_ON; amc->i2c_init =3D witherspoon_bmc_i2c_init; /* Same board layout */ mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_g220a_class_init(ObjectClass *oc, void *data) @@ -1392,8 +1384,7 @@ static void aspeed_machine_g220a_class_init(ObjectCla= ss *oc, void *data) amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init =3D g220a_bmc_i2c_init; mc->default_ram_size =3D 1024 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_fp5280g2_class_init(ObjectClass *oc, void *data) @@ -1410,8 +1401,7 @@ static void aspeed_machine_fp5280g2_class_init(Object= Class *oc, void *data) amc->macs_mask =3D ASPEED_MAC0_ON | ASPEED_MAC1_ON; amc->i2c_init =3D fp5280g2_bmc_i2c_init; mc->default_ram_size =3D 512 * MiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_rainier_class_init(ObjectClass *oc, void *data) @@ -1429,8 +1419,7 @@ static void aspeed_machine_rainier_class_init(ObjectC= lass *oc, void *data) amc->macs_mask =3D ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init =3D rainier_bmc_i2c_init; mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 #define FUJI_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) @@ -1451,8 +1440,7 @@ static void aspeed_machine_fuji_class_init(ObjectClas= s *oc, void *data) amc->i2c_init =3D fuji_bmc_i2c_init; amc->uart_default =3D ASPEED_DEV_UART1; mc->default_ram_size =3D FUJI_BMC_RAM_SIZE; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 #define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) @@ -1472,8 +1460,7 @@ static void aspeed_machine_bletchley_class_init(Objec= tClass *oc, void *data) amc->macs_mask =3D ASPEED_MAC2_ON; amc->i2c_init =3D bletchley_bmc_i2c_init; mc->default_ram_size =3D BLETCHLEY_BMC_RAM_SIZE; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); } =20 static void fby35_reset(MachineState *state, ShutdownCause reason) @@ -1515,6 +1502,7 @@ static void aspeed_machine_fby35_class_init(ObjectCla= ss *oc, void *data) amc->i2c_init =3D fby35_i2c_init; /* FIXME: Replace this macro with something more general */ mc->default_ram_size =3D FUJI_BMC_RAM_SIZE; + aspeed_machine_class_init_cpus_defaults(mc); } =20 #define AST1030_INTERNAL_FLASH_SIZE (1024 * 1024) @@ -1592,8 +1580,7 @@ static void aspeed_minibmc_machine_ast1030_evb_class_= init(ObjectClass *oc, amc->spi_model =3D "sst25vf032b"; amc->num_cs =3D 2; amc->macs_mask =3D 0; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); } =20 static void aspeed_machine_qcom_dc_scm_v1_class_init(ObjectClass *oc, @@ -1612,8 +1599,7 @@ static void aspeed_machine_qcom_dc_scm_v1_class_init(= ObjectClass *oc, amc->macs_mask =3D ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init =3D qcom_dc_scm_bmc_i2c_init; mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static void aspeed_machine_qcom_firework_class_init(ObjectClass *oc, @@ -1632,8 +1618,7 @@ static void aspeed_machine_qcom_firework_class_init(O= bjectClass *oc, amc->macs_mask =3D ASPEED_MAC2_ON | ASPEED_MAC3_ON; amc->i2c_init =3D qcom_dc_scm_firework_i2c_init; mc->default_ram_size =3D 1 * GiB; - mc->default_cpus =3D mc->min_cpus =3D mc->max_cpus =3D - aspeed_soc_num_cpus(amc->soc_name); + aspeed_machine_class_init_cpus_defaults(mc); }; =20 static const TypeInfo aspeed_machine_types[] =3D { --=20 2.41.0